/SPARTAN/trunk/arch/amd64/include/fpu_context.h |
---|
File deleted |
/SPARTAN/trunk/arch/amd64/include/pm.h |
---|
145,8 → 145,7 |
extern struct idescriptor idt[]; |
extern struct ptr_16_64 gdtr; |
extern struct ptr_16_32 bsp_bootstrap_gdtr; |
extern struct ptr_16_32 ap_bootstrap_gdtr; |
extern struct ptr_16_32 real_bootstrap_gdtr; |
extern void pm_init(void); |
/SPARTAN/trunk/arch/amd64/include/asm.h |
---|
140,6 → 140,19 |
return v; |
} |
/** Read CR0 |
* |
* Return value in CR0 |
* |
* @return Value read. |
*/ |
static inline __u64 read_cr0(void) |
{ |
__u64 v; |
__asm__ volatile ("movq %%cr0,%0" : "=r" (v)); |
return v; |
} |
/** Read CR2 |
* |
* Return value in CR2 |
146,7 → 159,12 |
* |
* @return Value read. |
*/ |
static inline __u64 read_cr2(void) { __u64 v; __asm__ volatile ("movq %%cr2,%0" : "=r" (v)); return v; } |
static inline __u64 read_cr2(void) |
{ |
__u64 v; |
__asm__ volatile ("movq %%cr2,%0" : "=r" (v)); |
return v; |
} |
/** Write CR3 |
* |
154,7 → 172,10 |
* |
* @param v Value to be written. |
*/ |
static inline void write_cr3(__u64 v) { __asm__ volatile ("movq %0,%%cr3\n" : : "r" (v)); } |
static inline void write_cr3(__u64 v) |
{ |
__asm__ volatile ("movq %0,%%cr3\n" : : "r" (v)); |
} |
/** Read CR3 |
* |
162,7 → 183,12 |
* |
* @return Value read. |
*/ |
static inline __u64 read_cr3(void) { __u64 v; __asm__ volatile ("movq %%cr3,%0" : "=r" (v)); return v; } |
static inline __u64 read_cr3(void) |
{ |
__u64 v; |
__asm__ volatile ("movq %%cr3,%0" : "=r" (v)); |
return v; |
} |
/** Enable local APIC |
/SPARTAN/trunk/arch/amd64/include/context.h |
---|
33,8 → 33,13 |
# include <arch/types.h> |
#endif |
#define SP_DELTA 8 |
/* According to ABI the stack MUST be aligned on |
* 16-byte boundary. If it is not, the va_arg calling will |
* panic sooner or later |
*/ |
#define SP_DELTA 16 |
struct context { |
__u64 sp; |
__u64 pc; |
/SPARTAN/trunk/arch/amd64/include/cpuid.h |
---|
32,6 → 32,10 |
#define AMD_CPUID_EXTENDED 0x80000001 |
#define AMD_EXT_NOEXECUTE 20 |
#define INTEL_CPUID_STANDARD 0x1 |
#define INTEL_SSE2 26 |
#define INTEL_FXSAVE 24 |
#ifndef __ASM__ |
#include <arch/types.h> |
/SPARTAN/trunk/arch/amd64/include/cpu.h |
---|
55,6 → 55,7 |
extern void reset_TS_flag(void); |
extern void set_efer_flag(int flag); |
extern __u64 read_efer_flag(void); |
void cpu_setup_fpu(void); |
#endif /* __ASM__ */ |