/SPARTAN/trunk/arch/amd64/include/cpuid.h |
---|
29,13 → 29,9 |
#ifndef __CPUID_H__ |
#define __CPUID_H__ |
#define AMD_CPUID_EXTENDED 0x80000001 |
#define AMD_CPUID_EXTENDED 0x80000001 |
#define AMD_EXT_NOEXECUTE 20 |
#define INTEL_CPUID_STANDARD 0x1 |
#define INTEL_SSE2 26 |
#define INTEL_FXSAVE 24 |
#ifndef __ASM__ |
#include <arch/types.h> |
/SPARTAN/trunk/arch/amd64/include/pm.h |
---|
145,7 → 145,8 |
extern struct idescriptor idt[]; |
extern struct ptr_16_64 gdtr; |
extern struct ptr_16_32 real_bootstrap_gdtr; |
extern struct ptr_16_32 bsp_bootstrap_gdtr; |
extern struct ptr_16_32 ap_bootstrap_gdtr; |
extern void pm_init(void); |
/SPARTAN/trunk/arch/amd64/include/asm.h |
---|
140,19 → 140,6 |
return v; |
} |
/** Read CR0 |
* |
* Return value in CR0 |
* |
* @return Value read. |
*/ |
static inline __u64 read_cr0(void) |
{ |
__u64 v; |
__asm__ volatile ("movq %%cr0,%0" : "=r" (v)); |
return v; |
} |
/** Read CR2 |
* |
* Return value in CR2 |
159,12 → 146,7 |
* |
* @return Value read. |
*/ |
static inline __u64 read_cr2(void) |
{ |
__u64 v; |
__asm__ volatile ("movq %%cr2,%0" : "=r" (v)); |
return v; |
} |
static inline __u64 read_cr2(void) { __u64 v; __asm__ volatile ("movq %%cr2,%0" : "=r" (v)); return v; } |
/** Write CR3 |
* |
172,10 → 154,7 |
* |
* @param v Value to be written. |
*/ |
static inline void write_cr3(__u64 v) |
{ |
__asm__ volatile ("movq %0,%%cr3\n" : : "r" (v)); |
} |
static inline void write_cr3(__u64 v) { __asm__ volatile ("movq %0,%%cr3\n" : : "r" (v)); } |
/** Read CR3 |
* |
183,12 → 162,7 |
* |
* @return Value read. |
*/ |
static inline __u64 read_cr3(void) |
{ |
__u64 v; |
__asm__ volatile ("movq %%cr3,%0" : "=r" (v)); |
return v; |
} |
static inline __u64 read_cr3(void) { __u64 v; __asm__ volatile ("movq %%cr3,%0" : "=r" (v)); return v; } |
/** Enable local APIC |
/SPARTAN/trunk/arch/amd64/include/cpu.h |
---|
55,7 → 55,6 |
extern void reset_TS_flag(void); |
extern void set_efer_flag(int flag); |
extern __u64 read_efer_flag(void); |
void cpu_setup_fpu(void); |
#endif /* __ASM__ */ |
/SPARTAN/trunk/arch/amd64/include/context.h |
---|
33,13 → 33,8 |
# include <arch/types.h> |
#endif |
#define SP_DELTA 8 |
/* According to ABI the stack MUST be aligned on |
* 16-byte boundary. If it is not, the va_arg calling will |
* panic sooner or later |
*/ |
#define SP_DELTA 16 |
struct context { |
__u64 sp; |
__u64 pc; |
/SPARTAN/trunk/arch/amd64/include/fpu_context.h |
---|
0,0 → 1,37 |
/* |
* Copyright (C) 2005 Martin Decky |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifndef __amd64_FPU_CONTEXT_H__ |
#define __amd64_FPU_CONTEXT_H__ |
#include <arch/types.h> |
struct fpu_context { |
}; |
#endif |