/SPARTAN/trunk/arch/amd64/include/asm.h |
---|
36,10 → 36,13 |
void asm_delay_loop(__u32 t); |
void asm_fake_loop(__u32 t); |
/* TODO: implement the real stuff */ |
static inline __address get_stack_base(void) |
{ |
return NULL; |
__address v; |
__asm__ volatile ("andq %%rsp, %0\n" : "=r" (v) : "0" (~((__u64)STACK_SIZE-1))); |
return v; |
} |
static inline void cpu_sleep(void) { __asm__("hlt"); }; |
51,9 → 54,9 |
__u8 out; |
asm ( |
"mov %0, %%dx;" |
"mov %1, %%dx;" |
"inb %%dx,%%al;" |
"mov %%al, %1;" |
"mov %%al, %0;" |
:"=m"(out) |
:"m"(port) |
:"%dx","%al" |
/SPARTAN/trunk/arch/amd64/include/mm/page.h |
---|
38,45 → 38,95 |
#define PAGE_SIZE FRAME_SIZE |
#ifndef __ASM__ |
# define KA2PA(x) (((__address) (x)) + 0x80000000) |
# define PA2KA(x) (((__address) (x)) - 0x80000000) |
# define KA2PA(x) (((__address) (x)) + 0x80000000) |
# define PA2KA(x) (((__address) (x)) - 0x80000000) |
#else |
# define KA2PA(x) ((x) + 0x80000000) |
# define PA2KA(x) ((x)) - 0x80000000) |
# define KA2PA(x) ((x) + 0x80000000) |
//# define PA2KA(x) ((x)) - 0x80000000) |
#endif |
#define PTL0_INDEX_ARCH(vaddr) 0 |
#define PTL1_INDEX_ARCH(vaddr) 0 |
#define PTL2_INDEX_ARCH(vaddr) 0 |
#define PTL3_INDEX_ARCH(vaddr) 0 |
#define PTL0_INDEX_ARCH(vaddr) (((vaddr)>>39)&0x1ff) |
#define PTL1_INDEX_ARCH(vaddr) (((vaddr)>>30)&0x1ff) |
#define PTL2_INDEX_ARCH(vaddr) (((vaddr)>>21)&0x1ff) |
#define PTL3_INDEX_ARCH(vaddr) (((vaddr)>>12)&0x1ff) |
#define GET_PTL0_ADDRESS_ARCH() 0 |
#define SET_PTL0_ADDRESS_ARCH(ptl0) |
#define GET_PTL0_ADDRESS_ARCH() ((pte_t *) read_cr3()) |
#define GET_PTL1_ADDRESS_ARCH(ptl0, i) ((pte_t *) ((((__u64) ((pte_t *)(ptl0))[(i)].addr_12_31)<<12) | (((__u64) ((pte_t *)(ptl0))[(i)].addr_32_51)<<32 ))) |
#define GET_PTL2_ADDRESS_ARCH(ptl1, i) ((pte_t *) ((((__u64) ((pte_t *)(ptl1))[(i)].addr_12_31)<<12) | (((__u64) ((pte_t *)(ptl1))[(i)].addr_32_51)<<32 ))) |
#define GET_PTL3_ADDRESS_ARCH(ptl2, i) ((pte_t *) ((((__u64) ((pte_t *)(ptl2))[(i)].addr_12_31)<<12) | (((__u64) ((pte_t *)(ptl2))[(i)].addr_32_51)<<32 ))) |
#define GET_FRAME_ADDRESS_ARCH(ptl3, i) ((__address *) ((((__u64) ((pte_t *)(ptl3))[(i)].addr_12_31)<<12) | (((__u64) ((pte_t *)(ptl3))[(i)].addr_32_51)<<32 ))) |
#define GET_PTL1_ADDRESS_ARCH(ptl0, i) ((pte_t *) 0) |
#define GET_PTL2_ADDRESS_ARCH(ptl1, i) ((pte_t *) 0) |
#define GET_PTL3_ADDRESS_ARCH(ptl2, i) ((pte_t *) 0) |
#define GET_FRAME_ADDRESS_ARCH(ptl3, i) ((pte_t *) 0) |
#define SET_PTL0_ADDRESS_ARCH(ptl0) (write_cr3((__address) (ptl0))) |
#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) set_pt_addr((pte_t *)(ptl0), (index_t)(i), a) |
#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) set_pt_addr((pte_t *)(ptl1), (index_t)(i), a) |
#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) set_pt_addr((pte_t *)(ptl2), (index_t)(i), a) |
#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) set_pt_addr((pte_t *)(ptl3), (index_t)(i), a) |
#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) |
#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) |
#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) |
#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) |
#define GET_PTL1_FLAGS_ARCH(ptl0, i) get_pt_flags((pte_t *)(ptl0), (index_t)(i)) |
#define GET_PTL2_FLAGS_ARCH(ptl1, i) get_pt_flags((pte_t *)(ptl1), (index_t)(i)) |
#define GET_PTL3_FLAGS_ARCH(ptl2, i) get_pt_flags((pte_t *)(ptl2), (index_t)(i)) |
#define GET_FRAME_FLAGS_ARCH(ptl3, i) get_pt_flags((pte_t *)(ptl3), (index_t)(i)) |
#define GET_PTL1_FLAGS_ARCH(ptl0, i) 0 |
#define GET_PTL2_FLAGS_ARCH(ptl1, i) 0 |
#define GET_PTL3_FLAGS_ARCH(ptl2, i) 0 |
#define GET_FRAME_FLAGS_ARCH(ptl3, i) 0 |
#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) set_pt_flags((pte_t *)(ptl0), (index_t)(i), (x)) |
#define SET_PTL2_FLAGS_ARCH(ptl1, i, x) set_pt_flags((pte_t *)(ptl1), (index_t)(i), (x)) |
#define SET_PTL3_FLAGS_ARCH(ptl2, i, x) set_pt_flags((pte_t *)(ptl2), (index_t)(i), (x)) |
#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) set_pt_flags((pte_t *)(ptl3), (index_t)(i), (x)) |
#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) |
#define SET_PTL2_FLAGS_ARCH(ptl1, i, x) |
#define SET_PTL3_FLAGS_ARCH(ptl2, i, x) |
#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) |
#ifndef __ASM__ |
#ifndef __ASM__ |
typedef struct page_specifier pte_t; |
struct page_specifier { |
unsigned present : 1; |
unsigned writeable : 1; |
unsigned uaccessible : 1; |
unsigned page_write_through : 1; |
unsigned page_cache_disable : 1; |
unsigned accessed : 1; |
unsigned dirty : 1; |
unsigned unused: 1; |
unsigned global : 1; |
unsigned avl : 3; |
unsigned addr_12_31 : 30; |
unsigned addr_32_51 : 21; |
unsigned no_execute : 1; |
} __attribute__ ((packed)); |
static inline int get_pt_flags(pte_t *pt, index_t i) |
{ |
pte_t *p = &pt[i]; |
return ( |
(!p->page_cache_disable)<<PAGE_CACHEABLE_SHIFT | |
(!p->present)<<PAGE_PRESENT_SHIFT | |
p->uaccessible<<PAGE_USER_SHIFT | |
1<<PAGE_READ_SHIFT | |
p->writeable<<PAGE_WRITE_SHIFT | |
(!p->no_execute)<<PAGE_EXEC_SHIFT |
); |
} |
static inline void set_pt_addr(pte_t *pt, index_t i, __address a) |
{ |
pte_t *p = &pt[i]; |
p->addr_12_31 = (a >> 12) & 0xfffff; |
p->addr_32_51 = a >> 32; |
} |
static inline void set_pt_flags(pte_t *pt, index_t i, int flags) |
{ |
pte_t *p = &pt[i]; |
p->page_cache_disable = !(flags & PAGE_CACHEABLE); |
p->present = !(flags & PAGE_NOT_PRESENT); |
p->uaccessible = (flags & PAGE_USER) != 0; |
p->writeable = (flags & PAGE_WRITE) != 0; |
p->no_execute = (flags & PAGE_EXEC) == 0; |
} |
extern void page_arch_init(void); |
typedef __u64 pte_t; |
#endif |
#endif |
/SPARTAN/trunk/arch/amd64/src/mm/page.c |
---|
27,8 → 27,50 |
*/ |
#include <mm/page.h> |
#include <mm/frame.h> |
#include <arch/mm/page.h> |
#include <arch/interrupt.h> |
#include <arch/asm.h> |
#include <config.h> |
#include <memstr.h> |
__address bootstrap_dba; |
void page_arch_init(void) |
{ |
__address dba; |
count_t i; |
if (config.cpu_active == 1) { |
dba = frame_alloc(FRAME_KA | FRAME_PANIC); |
memsetb(dba, PAGE_SIZE, 0); |
bootstrap_dba = dba; |
/* |
* Identity mapping for all frames. |
* PA2KA(identity) mapping for all frames. |
*/ |
for (i = 0; i < frames; i++) { |
map_page_to_frame(i * PAGE_SIZE, i * PAGE_SIZE, PAGE_CACHEABLE | PAGE_EXEC, KA2PA(dba)); |
map_page_to_frame(PA2KA(i * PAGE_SIZE), i * PAGE_SIZE, PAGE_CACHEABLE | PAGE_EXEC, KA2PA(dba)); |
} |
trap_register(14, page_fault); |
write_cr3(KA2PA(dba)); |
} |
else { |
/* |
* Application processors need to create their own view of the |
* virtual address space. Because of that, each AP copies |
* already-initialized paging information from the bootstrap |
* processor and adjusts it to fulfill its needs. |
*/ |
dba = frame_alloc(FRAME_KA | FRAME_PANIC); |
memcpy((void *)dba, (void *)bootstrap_dba , PAGE_SIZE); |
write_cr3(KA2PA(dba)); |
} |
} |
/SPARTAN/trunk/arch/amd64/src/interrupt.c |
---|
0,0 → 1,162 |
/* |
* Copyright (C) 2001-2004 Jakub Jermar |
* All rights reserved. |
* |
* Redistribution and use in source and binary forms, with or without |
* modification, are permitted provided that the following conditions |
* are met: |
* |
* - Redistributions of source code must retain the above copyright |
* notice, this list of conditions and the following disclaimer. |
* - Redistributions in binary form must reproduce the above copyright |
* notice, this list of conditions and the following disclaimer in the |
* documentation and/or other materials provided with the distribution. |
* - The name of the author may not be used to endorse or promote products |
* derived from this software without specific prior written permission. |
* |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#include <arch/interrupt.h> |
#include <print.h> |
#include <debug.h> |
#include <panic.h> |
#include <arch/i8259.h> |
#include <func.h> |
#include <cpu.h> |
#include <arch/asm.h> |
#include <mm/tlb.h> |
#include <arch.h> |
/* |
* Interrupt and exception dispatching. |
*/ |
static iroutine ivt[IVT_ITEMS]; |
void (* disable_irqs_function)(__u16 irqmask) = NULL; |
void (* enable_irqs_function)(__u16 irqmask) = NULL; |
void (* eoi_function)(void) = NULL; |
iroutine trap_register(__u8 n, iroutine f) |
{ |
ASSERT(n < IVT_ITEMS); |
iroutine old; |
old = ivt[n]; |
ivt[n] = f; |
return old; |
} |
/* |
* Called directly from the assembler code. |
* CPU is cpu_priority_high(). |
*/ |
void trap_dispatcher(__u8 n, __native stack[]) |
{ |
ASSERT(n < IVT_ITEMS); |
ivt[n](n, stack); |
} |
void null_interrupt(__u8 n, __native stack[]) |
{ |
printf("int %d: null_interrupt\n", n); |
printf("stack: %L, %L, %L, %L\n", stack[0], stack[1], stack[2], stack[3]); |
panic("unserviced interrupt\n"); |
} |
void gp_fault(__u8 n, __native stack[]) |
{ |
printf("ERROR_WORD=%X, %%eip=%X, %%cs=%X, flags=%X\n", stack[0], stack[1], stack[2], stack[3]); |
printf("%%eax=%L, %%ebx=%L, %%ecx=%L, %%edx=%L,\n%%edi=%L, %%esi=%L, %%ebp=%L, %%esp=%L\n", stack[-2], stack[-5], stack[-3], stack[-4], stack[-9], stack[-8], stack[-1], stack); |
printf("stack: %X, %X, %X, %X\n", stack[4], stack[5], stack[6], stack[7]); |
panic("general protection fault\n"); |
} |
void ss_fault(__u8 n, __native stack[]) |
{ |
printf("ERROR_WORD=%X, %%eip=%X, %%cs=%X, flags=%X\n", stack[0], stack[1], stack[2], stack[3]); |
printf("%%eax=%L, %%ebx=%L, %%ecx=%L, %%edx=%L,\n%%edi=%L, %%esi=%L, %%ebp=%L, %%esp=%L\n", stack[-2], stack[-5], stack[-3], stack[-4], stack[-9], stack[-8], stack[-1], stack); |
printf("stack: %X, %X, %X, %X\n", stack[4], stack[5], stack[6], stack[7]); |
panic("stack fault\n"); |
} |
void nm_fault(__u8 n, __native stack[]) |
{ |
reset_TS_flag(); |
if ((CPU->fpu_owner)!=NULL) { |
fpu_lazy_context_save(&((CPU->fpu_owner)->saved_fpu_context)); |
(CPU->fpu_owner)->fpu_context_engaged=0; /* don't prevent migration */ |
} |
if(THREAD->fpu_context_exists) fpu_lazy_context_restore(&(THREAD->saved_fpu_context)); |
else {fpu_init();THREAD->fpu_context_exists=1;} |
CPU->fpu_owner=THREAD; |
} |
void page_fault(__u8 n, __native stack[]) |
{ |
printf("page fault address: %Q\n", read_cr2()); |
printf("ERROR_WORD=%Q, %%rip=%Q, %%rcs=%Q, flags=%Q\n", stack[0], stack[1], stack[2], stack[3]); |
printf("%%rax=%Q, %%rbx=%Q, %%rcx=%Q, %%rdx=%Q,\n%%rsi=%Q, %%rdi=%Q\n", |
stack[-1], stack[-2], stack[-3], stack[-4], stack[-5], stack[-6]); |
printf("stack: %X, %X, %X, %X\n", stack[5], stack[6], stack[7], stack[8]); |
panic("page fault\n"); |
} |
void syscall(__u8 n, __native stack[]) |
{ |
printf("cpu%d: syscall\n", CPU->id); |
thread_usleep(1000); |
} |
void tlb_shootdown_ipi(__u8 n, __native stack[]) |
{ |
trap_virtual_eoi(); |
tlb_shootdown_ipi_recv(); |
} |
void wakeup_ipi(__u8 n, __native stack[]) |
{ |
trap_virtual_eoi(); |
} |
void trap_virtual_enable_irqs(__u16 irqmask) |
{ |
if (enable_irqs_function) |
enable_irqs_function(irqmask); |
else |
panic("no enable_irqs_function\n"); |
} |
void trap_virtual_disable_irqs(__u16 irqmask) |
{ |
if (disable_irqs_function) |
disable_irqs_function(irqmask); |
else |
panic("no disable_irqs_function\n"); |
} |
void trap_virtual_eoi(void) |
{ |
if (eoi_function) |
eoi_function(); |
else |
panic("no eoi_function\n"); |
} |