/SPARTAN/trunk/arch/mips/include/asm/boot.h |
---|
32,7 → 32,6 |
/* Temporary stack size for boot process */ |
#define TEMP_STACK_SIZE 0x100 |
#define TEMP_STACK_START 0x80000400 |
/* Kernel startup address */ |
#define KERNEL_STARTUP_ADDRESS 0x80000300 |
/SPARTAN/trunk/arch/mips/include/thread.h |
---|
29,8 → 29,6 |
#ifndef __mips_THREAD_H__ |
#define __mips_THREAD_H__ |
#define ARCH_THREAD_DATA \ |
pri_t saved_pri; \ |
__u32 saved_epc; |
#define ARCH_THREAD_DATA __u32 saved_epc; |
#endif |
/SPARTAN/trunk/arch/mips/include/asm.h |
---|
30,6 → 30,7 |
#define __MIPS_ASM_H__ |
#include <arch/types.h> |
#include <typedefs.h> |
#include <config.h> |
#define cpu_sleep() ; |
49,8 → 50,8 |
return v; |
} |
void cpu_halt(void); |
void asm_delay_loop(__u32 t); |
extern void cpu_halt(void); |
extern void asm_delay_loop(__u32 t); |
extern void userspace_asm(__address ustack); |
#endif |
/SPARTAN/trunk/arch/mips/include/cp0.h |
---|
35,6 → 35,7 |
#define cp0_status_exl_exception_bit (1<<1) |
#define cp0_status_erl_error_bit (1<<2) |
#define cp0_status_bev_bootstrap_bit (1<<22) |
#define cp0_status_um_bit (1<<4) |
#define cp0_status_im7_shift 15 |
/* |
/SPARTAN/trunk/arch/mips/include/mm/vm.h |
---|
36,8 → 36,8 |
#define USER_ADDRESS_SPACE_START_ARCH (__address) 0x00000000 |
#define USER_ADDRESS_SPACE_END_ARCH (__address) 0x7fffffff |
#define UTEXT_ADDRESS_ARCH 0x00001000 |
#define USTACK_ADDRESS_ARCH (0x7fffffff-(PAGE_SIZE-1)) |
#define UTEXT_ADDRESS_ARCH 0x00004000 |
#define USTACK_ADDRESS_ARCH (0x80000000-PAGE_SIZE) |
#define UDATA_ADDRESS_ARCH 0x01001000 |
#endif |
/SPARTAN/trunk/arch/mips/include/context.h |
---|
62,11 → 62,14 |
#define EOFFSET_S8 100 |
#define EOFFSET_GP 104 |
#define EOFFSET_RA 108 |
#define EOFFSET_LO 112 |
#define EOFFSET_HI 116 |
#define EOFFSET_SP 112 |
#define REGISTER_SPACE 120 |
#define EOFFSET_LO 116 |
#define EOFFSET_HI 120 |
#define EOFFSET_STATUS 124 |
#define REGISTER_SPACE 128 |
/* |
* Put one item onto the stack to support get_stack_base(). |
*/ |
/SPARTAN/trunk/arch/mips/Makefile.inc |
---|
21,11 → 21,11 |
arch_sources= \ |
arch/start.S \ |
arch/context.S \ |
arch/panic.s \ |
arch/panic.S \ |
arch/mips.c \ |
arch/dummy.s \ |
arch/dummy.S \ |
arch/putchar.c \ |
arch/asm.s \ |
arch/asm.S \ |
arch/exception.c \ |
arch/interrupt.c \ |
arch/cache.c \ |
/SPARTAN/trunk/arch/mips/src/dummy.s |
---|
File deleted |
/SPARTAN/trunk/arch/mips/src/asm.s |
---|
File deleted |
\ No newline at end of file |
/SPARTAN/trunk/arch/mips/src/panic.s |
---|
File deleted |
/SPARTAN/trunk/arch/mips/src/exception.c |
---|
39,7 → 39,6 |
int excno; |
__u32 epc; |
__u32 epc_shift = 0; |
pri_t pri; |
ASSERT(CPU != NULL); |
50,12 → 49,12 |
* On exit, exception bit must be set before cpu_priority_restore() is called. |
*/ |
pri = cpu_priority_high(); |
cpu_priority_high(); |
epc = cp0_epc_read(); |
cp0_status_write(cp0_status_read() & ~ cp0_status_exl_exception_bit); |
cp0_status_write(cp0_status_read() & ~ (cp0_status_exl_exception_bit | |
cp0_status_um_bit)); |
if (THREAD) { |
THREAD->saved_pri = pri; |
THREAD->saved_epc = epc; |
} |
/* decode exception number and process the exception */ |
115,12 → 114,12 |
panic("unhandled exception %d\n", excno); |
} |
if (THREAD) { |
pri = THREAD->saved_pri; |
if (THREAD) |
epc = THREAD->saved_epc; |
} |
/* Raise EXL bit before epc_write, so that we support |
* properly nested exceptions |
*/ |
cp0_status_write(cp0_status_read() | cp0_status_exl_exception_bit); |
cp0_epc_write(epc + epc_shift); |
cp0_status_write(cp0_status_read() | cp0_status_exl_exception_bit); |
cpu_priority_restore(pri); |
} |
/SPARTAN/trunk/arch/mips/src/asm.S |
---|
0,0 → 1,169 |
# |
# Copyright (C) 2001-2004 Jakub Jermar |
# All rights reserved. |
# |
# Redistribution and use in source and binary forms, with or without |
# modification, are permitted provided that the following conditions |
# are met: |
# |
# - Redistributions of source code must retain the above copyright |
# notice, this list of conditions and the following disclaimer. |
# - Redistributions in binary form must reproduce the above copyright |
# notice, this list of conditions and the following disclaimer in the |
# documentation and/or other materials provided with the distribution. |
# - The name of the author may not be used to endorse or promote products |
# derived from this software without specific prior written permission. |
# |
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
# |
.text |
.macro cp0_read reg |
mfc0 $2,\reg |
j $31 |
nop |
.endm |
.macro cp0_write reg |
mtc0 $4,\reg |
j $31 |
nop |
.endm |
.set noat |
.set noreorder |
.set nomacro |
.global cp0_index_read |
.global cp0_index_write |
.global cp0_random_read |
.global cp0_entry_lo0_read |
.global cp0_entry_lo0_write |
.global cp0_entry_lo1_read |
.global cp0_entry_lo1_write |
.global cp0_context_read |
.global cp0_context_write |
.global cp0_pagemask_read |
.global cp0_pagemask_write |
.global cp0_wired_read |
.global cp0_wired_write |
.global cp0_badvaddr_read |
.global cp0_count_read |
.global cp0_count_write |
.global cp0_hi_read |
.global cp0_hi_write |
.global cp0_compare_read |
.global cp0_compare_write |
.global cp0_status_read |
.global cp0_status_write |
.global cp0_cause_read |
.global cp0_cause_write |
.global cp0_epc_read |
.global cp0_epc_write |
.global cp0_prid_read |
cp0_index_read: cp0_read $0 |
cp0_index_write: cp0_write $0 |
cp0_random_read: cp0_read $1 |
cp0_entry_lo0_read: cp0_read $2 |
cp0_entry_lo0_write: cp0_write $2 |
cp0_entry_lo1_read: cp0_read $3 |
cp0_entry_lo1_write: cp0_write $3 |
cp0_context_read: cp0_read $4 |
cp0_context_write: cp0_write $4 |
cp0_pagemask_read: cp0_read $5 |
cp0_pagemask_write: cp0_write $5 |
cp0_wired_read: cp0_read $6 |
cp0_wired_write: cp0_write $6 |
cp0_badvaddr_read: cp0_read $8 |
cp0_count_read: cp0_read $9 |
cp0_count_write: cp0_write $9 |
cp0_entry_hi_read: cp0_read $10 |
cp0_entry_hi_write: cp0_write $10 |
cp0_compare_read: cp0_read $11 |
cp0_compare_write: cp0_write $11 |
cp0_status_read: cp0_read $12 |
cp0_status_write: cp0_write $12 |
cp0_cause_read: cp0_read $13 |
cp0_cause_write: cp0_write $13 |
cp0_epc_read: cp0_read $14 |
cp0_epc_write: cp0_write $14 |
cp0_prid_read: cp0_read $15 |
.global tlbp |
tlbp: |
tlbp |
j $31 |
nop |
.global tlbr |
tlbr: |
tlbr |
j $31 |
nop |
.global tlbwi |
tlbwi: |
tlbwi |
j $31 |
nop |
.global tlbwr |
tlbwr: |
tlbwr |
j $31 |
nop |
.global cpu_halt |
cpu_halt: |
j cpu_halt |
nop |
.global memsetb |
memsetb: |
j _memsetb |
nop |
.global memcpy |
memcpy: |
j _memcpy |
nop |
# THIS IS USERSPACE CODE |
.global utext |
utext: |
j $31 |
nop |
utext_end: |
.data |
.global utext_size |
utext_size: |
.long utext_end-utext |
/SPARTAN/trunk/arch/mips/src/mips.c |
---|
29,6 → 29,10 |
#include <arch.h> |
#include <arch/cp0.h> |
#include <arch/exception.h> |
#include <arch/asm/regname.h> |
#include <arch/asm.h> |
#include <mm/vm.h> |
#include <userspace.h> |
void arch_pre_mm_init(void) |
{ |
57,3 → 61,27 |
void arch_late_init(void) |
{ |
} |
void userspace(void) |
{ |
/* EXL=1, UM=1, IE=1 */ |
cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit | |
cp0_status_um_bit | |
cp0_status_ie_enabled_bit)); |
cp0_epc_write(UTEXT_ADDRESS); |
userspace_asm(USTACK_ADDRESS+PAGE_SIZE); |
while (1) |
; |
} |
/* Stack pointer saved when entering user mode */ |
/* TODO: How do we do it on SMP system???? */ |
__address supervisor_sp; |
void before_thread_runs_arch(void) |
{ |
supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA]; |
} |
/SPARTAN/trunk/arch/mips/src/panic.S |
---|
0,0 → 1,42 |
# |
# Copyright (C) 2001-2004 Jakub Jermar |
# All rights reserved. |
# |
# Redistribution and use in source and binary forms, with or without |
# modification, are permitted provided that the following conditions |
# are met: |
# |
# - Redistributions of source code must retain the above copyright |
# notice, this list of conditions and the following disclaimer. |
# - Redistributions in binary form must reproduce the above copyright |
# notice, this list of conditions and the following disclaimer in the |
# documentation and/or other materials provided with the distribution. |
# - The name of the author may not be used to endorse or promote products |
# derived from this software without specific prior written permission. |
# |
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
# |
.text |
.set noat |
.set noreorder |
.set nomacro |
.global panic_printf |
panic_printf: |
jal printf |
nop |
j cpu_halt |
nop |
/SPARTAN/trunk/arch/mips/src/dummy.S |
---|
0,0 → 1,47 |
# |
# Copyright (C) 2001-2004 Jakub Jermar |
# All rights reserved. |
# |
# Redistribution and use in source and binary forms, with or without |
# modification, are permitted provided that the following conditions |
# are met: |
# |
# - Redistributions of source code must retain the above copyright |
# notice, this list of conditions and the following disclaimer. |
# - Redistributions in binary form must reproduce the above copyright |
# notice, this list of conditions and the following disclaimer in the |
# documentation and/or other materials provided with the distribution. |
# - The name of the author may not be used to endorse or promote products |
# derived from this software without specific prior written permission. |
# |
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
# |
.text |
.set noat |
.global calibrate_delay_loop |
.global asm_delay_loop |
.global dummy |
.global fpu_enable |
.global fpu_disable |
.global fpu_init |
calibrate_delay_loop: |
asm_delay_loop: |
fpu_enable: |
fpu_disable: |
fpu_init: |
dummy: |
j $31 |
nop |
/SPARTAN/trunk/arch/mips/src/start.S |
---|
43,7 → 43,10 |
.global tlb_refill_entry |
.global cache_error_entry |
.global exception_entry |
.global userspace_asm |
# Save registers to space defined by \r |
# We will change $at on the way |
.macro REGISTERS_STORE r |
sw $at,EOFFSET_AT(\r) |
sw $v0,EOFFSET_V0(\r) |
62,6 → 65,12 |
sw $t7,EOFFSET_T7(\r) |
sw $t8,EOFFSET_T8(\r) |
sw $t9,EOFFSET_T9(\r) |
mflo $at |
sw $at, EOFFSET_LO(\r) |
mfhi $at |
sw $at, EOFFSET_HI(\r) |
sw $s0,EOFFSET_S0(\r) |
sw $s1,EOFFSET_S1(\r) |
sw $s2,EOFFSET_S2(\r) |
73,14 → 82,13 |
sw $s8,EOFFSET_S8(\r) |
sw $gp,EOFFSET_GP(\r) |
sw $ra,EOFFSET_RA(\r) |
mflo $k0 |
mfhi $k1 |
sw $k0,EOFFSET_LO(\r) |
sw $k1,EOFFSET_HI(\r) |
sw $sp,EOFFSET_SP(\r) |
mfc0 $at, $status |
sw $at,EOFFSET_STATUS(\r) |
.endm |
.macro REGISTERS_LOAD r |
lw $at,EOFFSET_AT(\r) |
lw $v0,EOFFSET_V0(\r) |
lw $v1,EOFFSET_V1(\r) |
lw $a0,EOFFSET_A0(\r) |
109,13 → 117,37 |
lw $gp,EOFFSET_GP(\r) |
lw $ra,EOFFSET_RA(\r) |
lw $k0,EOFFSET_LO(\r) |
lw $k1,EOFFSET_HI(\r) |
mtlo $k0 |
mthi $k1 |
lw $at,EOFFSET_LO(\r) |
mtlo $at |
lw $at,EOFFSET_HI(\r) |
mthi $at |
lw $at,EOFFSET_STATUS(\r) |
mtc0 $at, $status |
lw $at,EOFFSET_AT(\r) |
lw $sp,EOFFSET_SP(\r) |
.endm |
# Move kernel stack pointer address to register K0 |
# - if we are in user mode, load the appropriate stack |
# address |
.macro KERNEL_STACK_TO_K0 |
# If we are in user mode |
mfc0 $k0, $status |
andi $k0, 0x10 |
beq $k0, $0, 1f |
add $k0, $sp, 0 |
# Move $k0 pointer to kernel stack |
lui $k0, %hi(supervisor_sp) |
ori $k0, %lo(supervisor_sp) |
# Move $k0 (superveisor_sp) |
lw $k0, 0($k0) |
1: |
.endm |
.org 0x0 |
tlb_refill_entry: |
j tlb_refill_handler |
127,25 → 159,20 |
nop |
.org 0x180 |
exception_entry: |
exception_handler: |
sub $sp, REGISTER_SPACE |
REGISTERS_STORE $sp |
norm_exception: |
j exception_handler |
nop |
jal exception |
nop |
.org 0x200 |
iv_exception: |
j exception_handler |
nop |
REGISTERS_LOAD $sp |
add $sp, REGISTER_SPACE |
eret |
nop |
.org KA2PA(0x80000300) |
.org KA2PA(KERNEL_STARTUP_ADDRESS) |
kernel_image_start: |
/* Load temporary stack */ |
lui $sp, (TEMP_STACK_START + TEMP_STACK_SIZE) >> 16 |
ori $sp, (TEMP_STACK_START + TEMP_STACK_SIZE) & 0xffff |
lui $sp, %hi(end_stack) |
ori $sp, $0, %lo(end_stack) |
/* Not sure about this, but might be needed for PIC code???? */ |
lui $gp, 0x8000 |
153,31 → 180,56 |
jal main_bsp |
nop |
.org KA2PA(TEMP_STACK_START) |
.space TEMP_STACK_SIZE |
end_stack: |
exception_handler: |
exception_entry: |
KERNEL_STACK_TO_K0 |
sub $k0, REGISTER_SPACE |
REGISTERS_STORE $k0 |
add $sp, $k0, 0 |
jal exception |
nop |
REGISTERS_LOAD $sp |
# The $sp is automatically restored to former value |
eret |
nop |
tlb_refill_handler: |
sub $sp, REGISTER_SPACE |
REGISTERS_STORE $sp |
KERNEL_STACK_TO_K0 |
sub $k0, REGISTER_SPACE |
REGISTERS_STORE $k0 |
add $sp, $k0, 0 |
jal tlb_refill |
nop |
REGISTERS_LOAD $sp |
add $sp, REGISTER_SPACE |
eret |
nop |
cache_error_handler: |
KERNEL_STACK_TO_K0 |
sub $sp, REGISTER_SPACE |
REGISTERS_STORE $sp |
add $sp, $k0, 0 |
jal cache_error |
nop |
REGISTERS_LOAD $sp |
add $sp, REGISTER_SPACE |
eret |
nop |
userspace_asm: |
.word 0x29 |
add $sp, $a0, 0 |
eret |
nop |
/SPARTAN/trunk/arch/amd64/src/userspace.c |
---|
57,7 → 57,7 |
"pushq %%rdx;" |
"pushq %%rsi;" |
"iretq;" |
: : "i" (gdtselector(UDATA_DES) | PL_USER), "i" (USTACK_ADDRESS+(THREAD_STACK_SIZE-1)), "r" (pri), "i" (gdtselector(UTEXT_DES) | PL_USER), "i" (UTEXT_ADDRESS)); |
: : "i" (gdtselector(UDATA_DES) | PL_USER), "i" (USTACK_ADDRESS+THREAD_STACK_SIZE), "r" (pri), "i" (gdtselector(UTEXT_DES) | PL_USER), "i" (UTEXT_ADDRESS)); |
/* Unreachable */ |
for(;;); |