| /SPARTAN/trunk/arch/ia32/src/interrupt.c |
|---|
| 83,6 → 83,7 |
| printf("%%eax=%L, %%ebx=%L, %%ecx=%L, %%edx=%L,\n%%edi=%L, %%esi=%L, %%ebp=%L, %%esp=%L\n", stack[-2], stack[-5], stack[-3], stack[-4], stack[-9], stack[-8], stack[-1], stack); |
| printf("stack: %X, %X, %X, %X\n", stack[4], stack[5], stack[6], stack[7]); |
| panic("general protection fault\n"); |
| stack[1]++; |
| } |
| void ss_fault(__u8 n, __native stack[]) |
| /SPARTAN/trunk/arch/amd64/include/asm.h |
|---|
| 36,6 → 36,7 |
| void asm_delay_loop(__u32 t); |
| void asm_fake_loop(__u32 t); |
| /* TODO: implement the real stuff */ |
| static inline __address get_stack_base(void) |
| { |
| 43,7 → 44,6 |
| } |
| static inline void cpu_sleep(void) { __asm__("hlt"); }; |
| static inline void cpu_halt(void) { __asm__("hlt"); }; |
| static inline __u8 inb(__u16 port) |
| 137,7 → 137,7 |
| * |
| * @return Value read. |
| */ |
| static inline __u64 read_cr2(void) { __u64 v; __asm__ volatile ("movq %%cr2,%0" : "=r" (v)); return v; } |
| static inline __u32 read_cr2(void) { __u64 v; __asm__ volatile ("movq %%cr2,%0" : "=r" (v)); return v; } |
| /** Write CR3 |
| * |
| 153,9 → 153,16 |
| * |
| * @return Value read. |
| */ |
| static inline __u64 read_cr3(void) { __u64 v; __asm__ volatile ("movq %%cr3,%0" : "=r" (v)); return v; } |
| static inline __u32 read_cr3(void) { __u64 v; __asm__ volatile ("movq %%cr3,%0" : "=r" (v)); return v; } |
| /** Set priority level low |
| * |
| * Enable interrupts and return previous |
| * value of EFLAGS. |
| */ |
| extern size_t interrupt_handler_size; |
| extern void interrupt_handlers(void); |
| /SPARTAN/trunk/arch/amd64/include/pm.h |
|---|
| 86,16 → 86,16 |
| unsigned base_0_15: 16; |
| unsigned base_16_23: 8; |
| unsigned type: 4; |
| unsigned : 1; |
| unsigned reserve1 : 1; |
| unsigned dpl : 2; |
| unsigned present : 1; |
| unsigned limit_16_19: 4; |
| unsigned available: 1; |
| unsigned : 2; |
| unsigned reserve2: 2; |
| unsigned granularity : 1; |
| unsigned base_24_31: 8; |
| unsigned base_32_63 : 32; |
| unsigned : 32; |
| unsigned reserve3 : 32; |
| } __attribute__ ((packed)); |
| struct idescriptor { |
| 107,8 → 107,8 |
| unsigned dpl: 2; |
| unsigned present : 1; |
| unsigned offset_16_31: 16; |
| unsigned offset_32_63: 32; |
| unsigned : 32; |
| unsigned offset_32_63: 16; |
| unsigned reserved : 32; |
| } __attribute__ ((packed)); |
| struct ptr_16_64 { |
| /SPARTAN/trunk/arch/amd64/Makefile.inc |
|---|
| 30,5 → 30,4 |
| arch/interrupt.c \ |
| arch/mm/frame.c \ |
| arch/mm/page.c \ |
| arch/mm/tlb.c \ |
| arch/asm_utils.S |
| arch/mm/tlb.c |
| /SPARTAN/trunk/arch/amd64/src/asm_utils.S |
|---|
| File deleted |
| /SPARTAN/trunk/arch/amd64/src/boot/memmap.S |
|---|
| 116,7 → 116,7 |
| #memory size in 1 kb chunks |
| e801memorysize: |
| .long 0x0 |
| .long 0 |
| e820counter: |
| .byte 0x0 |
| /SPARTAN/trunk/arch/amd64/src/dummy.s |
|---|
| 30,6 → 30,7 |
| .global userspace |
| .global before_thread_runs_arch |
| .global panic_printf |
| .global cpu_identify |
| .global cpu_arch_init |
| .global cpu_sleep |
| 36,11 → 37,14 |
| .global cpu_print_report |
| .global arch_late_init |
| .global calibrate_delay_loop |
| .global cpu_halt |
| .global dummy |
| .global rdtsc |
| .global reset_TS_flag |
| .global fpu_init |
| .global interrupt_handler_size |
| .global interrupt_handlers |
| .global memory_print_map |
| .global get_memory_size |
| 48,10 → 52,13 |
| movq $4*1024*1024, %rax |
| ret |
| interrupt_handler_size: |
| interrupt_handlers: |
| rdtsc: |
| before_thread_runs_arch: |
| userspace: |
| calibrate_delay_loop: |
| panic_printf: |
| cpu_identify: |
| cpu_arch_init: |
| cpu_sleep: |
| 58,6 → 65,7 |
| cpu_print_report: |
| arch_late_init: |
| calibrate_delay_loop: |
| cpu_halt: |
| reset_TS_flag: |
| fpu_init: |
| memory_print_map: |
| /SPARTAN/trunk/arch/amd64/src/pm.c |
|---|
| 180,7 → 180,7 |
| } |
| trap_register(13, gp_fault); |
| trap_register( 7, nm_fault); |
| trap_register(12, ss_fault); |
| trap_register(12, ss_fault); |
| } |