WebSVN – HelenOS – Path Comparison – / – /SPARTAN/trunk/arch/ Rev HEAD and /SPARTAN/trunk/arch Rev 152

Ignore whitespace Rev HEAD → Rev 152

 /SPARTAN/trunk/arch/ia64/_link.ld
 ,0 → 1,38
+/*
+ *  IA-64 linker script
+ *
+ *  It is ELF format, but its only section looks like this:
+ *  kernel text
+ *  kernel data
+ *
+ */
+OUTPUT_FORMAT(elf64-ia64-little)
+ENTRY(kernel_image_start)
+SECTIONS {
+    .image 0x0000000000001000: AT (0x0000000000001000) {
+        ktext_start = .;
+        *(K_TEXT_START);
+        *(.text)
+        ktext_end = .;
+        kdata_start = .;
+        *(K_DATA_START)
+        *(.rodata .rodata.*)
+        *(.opd)
+        *(.data)
+        *(.got .got.*)
+        *(.sdata)
+        *(.sbss)
+        *(.scommon)
+        *(.bss)
+        *(COMMON);
+        kdata_end = .;
+    }
+    _hardcoded_ktext_size = ktext_end - ktext_start;
+    _hardcoded_kdata_size = kdata_end - kdata_start;
+    _hardcoded_load_address = 0x0000000000001000;
+}

 /SPARTAN/trunk/arch/ia64/Makefile.inc
 ,0 → 1,25
+IA-64_TARGET=ia64-pc-linux-gnu
+IA-64_CC_DIR=/usr/local/ia64/bin
+IA-64_BINUTILS_DIR=/usr/local/ia64/bin
+CC=$(IA-64_CC_DIR)/$(IA-64_TARGET)-gcc
+AS=$(IA-64_BINUTILS_DIR)/$(IA-64_TARGET)-as
+LD=$(IA-64_BINUTILS_DIR)/$(IA-64_TARGET)-ld
+ASFLAGS=-mconstant-gp
+DEFS=-DARCH=$(ARCH)
+CPPFLAGS=$(DEFS) -nostdinc -I../include
+CFLAGS=$(CPPFLAGS) -mconstant-gp -nostdlib -fno-builtin -fno-unwind-tables -Wmissing-prototypes -Werror -O3
+LFLAGS=-EL -M -T ../arch/ia64/_link.ld
+arch_sources= \
+    arch/start.S \
+    arch/asm.S \
+    arch/fake.s \
+    arch/putchar.c \
+    arch/ia64.c \
+    arch/fpu_context.c \
+    arch/context.S \
+    arch/ski/ski.c

 /SPARTAN/trunk/arch/ia64/include/mm/memory_init.h
 ,0 → 1,36
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __ia64_MEMORY_INIT_H__
+#define __ia64_MEMORY_INIT_H__
+#include <config.h>
+#define get_memory_size()   CONFIG_MEMORY_SIZE
+#endif

 /SPARTAN/trunk/arch/ia64/include/mm/page.h
 ,0 → 1,75
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __ia64_PAGE_H__
+#define __ia64_PAGE_H__
+#include <arch/types.h>
+#include <arch/mm/frame.h>
+#define PAGE_SIZE   FRAME_SIZE
+#define KA2PA(x)    ((x)-0x8000000000000000)
+#define PA2KA(x)    ((x)+0x8000000000000000)
+#define page_arch_init()    ;
+/*
+ * Implementation of generic 4-level page table interface.
+ * TODO: this is a fake implementation provided to satisfy the compiler
+ */
+#define PTL0_INDEX_ARCH(vaddr)  0
+#define PTL1_INDEX_ARCH(vaddr)  0
+#define PTL2_INDEX_ARCH(vaddr)  0
+#define PTL3_INDEX_ARCH(vaddr)  0
+#define GET_PTL0_ADDRESS_ARCH()         ((pte_t *) 0)
+#define GET_PTL1_ADDRESS_ARCH(ptl0, i)      ((pte_t *) 0)
+#define GET_PTL2_ADDRESS_ARCH(ptl1, i)      ((pte_t *) 0)
+#define GET_PTL3_ADDRESS_ARCH(ptl2, i)      ((pte_t *) 0)
+#define GET_FRAME_ADDRESS_ARCH(ptl3, i)     ((pte_t *) 0)
+#define SET_PTL0_ADDRESS_ARCH(ptl0)
+#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a)
+#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
+#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
+#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a)
+#define GET_PTL1_FLAGS_ARCH(ptl0, i)        0
+#define GET_PTL2_FLAGS_ARCH(ptl1, i)        0
+#define GET_PTL3_FLAGS_ARCH(ptl2, i)        0
+#define GET_FRAME_FLAGS_ARCH(ptl3, i)       0
+#define SET_PTL1_FLAGS_ARCH(ptl0, i, x)
+#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
+#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
+#define SET_FRAME_FLAGS_ARCH(ptl3, i, x)
+typedef __u64 pte_t;
+#endif

 /SPARTAN/trunk/arch/ia64/include/mm/vm.h
 ,0 → 1,43
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __ia64_VM_H__
+#define __ia64_VM_H__
+#include <arch/types.h>
+#define KERNEL_ADDRESS_SPACE_START_ARCH     (__address) 0x8000000000000000
+#define KERNEL_ADDRESS_SPACE_END_ARCH       (__address) 0xffffffffffffffff
+#define USER_ADDRESS_SPACE_START_ARCH       (__address) 0x0000000000000000
+#define USER_ADDRESS_SPACE_END_ARCH     (__address) 0x7fffffffffffffff
+#define UTEXT_ADDRESS_ARCH  0x0000000000001000
+#define USTACK_ADDRESS_ARCH (0x7fffffffffffffff-(PAGE_SIZE-1))
+#define UDATA_ADDRESS_ARCH  0x0000000001001000
+#endif

 /SPARTAN/trunk/arch/ia64/include/mm/frame.h
 ,0 → 1,36
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __ia64_FRAME_H__
+#define __ia64_FRAME_H__
+#define FRAME_SIZE      (16*1024)
+extern void frame_arch_init(void);
+#endif

 /SPARTAN/trunk/arch/ia64/include/atomic.h
 ,0 → 1,45
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __ia64_ATOMIC_H__
+#define __ia64_ATOMIC_H__
+/*
+ * TODO: these are just placeholders for real implementations of atomic_inc and atomic_dec.
+ * WARNING: the following functions cause the code to be preemption-unsafe !!!
+ */
+static inline atomic_inc(volatile int *val) {
+    *val++;
+}
+static inline atomic_dec(volatile int *val) {
+    *val--;
+}
+#endif

 /SPARTAN/trunk/arch/ia64/include/context.h
 ,0 → 1,121
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __ia64_CONTEXT_H__
+#define __ia64_CONTEXT_H__
+#include <arch/types.h>
+/*
+ * context_save() and context_restore() are both leaf procedures.
+ * No need to allocate scratch area.
+ */
+#define SP_DELTA    0
+#ifdef context_set
+#undef context_set
+#endif
+#define context_set(c, _pc, stack, size)    \
+    (c)->pc = (__address) _pc;      \
+    (c)->bsp = (__address) stack;       \
+    (c)->sp = ((__address) stack) + (size) - SP_DELTA;
+struct context {
+    /*
+     * Application registers
+     */
+    __u64 ar_pfs;
+    __u64 ar_unat_caller;
+    __u64 ar_unat_callee;
+    __u64 ar_rsc;
+    __u64 bsp;  /* ar_bsp */
+    __u64 ar_rnat;
+    __u64 ar_lc;
+    __u64 ar_ec;
+    __u64 ar_ccv;
+    __u64 ar_csd;
+    __u64 ar_ssd;
+    /*
+     * General registers
+     */
+    __u64 r1;
+    __u64 r2;
+    __u64 r3;
+    __u64 r4;
+    __u64 r5;
+    __u64 r6;
+    __u64 r7;
+    __u64 r8;
+    __u64 r9;
+    __u64 r10;
+    __u64 r11;
+    __u64 sp;       /* r12 */
+    __u64 r13;
+    __u64 r14;
+    __u64 r15;
+    __u64 r16;
+    __u64 r17;
+    __u64 r18;
+    __u64 r19;
+    __u64 r20;
+    __u64 r21;
+    __u64 r22;
+    __u64 r23;
+    __u64 r24;
+    __u64 r25;
+    __u64 r26;
+    __u64 r27;
+    __u64 r28;
+    __u64 r29;
+    __u64 r30;
+    __u64 r31;
+    /*
+     * Branch registers
+     */
+    __u64 pc;       /* b0 */
+    __u64 b1;
+    __u64 b2;
+    __u64 b3;
+    __u64 b4;
+    __u64 b5;
+    __u64 b6;
+    __u64 b7;
+    /*
+     * Predicate registers
+     */
+    __u64 pr;
+    pri_t pri;
+} __attribute__ ((packed));
+#endif

 /SPARTAN/trunk/arch/ia64/include/fpu_context.h
 ,0 → 1,39
+/*
+ * Copyright (C) 2005 Jakub Vana
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __ia64_FPU_CONTEXT_H__
+#define __ia64_FPU_CONTEXT_H__
+#include <arch/types.h>
+struct fpu_context {
+/* TODO: define IA-64 FPU context */
+};
+#endif

 /SPARTAN/trunk/arch/ia64/include/types.h
 ,0 → 1,47
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __TYPES_H__
+#define __TYPES_H__
+#define NULL    0
+typedef signed char __s8;
+typedef unsigned char __u8;
+typedef unsigned short __u16;
+typedef unsigned long __u32;
+typedef long long __u64;
+typedef __u64 __address;
+typedef __u64 pri_t;
+typedef __u64 __native;
+#endif

 /SPARTAN/trunk/arch/ia64/include/ski/ski.h
 ,0 → 1,38
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __SKI_H__
+#define __SKI_H__
+#define SKI_INIT_CONSOLE    20
+#define SKI_PUTCHAR     31
+extern void ski_init_console(void);
+extern void ski_putchar(const char ch);
+#endif

 /SPARTAN/trunk/arch/ia64/include/faddr.h
 ,0 → 1,56
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __ia64_FADDR_H__
+#define __ia64_FADDR_H__
+#include <arch/types.h>
+static __address FADDR(void (* fptr)(void));
+/**
+ *
+ * Calculate absolute address of function
+ * referenced by fptr pointer.
+ *
+ * @param fptr Function pointer.
+ *
+ */
+inline __address FADDR(void (* fptr)(void)) {
+    __address faddr;
+    __asm__(
+        "ld8 %0 = [%1]\n\t"
+        : "=r" (faddr)
+        : "r" (fptr)
+    );
+    return faddr;
+}
+#endif

 /SPARTAN/trunk/arch/ia64/include/arg.h
 ,0 → 1,34
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __ia64_ARG_H__
+#define __ia64_ARG_H__
+#include <stdarg.h>
+#endif

/SPARTAN/trunk/arch/ia64/include/asm.h
--- ia64/include/cpu.h (nonexistent)
+++ ia64/include/cpu.h (revision 152)
@@ -0,0 +1,39 @@
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __ia64_CPU_H__
+#define __ia64_CPU_H__
+
+#include <typedefs.h>
+
+#define CPU_ID_ARCH 0
+
+struct cpu_arch {
+};
+
+#endif

 /SPARTAN/trunk/arch/ia64/include/thread.h
 ,0 → 1,34
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __ia64_THREAD_H__
+#define __ia64_THREAD_H__
+#define ARCH_THREAD_DATA struct { } arch_thread_data;
+#endif

 /SPARTAN/trunk/arch/ia64/boot/_link.ld
 ,0 → 1,72
+OUTPUT_FORMAT(elf64-ia64-little)
+ENTRY(start)
+SECTIONS {
+    .image 0x0000000000000000: AT (0x0000000000000000) {
+        *(.text .stub .text.* .gnu.linkonce.t.*)
+        *(.interp)
+        *(.hash)
+        *(.dynsym)
+        *(.dynstr)
+        *(.rel.init)
+        *(.rela.init)
+        *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*)
+        *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*)
+        *(.rel.fini)
+        *(.rela.fini)
+        *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*)
+        *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*)
+        *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*)
+        *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*)
+        *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*)
+        *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*)
+        *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*)
+        *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*)
+        *(.rel.got)
+        *(.rela.got)
+        *(.rel.sdata .rel.sdata.* .rel.gnu.linkonce.s.*)
+        *(.rela.sdata .rela.sdata.* .rela.gnu.linkonce.s.*)
+        *(.rel.sbss .rel.sbss.* .rel.gnu.linkonce.sb.*)
+        *(.rela.sbss .rela.sbss.* .rela.gnu.linkonce.sb.*)
+        *(.rel.sdata2 .rel.sdata2.* .rel.gnu.linkonce.s2.*)
+        *(.rela.sdata2 .rela.sdata2.* .rela.gnu.linkonce.s2.*)
+        *(.rel.sbss2 .rel.sbss2.* .rel.gnu.linkonce.sb2.*)
+        *(.rela.sbss2 .rela.sbss2.* .rela.gnu.linkonce.sb2.*)
+        *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*)
+        *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*)
+        *(.rel.plt)
+        *(.rela.plt)
+        *(.rela.IA_64.pltoff)
+        *(.init)
+        *(.plt)
+        *(.fini)
+        *(.rodata .rodata.* .gnu.linkonce.r.*)
+        *(.rodata1)
+        *(.sdata2 .sdata2.* .gnu.linkonce.s2.*)
+        *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*)
+        *(.opd)
+        *(.IA_64.unwind_info* .gnu.linkonce.ia64unwi.*)
+        *(.IA_64.unwind* .gnu.linkonce.ia64unw.*)
+        *(.eh_frame_hdr)
+        *(.preinit_array)
+        *(.init_array)
+        *(.fini_array)
+        *(.data .data.* .gnu.linkonce.d.*)
+        *(.data1)
+        *(.tdata .tdata.* .gnu.linkonce.td.*)
+        *(.tcommon)
+        *(.eh_frame)
+        *(.gcc_except_table)
+        *(.dynamic)
+        *(.jcr)
+        *(.got)
+        *(.IA_64.pltoff)
+        *(.sdata .sdata.* .gnu.linkonce.s.*)
+        *(.dynsbss)
+        *(.sbss .sbss.* .gnu.linkonce.sb.*)
+        *(.scommon)
+        *(.dynbss)
+        *(.bss .bss.* .gnu.linkonce.b.*)
+        *(COMMON)
+    }
+}

 /SPARTAN/trunk/arch/ia64/boot/boot.s
 ,0 → 1,33
+#
+# Copyright (C) 2005 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.global start
+start:
+    brl 0x0000000000001000

 /SPARTAN/trunk/arch/ia64/boot/Makefile
 ,0 → 1,24
+IA-64_BINUTILS_DIR=/usr/local/ia64/bin
+IA-64_TARGET=ia64-pc-linux-gnu
+.PHONY: nothing build
+nothing:
+build: boot.bin
+    cp boot.bin ../../../src/load.bin
+AS=$(IA-64_BINUTILS_DIR)/$(IA-64_TARGET)-as
+LD=$(IA-64_BINUTILS_DIR)/$(IA-64_TARGET)-ld
+ASFLAGS=-EL
+LFLAGS=-EL -T _link.ld -n
+boot.bin: boot.o
+    $(LD) $(LFLAGS) boot.o -o $@
+boot.o:
+    $(AS) boot.s -o $@
+clean:
+    -rm *.o *.bin

 /SPARTAN/trunk/arch/ia64/src/fake.s
 ,0 → 1,61
+#
+# Copyright (C) 2005 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.global calibrate_delay_loop
+.global asm_delay_loop
+.global userspace
+.global before_thread_runs_arch
+.global arch_late_init
+.global cpu_arch_init
+.global cpu_identify
+.global cpu_print_report
+.global cpu_priority_high
+.global cpu_priority_low
+.global cpu_priority_read
+.global cpu_priority_restore
+.global cpu_sleep
+.global frame_arch_init
+before_thread_runs_arch:
+userspace:
+calibrate_delay_loop:
+asm_delay_loop:
+arch_late_init:
+cpu_arch_init:
+cpu_identify:
+cpu_print_report:
+cpu_priority_high:
+cpu_priority_low:
+cpu_priority_read:
+cpu_priority_restore:
+cpu_sleep:
+frame_arch_init:
+    br.ret.sptk.many b0

 /SPARTAN/trunk/arch/ia64/src/start.S
 ,0 → 1,71
+#
+# Copyright (C) 2005 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.section K_TEXT_START
+.global kernel_image_start
+stack0:
+kernel_image_start:
+    .auto
+    # initialize PSR
+    mov psr.l = r0
+    # initialize register stack
+    mov ar.rsc = r0
+    mov ar.bspstore = r0
+    loadrs
+    .explicit
+    # initialize memory stack to some sane value
+    movl r12 = stack0   ;;
+    add r12 = - 16, r12 /* allocate a scratch area on the stack */
+    # initialize gp (Global Pointer) register
+    movl r1 = _hardcoded_load_address
+    ;;
+    #
+    # Initialize hardcoded_* variables.
+    #
+    movl r14 = _hardcoded_ktext_size
+    movl r15 = _hardcoded_kdata_size
+    movl r16 = _hardcoded_load_address
+    addl r17 = @gprel(hardcoded_ktext_size), gp
+    addl r18 = @gprel(hardcoded_kdata_size), gp
+    addl r19 = @gprel(hardcoded_load_address), gp
+    ;;
+    st4 [r17] = r14
+    st4 [r18] = r15
+    st8 [r19] = r16
+    br.call.sptk.many b0=main_bsp
+:
+    br 0b

 /SPARTAN/trunk/arch/ia64/src/fpu_context.c
 ,0 → 1,48
+/*
+ * Copyright (C) 2005 Jakub Vana
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#include <fpu_context.h>
+void fpu_context_save(fpu_context_t *fctx)
+{
+}
+void fpu_context_restore(fpu_context_t *fctx)
+{
+}
+void fpu_lazy_context_save(fpu_context_t *fctx)
+{
+}
+void fpu_lazy_context_restore(fpu_context_t *fctx)
+{
+}

 /SPARTAN/trunk/arch/ia64/src/asm.S
 ,0 → 1,59
+#
+# Copyright (C) 2005 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.global memcpy
+memcpy:
+    /*
+     * Switch the role of first two arguments
+     */
+    sub r33 = r33, r32  ;;
+    add r32 = r32, r33  ;;
+    sub r33 = r32, r33
+    br _memcopy
+.global memcopy
+memcopy:
+    br _memcopy
+.global memsetb
+memsetb:
+    br _memsetb
+.global cpu_halt
+cpu_halt:
+    br cpu_halt
+.global panic_printf
+panic_printf:
+    {
+        br.call.sptk.many b0=printf
+    }
+    br cpu_halt

 /SPARTAN/trunk/arch/ia64/src/ia64.c
 ,0 → 1,39
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <arch.h>
+#include <arch/ski/ski.h>
+void arch_pre_mm_init(void)
+{
+    ski_init_console();
+}
+void arch_post_mm_init(void)
+{
+}

 /SPARTAN/trunk/arch/ia64/src/context.S
 ,0 → 1,256
+#
+# Copyright (C) 2005 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.global context_save
+.global context_restore
+context_save:
+    alloc loc0 = ar.pfs, 1, 11, 0, 0
+    mov loc1 = ar.unat  ;;
+    /* loc2 */
+    mov loc3 = ar.rsc
+    .auto
+    /*
+     * Flush dirty registers to backing store.
+     * After this ar.bsp and ar.bspstore are equal.
+     */
+    flushrs
+    mov loc4 = ar.bsp
+    /*
+     * Put RSE to enforced lazy mode.
+     * So that ar.rnat can be read.
+     */
+    movl loc5 = ~3
+    and loc5 = loc3, loc5
+    mov ar.rsc = loc5
+    mov loc5 = ar.rnat
+    .explicit
+    mov loc6 = ar.lc
+    mov loc7 = ar.ec
+    mov loc8 = ar.ccv
+    mov loc9 = ar.csd
+    mov loc10 = ar.ssd
+    /*
+     * Save application registers
+     */
+    st8 [in0] = loc0, 8 ;;  /* save ar.pfs */
+    st8 [in0] = loc1, 8 ;;  /* save ar.unat (caller) */
+    mov loc2 = in0      ;;
+    add in0 = 8, in0    ;;  /* skip ar.unat (callee) */
+    st8 [in0] = loc3, 8 ;;  /* save ar.rsc */
+    st8 [in0] = loc4, 8 ;;  /* save ar.bsp */
+    st8 [in0] = loc5, 8 ;;  /* save ar.rnat */
+    st8 [in0] = loc6, 8 ;;  /* save ar.lc */
+    st8 [in0] = loc7, 8 ;;  /* save ar.ec */
+    st8 [in0] = loc8, 8 ;;  /* save ar.ccv */
+    st8 [in0] = loc9, 8 ;;  /* save ar.csd */
+    st8 [in0] = loc10, 8    ;;  /* save ar.ssd */
+    /*
+     * Save general registers including NaT bits
+     */
+    st8.spill [in0] = r1, 8     ;;
+    st8.spill [in0] = r2, 8     ;;
+    st8.spill [in0] = r3, 8     ;;
+    st8.spill [in0] = r4, 8     ;;
+    st8.spill [in0] = r5, 8     ;;
+    st8.spill [in0] = r6, 8     ;;
+    st8.spill [in0] = r7, 8     ;;
+    st8.spill [in0] = r8, 8     ;;
+    st8.spill [in0] = r9, 8     ;;
+    st8.spill [in0] = r10, 8    ;;
+    st8.spill [in0] = r11, 8    ;;
+    st8.spill [in0] = r12, 8    ;;  /* save sp */
+    st8.spill [in0] = r13, 8    ;;
+    st8.spill [in0] = r14, 8    ;;
+    st8.spill [in0] = r15, 8    ;;
+    st8.spill [in0] = r16, 8    ;;
+    st8.spill [in0] = r17, 8    ;;
+    st8.spill [in0] = r18, 8    ;;
+    st8.spill [in0] = r19, 8    ;;
+    st8.spill [in0] = r20, 8    ;;
+    st8.spill [in0] = r21, 8    ;;
+    st8.spill [in0] = r22, 8    ;;
+    st8.spill [in0] = r23, 8    ;;
+    st8.spill [in0] = r24, 8    ;;
+    st8.spill [in0] = r25, 8    ;;
+    st8.spill [in0] = r26, 8    ;;
+    st8.spill [in0] = r27, 8    ;;
+    st8.spill [in0] = r28, 8    ;;
+    st8.spill [in0] = r29, 8    ;;
+    st8.spill [in0] = r30, 8    ;;
+    st8.spill [in0] = r31, 8    ;;
+    mov loc3 = ar.unat      ;;
+    st8 [loc2] = loc3       /* save ar.unat (callee) */
+    /*
+     * Save branch registers
+     */
+    mov loc2 = b0       ;;
+    st8 [in0] = loc2, 8     /* save pc */
+    mov loc3 = b1       ;;
+    st8 [in0] = loc3, 8
+    mov loc4 = b2       ;;
+    st8 [in0] = loc4, 8
+    mov loc5 = b3       ;;
+    st8 [in0] = loc5, 8
+    mov loc6 = b4       ;;
+    st8 [in0] = loc6, 8
+    mov loc7 = b5       ;;
+    st8 [in0] = loc7, 8
+    mov loc8 = b6       ;;
+    st8 [in0] = loc8, 8
+    mov loc9 = b7       ;;
+    st8 [in0] = loc9, 8
+    /*
+     * Save predicate registers
+     */
+    mov loc2 = pr       ;;
+    st8 [in0] = loc2, 8
+    mov ar.pfs = loc0
+    mov ar.unat = loc1
+    add r8 = r0, r0, 1      /* context_save returns 1 */
+    br.ret.sptk.many b0
+context_restore:
+    alloc loc0 = ar.pfs, 1, 11, 0, 0    ;;
+    ld8 loc0 = [in0], 8 ;;  /* load ar.pfs */
+    ld8 loc1 = [in0], 8 ;;  /* load ar.unat (caller) */
+    ld8 loc2 = [in0], 8 ;;  /* load ar.unat (callee) */
+    ld8 loc3 = [in0], 8 ;;  /* load ar.rsc */
+    ld8 loc4 = [in0], 8 ;;  /* load ar.bsp */
+    ld8 loc5 = [in0], 8 ;;  /* load ar.rnat */
+    ld8 loc6 = [in0], 8 ;;  /* load ar.lc */
+    ld8 loc7 = [in0], 8 ;;  /* load ar.ec */
+    ld8 loc8 = [in0], 8 ;;  /* load ar.ccv */
+    ld8 loc9 = [in0], 8 ;;  /* load ar.csd */
+    ld8 loc10 = [in0], 8    ;;  /* load ar.ssd */
+    .auto
+    /*
+     * Invalidate the ALAT
+     */
+    invala
+    /*
+     * Restore application registers
+     */
+    mov ar.bspstore = loc4
+    mov ar.rnat = loc5
+    mov ar.pfs = loc0
+    mov ar.rsc = loc3
+    .explicit
+    mov ar.unat = loc2  ;;
+    mov ar.lc = loc6
+    mov ar.ec = loc7
+    mov ar.ccv = loc8
+    mov ar.csd = loc9
+    mov ar.ssd = loc10
+    /*
+     * Restore general registers including NaT bits
+     */
+    ld8.fill r1 = [in0], 8  ;;
+    ld8.fill r2 = [in0], 8  ;;
+    ld8.fill r3 = [in0], 8  ;;
+    ld8.fill r4 = [in0], 8  ;;
+    ld8.fill r5 = [in0], 8  ;;
+    ld8.fill r6 = [in0], 8  ;;
+    ld8.fill r7 = [in0], 8  ;;
+    ld8.fill r8 = [in0], 8  ;;
+    ld8.fill r9 = [in0], 8  ;;
+    ld8.fill r10 = [in0], 8 ;;
+    ld8.fill r11 = [in0], 8 ;;
+    ld8.fill r12 = [in0], 8 ;;  /* restore sp */
+    ld8.fill r13 = [in0], 8 ;;
+    ld8.fill r14 = [in0], 8 ;;
+    ld8.fill r15 = [in0], 8 ;;
+    ld8.fill r16 = [in0], 8 ;;
+    ld8.fill r17 = [in0], 8 ;;
+    ld8.fill r18 = [in0], 8 ;;
+    ld8.fill r19 = [in0], 8 ;;
+    ld8.fill r20 = [in0], 8 ;;
+    ld8.fill r21 = [in0], 8 ;;
+    ld8.fill r22 = [in0], 8 ;;
+    ld8.fill r23 = [in0], 8 ;;
+    ld8.fill r24 = [in0], 8 ;;
+    ld8.fill r25 = [in0], 8 ;;
+    ld8.fill r26 = [in0], 8 ;;
+    ld8.fill r27 = [in0], 8 ;;
+    ld8.fill r28 = [in0], 8 ;;
+    ld8.fill r29 = [in0], 8 ;;
+    ld8.fill r30 = [in0], 8 ;;
+    ld8.fill r31 = [in0], 8 ;;
+    /*
+     * Restore branch registers
+     */
+    ld8 loc2 = [in0], 8 ;;  /* restore pc */
+    mov b0 = loc2
+    ld8 loc3 = [in0], 8 ;;
+    mov b1 = loc3
+    ld8 loc4 = [in0], 8 ;;
+    mov b2 = loc4
+    ld8 loc5 = [in0], 8 ;;
+    mov b3 = loc5
+    ld8 loc6 = [in0], 8 ;;
+    mov b4 = loc6
+    ld8 loc7 = [in0], 8 ;;
+    mov b5 = loc7
+    ld8 loc8 = [in0], 8 ;;
+    mov b6 = loc8
+    ld8 loc9 = [in0], 8 ;;
+    mov b7 = loc9
+    /*
+     * Restore predicate registers
+     */
+    ld8 loc2 = [in0], 8 ;;
+    mov pr = loc2, ~0
+    mov ar.unat = loc1
+    mov r8 = r0         /* context_restore returns 0 */
+    br.ret.sptk.many b0

 /SPARTAN/trunk/arch/ia64/src/ski/ski.c
 ,0 → 1,66
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <arch/ski/ski.h>
+/** Initialize debug console
+ *
+ * Issue SSC (Simulator System Call) to
+ * to open debug console.
+ */
+void ski_init_console(void)
+{
+    __asm__ (
+        "mov r15=%0\n"
+        "break 0x80000\n"
+        :
+        : "i" (SKI_INIT_CONSOLE)
+        : "r15", "r8"
+    );
+}
+/** Display character on debug console
+ *
+ * Use SSC (Simulator System Call) to
+ * display character on debug console.
+ *
+ * @param ch   Character to be printed.
+ */
+void ski_putchar(const char ch)
+{
+    __asm__ (
+        "mov r15=%0\n"
+        "mov r32=%1\n"      /* r32 is in0 */
+        "break 0x80000\n"   /* modifies r8 */
+        :
+        : "i" (SKI_PUTCHAR), "r" (ch)
+        : "r15", "in0", "r8"
+    );
+    if (ch == '\n') ski_putchar('\r');
+}

 /SPARTAN/trunk/arch/ia64/src/putchar.c
 ,0 → 1,35
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <putchar.h>
+#include <arch/ski/ski.h>
+void putchar(const char ch)
+{
+    ski_putchar(ch);
+}

 /SPARTAN/trunk/arch/ia32/src/boot/memmap.S
 ,0 → 1,125
+/*
+ * Copyright (C) 2005 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <arch/boot/memmapasm.h>
+E820_RECORD_SIZE = MEMMAP_E820_RECORD_SIZE
+E820_MAX_RECORDS = MEMMAP_E820_MAX_RECORDS
+E820_SMAP = 0x534d4150
+.global memmap_arch_init
+.global e820counter
+.global e820table
+.global e801memorysize
+.code16
+.section K_TEXT_START_2
+memmap_arch_init:
+e820begin:
+    xorl    %ebx,%ebx   # during first call, ebx must be 0
+    movw    %bx,%ds
+    movw    %bx,%es
+    movw    $e820table,%di
+    movb    $E820_MAX_RECORDS,e820counter
+e820loop:
+    movl    $E820_SMAP,%edx     # control sequence "SMAP"
+    movl    $0x0000e820,%eax    # service
+    movl    $E820_RECORD_SIZE,%ecx
+    int     $0x15
+    jc  e820err
+    cmpl    $E820_SMAP,%eax     # verifying BIOS
+    jne e820err
+    cmpl    $E820_RECORD_SIZE,%ecx
+    jne e820err         # bad record size - bug in bios
+    movw    %di,%ax     # next record
+    addw    $E820_RECORD_SIZE,%ax
+    movw    %ax,%di
+    decb    e820counter # buffer is full
+    jz  e820end
+    cmpl    $0,%ebx
+    jne e820loop
+e820end:
+    movb    $E820_MAX_RECORDS,%al
+    subb    e820counter,%al
+    movb    %al,e820counter # store # of valid entries in e820counter
+    jmp e801begin
+e820err:
+    movb    $0,e820counter
+# method e801 - get size of memory
+e801begin:
+    xorw    %dx,%dx
+    xorw    %cx,%cx
+    xorw    %bx,%bx
+    movw    $0xe801,%ax
+    stc
+    int $0x15
+    jc  e801end
+            # fix problem with some BIOSes which use ax:bx rather than cx:dx
+    testw   %cx,%cx
+    jnz e801cxdx
+    testw   %dx,%dx
+    jnz e801cxdx
+    movw    %ax,%cx
+    movw    %bx,%dx
+e801cxdx:
+    andl    $0xffff,%edx
+    shll    $6,%edx
+    andl    $0xffff,%ecx
+    addl    %ecx,%edx
+    addl    $0x0400,%edx  # add lower 1 MB - it's not included by e801 method
+    movl    %edx,e801memorysize
+e801end:
+    ret
+    #memory size in 1 kb chunks
+e801memorysize:
+    .long   0
+e820counter:
+    .byte 0xff
+e820table:
+    .space  (32*E820_RECORD_SIZE),0xff # space for 32 records, each E820_RECORD_SIZE bytes long

 /SPARTAN/trunk/arch/ia32/src/boot/boot.S
 ,0 → 1,105
+#
+# Copyright (C) 2001-2004 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.section K_TEXT_START
+.global kernel_image_start
+.code16
+#
+# This is where we require any SPARTAN-kernel-compatible boot loader
+# to pass control in real mode.
+#
+# Protected mode tables are statically initialised during compile
+# time. So we can just load the respective table registers and
+# switch to protected mode.
+#
+kernel_image_start:
+    call memmap_arch_init
+    cli
+    xorw %ax,%ax
+    movw %ax,%ds
+    lgdt gdtr
+    movl %cr0,%eax
+    orl $0x1,%eax
+    movl %eax,%cr0
+    jmpl $8,$meeting_point
+meeting_point:
+.code32
+    movw $16,%ax
+    movw %ax,%es
+    movw %ax,%gs
+    movw %ax,%fs
+    movw %ax,%ds            # kernel data + stack
+    movw %ax,%ss
+    movl $0x7c00,%esp
+    lidt idtr
+    call map_kernel
+    movl $_hardcoded_ktext_size, hardcoded_ktext_size
+    movl $_hardcoded_kdata_size, hardcoded_kdata_size
+    movl $_hardcoded_load_address, hardcoded_load_address
+    call main_bsp           # never returns
+    cli
+    hlt
+.global map_kernel
+map_kernel:
+    #
+    # Here we setup mapping for both the unmapped and mapped sections of the kernel.
+    # For simplicity, we set only one 4M page for 0x00000000 and one for 0x80000000.
+    #
+    movl %cr4, %ecx
+    orl $(1<<4), %ecx
+    movl %ecx, %cr4             # turn PSE on
+    movl $((1<<7)|(1<<0)), %eax
+    movl %eax, page_directory       # mapping 0x00000000 => 0x00000000
+    movl $(page_directory+(4096/2)), %edx
+    movl %eax, (%edx)           # mapping 0x80000000 => 0x00000000
+    leal page_directory, %eax
+    movl %eax, %cr3
+    # turn on paging
+    movl %cr0, %ebx
+    orl $(1<<31), %ebx
+    movl %ebx, %cr0
+    ret
+.section K_DATA_START
+.align 4096
+page_directory:
+    .space 4096, 0

 /SPARTAN/trunk/arch/ia32/src/mm/memory_init.c
 ,0 → 1,38
+/*
+ * Copyright (C) 2005 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <arch/boot/memmap.h>
+#include <arch/mm/memory_init.h>
+size_t get_memory_size(void)
+{
+    return e801memorysize*1024;
+}

 /SPARTAN/trunk/arch/ia32/src/mm/frame.c
 ,0 → 1,57
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <mm/frame.h>
+#include <arch/mm/frame.h>
+#include <mm/vm.h>
+#include <config.h>
+#include <arch/boot/memmap.h>
+#include <print.h>
+/*
+ * TODO: use the memory map obtained from BIOS
+ */
+void frame_arch_init(void)
+{
+    __u8 i;
+    if (config.cpu_active == 1) {
+        frame_not_free(0x0);
+        frame_region_not_free(0xa0000,0xff000);
+        frame_region_not_free(0xfec00000,0xffffffff);
+        for (i=e820counter;i>0;i--) {
+            // printf("E820 base: %Q size: %Q type: %L \n",e820table[i-1].base_address,e820table[i-1].size,e820table[i-1].type);
+            if (e820table[i-1].type!=MEMMAP_MEMORY_AVAILABLE) {
+                frame_region_not_free(e820table[i-1].base_address,e820table[i-1].size);
+                }
+            }
+    }
+}

 /SPARTAN/trunk/arch/ia32/src/mm/page.c
 ,0 → 1,88
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <arch/types.h>
+#include <config.h>
+#include <func.h>
+#include <mm/frame.h>
+#include <mm/page.h>
+#include <arch/mm/page.h>
+#include <arch/interrupt.h>
+#include <arch/asm.h>
+#include <synch/spinlock.h>
+#include <debug.h>
+/*
+ * Note.
+ * This is the preliminary code for controlling paging mechanism on ia32. It is
+ * needed by other parts of the kernel for its ability to map virtual addresses
+ * to physical. SMP code relies on this feature. Other than that, this code is
+ * by no means meant to implement virtual memory in terms of swapping pages in
+ * and out.
+ */
+__address bootstrap_dba;
+void page_arch_init(void)
+{
+    __address dba;
+    __u32 i;
+    if (config.cpu_active == 1) {
+        dba = frame_alloc(FRAME_KA | FRAME_PANIC);
+        memsetb(dba, PAGE_SIZE, 0);
+        bootstrap_dba = dba;
+        /*
+         * Identity mapping for all frames.
+         * PA2KA(identity) mapping for all frames.
+         */
+        for (i = 0; i < frames; i++) {
+            map_page_to_frame(i * PAGE_SIZE, i * PAGE_SIZE, PAGE_CACHEABLE, KA2PA(dba));
+            map_page_to_frame(PA2KA(i * PAGE_SIZE), i * PAGE_SIZE, PAGE_CACHEABLE, KA2PA(dba));
+        }
+        trap_register(14, page_fault);
+        write_cr3(KA2PA(dba));
+    }
+    else {
+        /*
+         * Application processors need to create their own view of the
+         * virtual address space. Because of that, each AP copies
+         * already-initialized paging information from the bootstrap
+         * processor and adjusts it to fulfill its needs.
+         */
+        dba = frame_alloc(FRAME_KA | FRAME_PANIC);
+        memcopy(bootstrap_dba, dba, PAGE_SIZE);
+        write_cr3(KA2PA(dba));
+    }
+    paging_on();
+}

 /SPARTAN/trunk/arch/ia32/src/mm/tlb.c
 ,0 → 1,35
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <mm/tlb.h>
+#include <arch/asm.h>
+void tlb_invalidate(int asid)
+{
+    write_cr3(read_cr3());
+}

 /SPARTAN/trunk/arch/ia32/src/pm.c
 ,0 → 1,205
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <arch/pm.h>
+#include <config.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#include <arch/interrupt.h>
+#include <arch/asm.h>
+#include <arch/context.h>
+#include <panic.h>
+/*
+ * Early ia32 configuration functions and data structures.
+ */
+/*
+ * We have no use for segmentation so we set up flat mode. In this
+ * mode, we use, for each privilege level, two segments spanning the
+ * whole memory. One is for code and one is for data.
+ */
+struct descriptor gdt[GDT_ITEMS] = {
+    /* NULL descriptor */
+    { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+    /* KTEXT descriptor */
+    { 0xffff, 0, 0, AR_PRESENT | AR_CODE | DPL_KERNEL, 0xf, 0, 0, 1, 1, 0 },
+    /* KDATA descriptor */
+    { 0xffff, 0, 0, AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_KERNEL, 0xf, 0, 0, 1, 1, 0 },
+    /* UTEXT descriptor */
+    { 0xffff, 0, 0, AR_PRESENT | AR_CODE | DPL_USER, 0xf, 0, 0, 1, 1, 0 },
+    /* UDATA descriptor */
+    { 0xffff, 0, 0, AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_USER, 0xf, 0, 0, 1, 1, 0 },
+    /* TSS descriptor - set up will be completed later */
+    { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
+};
+static struct idescriptor idt[IDT_ITEMS];
+static struct tss tss;
+struct tss *tss_p = NULL;
+/* gdtr is changed by kmp before next CPU is initialized */
+struct ptr_16_32 gdtr __attribute__ ((section ("K_DATA_START"))) = { .limit = sizeof(gdt), .base = KA2PA((__address) gdt) };
+struct ptr_16_32 idtr __attribute__ ((section ("K_DATA_START"))) = { .limit = sizeof(idt), .base = KA2PA((__address) idt) };
+void gdt_setbase(struct descriptor *d, __address base)
+{
+    d->base_0_15 = base & 0xffff;
+    d->base_16_23 = ((base) >> 16) & 0xff;
+    d->base_24_31 = ((base) >> 24) & 0xff;
+}
+void gdt_setlimit(struct descriptor *d, __u32 limit)
+{
+    d->limit_0_15 = limit & 0xffff;
+    d->limit_16_19 = (limit >> 16) & 0xf;
+}
+void idt_setoffset(struct idescriptor *d, __address offset)
+{
+    /*
+     * Offset is a linear address.
+     */
+    d->offset_0_15 = offset & 0xffff;
+    d->offset_16_31 = offset >> 16;
+}
+void tss_initialize(struct tss *t)
+{
+    memsetb((__address) t, sizeof(struct tss), 0);
+}
+/*
+ * This function takes care of proper setup of IDT and IDTR.
+ */
+void idt_init(void)
+{
+    struct idescriptor *d;
+    int i;
+    for (i = 0; i < IDT_ITEMS; i++) {
+        d = &idt[i];
+        d->unused = 0;
+        d->selector = selector(KTEXT_DES);
+        d->access = AR_PRESENT | AR_INTERRUPT;  /* masking interrupt */
+        if (i == VECTOR_SYSCALL) {
+            /*
+             * The syscall interrupt gate must be calleable from userland.
+             */
+            d->access |= DPL_USER;
+        }
+        idt_setoffset(d, ((__address) interrupt_handlers) + i*interrupt_handler_size);
+        trap_register(i, null_interrupt);
+    }
+    trap_register(13, gp_fault);
+    trap_register( 7, nm_fault);
+    trap_register(12, ss_fault);
+}
+/* Clean IOPL(12,13) and NT(14) flags in EFLAGS register */
+static void clean_IOPL_NT_flags(void)
+{
+  asm
+    (
+    "pushfl;"
+        "pop %%eax;"
+        "and $0xffff8fff,%%eax;"
+        "push %%eax;"
+        "popfl;"
+        :
+        :
+        :"%eax"
+    );
+}
+/* Clean AM(18) flag in CR0 register */
+static void clean_AM_flag(void)
+{
+  asm
+    (
+    "mov %%cr0,%%eax;"
+        "and $0xFFFBFFFF,%%eax;"
+        "mov %%eax,%%cr0;"
+        :
+        :
+        :"%eax"
+    );
+}
+void pm_init(void)
+{
+    struct descriptor *gdt_p = (struct descriptor *) PA2KA(gdtr.base);
+    /*
+     * Each CPU has its private GDT and TSS.
+     * All CPUs share one IDT.
+     */
+    if (config.cpu_active == 1) {
+        idt_init();
+        /*
+         * NOTE: bootstrap CPU has statically allocated TSS, because
+         * the heap hasn't been initialized so far.
+         */
+        tss_p = &tss;
+    }
+    else {
+        tss_p = (struct tss *) malloc(sizeof(struct tss));
+        if (!tss_p)
+            panic("could not allocate TSS\n");
+    }
+    tss_initialize(tss_p);
+    gdt_p[TSS_DES].access = AR_PRESENT | AR_TSS | DPL_KERNEL;
+    gdt_p[TSS_DES].special = 1;
+    gdt_p[TSS_DES].granularity = 1;
+    gdt_setbase(&gdt_p[TSS_DES], (__address) tss_p);
+    gdt_setlimit(&gdt_p[TSS_DES], sizeof(struct tss) - 1);
+    /*
+     * As of this moment, the current CPU has its own GDT pointing
+     * to its own TSS. We just need to load the TR register.
+     */
+    __asm__("ltr %0" : : "r" ((__u16) selector(TSS_DES)));
+    clean_IOPL_NT_flags();    /* Disable I/O on nonprivileged levels */
+    clean_AM_flag();          /* Disable alignment check */
+}

 /SPARTAN/trunk/arch/ia32/src/userspace.c
 ,0 → 1,66
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <userspace.h>
+#include <arch/pm.h>
+#include <arch/types.h>
+#include <arch.h>
+#include <proc/thread.h>
+#include <mm/vm.h>
+/** Enter userspace
+ *
+ * Change CPU protection level to 3, enter userspace.
+ *
+ */
+void userspace(void)
+{
+    pri_t pri;
+    pri = cpu_priority_high();
+    __asm__ volatile (""
+    /* CLNT */
+        "pushfl;"
+        "pop %%eax;"
+        "and $0xFFFFBFFF,%%eax;"
+        "push %%eax;"
+        "popfl;"
+        "pushl %0\n"
+        "pushl %1\n"
+        "pushl %2\n"
+        "pushl %3\n"
+        "pushl %4\n"
+        "iret"
+        : : "i" (selector(UDATA_DES) | PL_USER), "i" (USTACK_ADDRESS+(THREAD_STACK_SIZE-1)), "r" (pri), "i" (selector(UTEXT_DES) | PL_USER), "i" (UTEXT_ADDRESS));
+    /* Unreachable */
+    for(;;);
+}

 /SPARTAN/trunk/arch/ia32/src/asm.S
 ,0 → 1,399
+#
+# Copyright (C) 2001-2004 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+## very low and hardware-level functions
+#  Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word
+# and 1 means interrupt with error word
+#define ERROR_WORD_INTERRUPT_LIST 0x00027D00
+.text
+.global cpu_halt
+.global cpu_sleep
+.global paging_on
+.global enable_l_apic_in_msr
+.global interrupt_handlers
+.global inb
+.global inw
+.global inl
+.global outb
+.global outw
+.global outl
+.global memcopy
+.global memsetb
+.global memsetw
+.global memcmp
+## Turn paging on
+#
+# Enable paging and write-back caching in CR0.
+#
+paging_on:
+    pushl %eax
+    movl %cr0,%eax
+    orl $(1<<31),%eax       # paging on
+    andl $~((1<<30)|(1<<29)),%eax   # clear Cache Disable and not Write Though
+    movl %eax,%cr0
+    jmp 0f
+:
+    popl %eax
+    ret
+## Enable local APIC
+#
+# Enable local APIC in MSR.
+#
+enable_l_apic_in_msr:
+    pusha
+    movl $0x1b, %ecx
+    rdmsr
+    orl $(1<<11),%eax
+    orl $(0xfee00000),%eax
+    wrmsr
+    popa
+    ret
+## Declare interrupt handlers
+#
+# Declare interrupt handlers for n interrupt
+# vectors starting at vector i.
+#
+# The handlers setup data segment registers
+# and call trap_dispatcher().
+#
+.macro handler i n
+    push %ebp
+    movl %esp,%ebp
+    pusha
+    push %ds
+    push %es
+    # we must fill the data segment registers
+    movw $16,%ax
+    movw %ax,%ds
+    movw %ax,%es
+    movl $(\i),%edi
+    pushl %ebp
+    addl $4,(%esp)
+    pushl %edi
+    call trap_dispatcher
+    addl $8,%esp
+    pop %es
+    pop %ds
+# CLNT
+  pushfl;
+    pop %eax;
+    and $0xFFFFBFFF,%eax;
+    push %eax;
+    popfl;
+# Test if this is interrupt with error word or not
+    mov $\i,%cl;
+    movl $1,%eax;
+    test $0xe0,%cl;
+    jnz 0f;
+    and $0x1f,%cl;
+    shl %cl,%eax;
+    and $ERROR_WORD_INTERRUPT_LIST,%eax;
+    jz 0f;
+# Return with error word
+    popa;
+    pop %ebp;
+    add $4,%esp;    # Skip error word
+    iret;
+:
+# Return with no error word
+    popa
+    pop %ebp
+    iret
+    .if (\n-\i)-1
+    handler "(\i+1)",\n
+    .endif
+.endm
+# keep in sync with pm.h !!!
+IDT_ITEMS=64
+interrupt_handlers:
+h_start:
+    handler 0 64
+#   handler 64 128
+#   handler 128 192
+#   handler 192 256
+h_end:
+## I/O input (byte)
+#
+# Get a byte from I/O port and store it AL.
+#
+inb:
+    push %edx
+    xorl %eax,%eax
+    movl 8(%esp),%edx
+    inb %dx,%al
+    pop %edx
+    ret
+## I/O input (word)
+#
+# Get a word from I/O port and store it AX.
+#
+inw:
+    push %edx
+    xorl %eax,%eax
+    movl 8(%esp),%edx
+    inw %dx,%ax
+    pop %edx
+    ret
+## I/O input (dword)
+#
+# Get a dword from I/O port and store it EAX.
+#
+inl:
+    push %edx
+    xorl %eax,%eax
+    movl 8(%esp),%edx
+    inl %dx,%eax
+    pop %edx
+    ret
+## I/O output (byte)
+#
+# Send a byte to I/O port.
+#
+outb:
+    push %ebp
+    movl %esp,%ebp
+    pusha
+    movl 8(%ebp),%edx
+    movl 12(%ebp),%eax
+    outb %al,%dx
+    popa
+    pop %ebp
+    ret
+## I/O output (word)
+#
+# Send a word to I/O port.
+#
+outw:
+    push %ebp
+    movl %esp,%ebp
+    pusha
+    movl 8(%ebp),%edx
+    movl 12(%ebp),%eax
+    outw %ax,%dx
+    popa
+    pop %ebp
+    ret
+## I/O output (dword)
+#
+# Send a dword to I/O port.
+#
+outl:
+    push %ebp
+    movl %esp,%ebp
+    pusha
+    movl 8(%ebp),%edx
+    movl 12(%ebp),%eax
+    outl %eax,%dx
+    popa
+    pop %ebp
+    ret
+## Copy memory
+#
+# Copy a given number of bytes (3rd argument)
+# from the memory location defined by 1st argument
+# to the memory location defined by 2nd argument.
+# The memory areas cannot overlap.
+#
+SRC=8
+DST=12
+CNT=16
+memcopy:
+    push %ebp
+    movl %esp,%ebp
+    pusha
+    cld
+    movl CNT(%ebp),%ecx
+    movl DST(%ebp),%edi
+    movl SRC(%ebp),%esi
+    rep movsb %ds:(%esi),%es:(%edi)
+    popa
+    pop %ebp
+    ret
+## Fill memory with bytes
+#
+# Fill a given number of bytes (2nd argument)
+# at memory defined by 1st argument with the
+# byte value defined by 3rd argument.
+#
+DST=8
+CNT=12
+X=16
+memsetb:
+    push %ebp
+    movl %esp,%ebp
+    pusha
+    cld
+    movl CNT(%ebp),%ecx
+    movl DST(%ebp),%edi
+    movl X(%ebp),%eax
+    rep stosb %al,%es:(%edi)
+    popa
+    pop %ebp
+    ret
+## Fill memory with words
+#
+# Fill a given number of words (2nd argument)
+# at memory defined by 1st argument with the
+# word value defined by 3rd argument.
+#
+DST=8
+CNT=12
+X=16
+memsetw:
+    push %ebp
+    movl %esp,%ebp
+    pusha
+    cld
+    movl CNT(%ebp),%ecx
+    movl DST(%ebp),%edi
+    movl X(%ebp),%eax
+    rep stosw %ax,%es:(%edi)
+    popa
+    pop %ebp
+    ret
+## Compare memory regions for equality
+#
+# Compare a given number of bytes (3rd argument)
+# at memory locations defined by 1st and 2nd argument
+# for equality. If the bytes are equal, EAX contains
+# 0.
+#
+SRC=12
+DST=16
+CNT=20
+memcmp:
+    push %ebp
+    subl $4,%esp
+    movl %esp,%ebp
+    pusha
+    cld
+    movl CNT(%ebp),%ecx
+    movl DST(%ebp),%edi
+    movl SRC(%ebp),%esi
+    repe cmpsb %es:(%edi),%ds:(%esi)
+    movl %ecx,(%ebp)
+    popa
+    movl (%ebp),%eax    # return value => %eax (zero on success)
+    addl $4,%esp
+    pop %ebp
+    ret
+# THIS IS USERSPACE CODE
+.global utext
+utext:
+    xor %ax,%ax;
+    mov %ax,%ds;
+    mov %ax,%es;
+    mov %ax,%fs;
+    mov %ax,%gs;
+:
+#   movl $0xdeadbeaf, %eax
+  int $48
+    cli;
+    sti;
+    jmp 0b
+    # not reached
+utext_end:
+.data
+.global utext_size
+utext_size:
+    .long utext_end - utext
+#.section K_DATA_START
+.global interrupt_handler_size
+interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS

 /SPARTAN/trunk/arch/ia32/src/cpu/cpu.c
 ,0 → 1,136
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <arch/cpu.h>
+#include <arch/cpuid.h>
+#include <arch/pm.h>
+#include <arch.h>
+#include <arch/types.h>
+#include <print.h>
+#include <typedefs.h>
+#include <arch/smp/apic.h>
+/*
+ * Identification of CPUs.
+ * Contains only non-MP-Specification specific SMP code.
+ */
+#define AMD_CPUID_EBX   0x68747541
+#define AMD_CPUID_ECX   0x444d4163
+#define AMD_CPUID_EDX   0x69746e65
+#define INTEL_CPUID_EBX 0x756e6547
+#define INTEL_CPUID_ECX 0x6c65746e
+#define INTEL_CPUID_EDX 0x49656e69
+enum vendor {
+    VendorUnknown=0,
+    VendorAMD,
+    VendorIntel
+};
+static char *vendor_str[] = {
+    "Unknown Vendor",
+    "AuthenticAMD",
+    "GenuineIntel"
+};
+void set_TS_flag(void)
+{
+    asm
+    (
+        "mov %%cr0,%%eax;"
+        "or $8,%%eax;"
+        "mov %%eax,%%cr0;"
+        :
+        :
+        :"%eax"
+    );
+}
+void reset_TS_flag(void)
+{
+    asm
+    (
+        "mov %%cr0,%%eax;"
+        "and $0xffFFffF7,%%eax;"
+        "mov %%eax,%%cr0;"
+        :
+        :
+        :"%eax"
+    );
+}
+void cpu_arch_init(void)
+{
+    CPU->arch.tss = tss_p;
+    CPU->fpu_owner=NULL;
+}
+void cpu_identify(void)
+{
+    cpu_info_t info;
+    int i;
+    CPU->arch.vendor = VendorUnknown;
+    if (has_cpuid()) {
+        cpuid(0, &info);
+        /*
+         * Check for AMD processor.
+         */
+        if (info.cpuid_ebx==AMD_CPUID_EBX && info.cpuid_ecx==AMD_CPUID_ECX && info.cpuid_edx==AMD_CPUID_EDX) {
+            CPU->arch.vendor = VendorAMD;
+        }
+        /*
+         * Check for Intel processor.
+         */
+        if (info.cpuid_ebx==INTEL_CPUID_EBX && info.cpuid_ecx==INTEL_CPUID_ECX && info.cpuid_edx==INTEL_CPUID_EDX) {
+            CPU->arch.vendor = VendorIntel;
+        }
+        cpuid(1, &info);
+        CPU->arch.family = (info.cpuid_eax>>8)&0xf;
+        CPU->arch.model = (info.cpuid_eax>>4)&0xf;
+        CPU->arch.stepping = (info.cpuid_eax>>0)&0xf;
+    }
+}
+void cpu_print_report(cpu_t* m)
+{
+    printf("cpu%d: (%s family=%d model=%d stepping=%d) %dMHz\n",
+        m->id, vendor_str[m->arch.vendor], m->arch.family, m->arch.model, m->arch.stepping,
+        m->frequency_mhz);
+}

 /SPARTAN/trunk/arch/ia32/src/interrupt.c
 ,0 → 1,161
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <arch/interrupt.h>
+#include <print.h>
+#include <debug.h>
+#include <panic.h>
+#include <arch/i8259.h>
+#include <func.h>
+#include <cpu.h>
+#include <arch/asm.h>
+#include <mm/tlb.h>
+#include <arch.h>
+/*
+ * Interrupt and exception dispatching.
+ */
+static iroutine ivt[IVT_ITEMS];
+void (* disable_irqs_function)(__u16 irqmask) = NULL;
+void (* enable_irqs_function)(__u16 irqmask) = NULL;
+void (* eoi_function)(void) = NULL;
+iroutine trap_register(__u8 n, iroutine f)
+{
+    ASSERT(n < IVT_ITEMS);
+    iroutine old;
+    old = ivt[n];
+    ivt[n] = f;
+    return old;
+}
+/*
+ * Called directly from the assembler code.
+ * CPU is cpu_priority_high().
+ */
+void trap_dispatcher(__u8 n, __u32 stack[])
+{
+    ASSERT(n < IVT_ITEMS);
+    ivt[n](n, stack);
+}
+void null_interrupt(__u8 n, __u32 stack[])
+{
+    printf("int %d: null_interrupt\n", n);
+    printf("stack: %L, %L, %L, %L\n", stack[0], stack[1], stack[2], stack[3]);
+    panic("unserviced interrupt\n");
+}
+void gp_fault(__u8 n, __u32 stack[])
+{
+    printf("ERROR_WORD=%X, %%eip=%X, %%cs=%X, flags=%X\n", stack[0], stack[1], stack[2], stack[3]);
+    printf("%%eax=%L, %%ebx=%L, %%ecx=%L, %%edx=%L,\n%%edi=%L, %%esi=%L, %%ebp=%L, %%esp=%L\n", stack[-2], stack[-5], stack[-3], stack[-4], stack[-9], stack[-8], stack[-1], stack);
+    printf("stack: %X, %X, %X, %X\n", stack[4], stack[5], stack[6], stack[7]);
+    //panic("general protection fault\n");
+    stack[1]++;
+}
+void ss_fault(__u8 n, __u32 stack[])
+{
+    printf("ERROR_WORD=%X, %%eip=%X, %%cs=%X, flags=%X\n", stack[0], stack[1], stack[2], stack[3]);
+    printf("%%eax=%L, %%ebx=%L, %%ecx=%L, %%edx=%L,\n%%edi=%L, %%esi=%L, %%ebp=%L, %%esp=%L\n", stack[-2], stack[-5], stack[-3], stack[-4], stack[-9], stack[-8], stack[-1], stack);
+    printf("stack: %X, %X, %X, %X\n", stack[4], stack[5], stack[6], stack[7]);
+    panic("stack fault\n");
+}
+void nm_fault(__u8 n, __u32 stack[])
+{
+    reset_TS_flag();
+    if ((CPU->fpu_owner)!=NULL) {
+        fpu_lazy_context_save(&((CPU->fpu_owner)->saved_fpu_context));
+        (CPU->fpu_owner)->fpu_context_engaged=0; /* don't prevent migration */
+    }
+    if(THREAD->fpu_context_exists) fpu_lazy_context_restore(&(THREAD->saved_fpu_context));
+    else {fpu_init();THREAD->fpu_context_exists=1;}
+    CPU->fpu_owner=THREAD;
+}
+void page_fault(__u8 n, __u32 stack[])
+{
+    printf("page fault address: %X\n", read_cr2());
+    printf("ERROR_WORD=%X, %%eip=%X, %%cs=%X, flags=%X\n", stack[0], stack[1], stack[2], stack[3]);
+    printf("%%eax=%L, %%ebx=%L, %%ecx=%L, %%edx=%L,\n%%edi=%L, %%esi=%L, %%ebp=%L, %%esp=%L\n", stack[-2], stack[-5], stack[-3], stack[-4], stack[-9], stack[-8], stack[-1], stack);
+    printf("stack: %X, %X, %X, %X\n", stack[4], stack[5], stack[6], stack[7]);
+    panic("page fault\n");
+}
+void syscall(__u8 n, __u32 stack[])
+{
+    printf("cpu%d: syscall\n", CPU->id);
+    thread_usleep(1000);
+}
+void tlb_shootdown_ipi(__u8 n, __u32 stack[])
+{
+    trap_virtual_eoi();
+    tlb_shootdown_ipi_recv();
+}
+void wakeup_ipi(__u8 n, __u32 stack[])
+{
+    trap_virtual_eoi();
+}
+void trap_virtual_enable_irqs(__u16 irqmask)
+{
+    if (enable_irqs_function)
+        enable_irqs_function(irqmask);
+    else
+        panic("no enable_irqs_function\n");
+}
+void trap_virtual_disable_irqs(__u16 irqmask)
+{
+    if (disable_irqs_function)
+        disable_irqs_function(irqmask);
+    else
+        panic("no disable_irqs_function\n");
+}
+void trap_virtual_eoi(void)
+{
+    if (eoi_function)
+        eoi_function();
+    else
+        panic("no eoi_function\n");
+}

 /SPARTAN/trunk/arch/ia32/src/smp/mps.c
 ,0 → 1,427
+/*
+ * Copyright (C) 2001-2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifdef __SMP__
+#include <config.h>
+#include <print.h>
+#include <debug.h>
+#include <arch/smp/mps.h>
+#include <arch/smp/apic.h>
+#include <arch/smp/smp.h>
+#include <func.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#include <cpu.h>
+#include <arch/asm.h>
+#include <arch/bios/bios.h>
+/*
+ * MultiProcessor Specification detection code.
+ */
+#define FS_SIGNATURE    0x5f504d5f
+#define CT_SIGNATURE    0x504d4350
+int mps_fs_check(__u8 *base);
+int mps_ct_check(void);
+int configure_via_ct(void);
+int configure_via_default(__u8 n);
+int ct_processor_entry(struct __processor_entry *pr);
+void ct_bus_entry(struct __bus_entry *bus);
+void ct_io_apic_entry(struct __io_apic_entry *ioa);
+void ct_io_intr_entry(struct __io_intr_entry *iointr);
+void ct_l_intr_entry(struct __l_intr_entry *lintr);
+void ct_extended_entries(void);
+static struct mps_fs *fs;
+static struct mps_ct *ct;
+struct __processor_entry *processor_entries = NULL;
+struct __bus_entry *bus_entries = NULL;
+struct __io_apic_entry *io_apic_entries = NULL;
+struct __io_intr_entry *io_intr_entries = NULL;
+struct __l_intr_entry *l_intr_entries = NULL;
+int processor_entry_cnt = 0;
+int bus_entry_cnt = 0;
+int io_apic_entry_cnt = 0;
+int io_intr_entry_cnt = 0;
+int l_intr_entry_cnt = 0;
+waitq_t ap_completion_wq;
+waitq_t kmp_completion_wq;
+/*
+ * Implementation of IA-32 SMP configuration interface.
+ */
+static count_t get_cpu_count(void);
+static bool is_cpu_enabled(index_t i);
+static bool is_bsp(index_t i);
+static __u8 get_cpu_apic_id(index_t i);
+struct smp_config_operations mps_config_operations = {
+    .cpu_count = get_cpu_count,
+    .cpu_enabled = is_cpu_enabled,
+    .cpu_bootstrap = is_bsp,
+    .cpu_apic_id = get_cpu_apic_id
+};
+count_t get_cpu_count(void)
+{
+    return processor_entry_cnt;
+}
+bool is_cpu_enabled(index_t i)
+{
+    ASSERT(i < processor_entry_cnt);
+    return processor_entries[i].cpu_flags & 0x1;
+}
+bool is_bsp(index_t i)
+{
+    ASSERT(i < processor_entry_cnt);
+    return processor_entries[i].cpu_flags & 0x2;
+}
+__u8 get_cpu_apic_id(index_t i)
+{
+    ASSERT(i < processor_entry_cnt);
+    return processor_entries[i].l_apic_id;
+}
+/*
+ * Used to check the integrity of the MP Floating Structure.
+ */
+int mps_fs_check(__u8 *base)
+{
+    int i;
+    __u8 sum;
+    for (i = 0, sum = 0; i < 16; i++)
+        sum += base[i];
+    return !sum;
+}
+/*
+ * Used to check the integrity of the MP Configuration Table.
+ */
+int mps_ct_check(void)
+{
+    __u8 *base = (__u8 *) ct;
+    __u8 *ext = base + ct->base_table_length;
+    __u8 sum;
+    int i;
+    /* count the checksum for the base table */
+    for (i=0,sum=0; i < ct->base_table_length; i++)
+        sum += base[i];
+    if (sum)
+        return 0;
+    /* count the checksum for the extended table */
+    for (i=0,sum=0; i < ct->ext_table_length; i++)
+        sum += ext[i];
+    return sum == ct->ext_table_checksum;
+}
+void mps_init(void)
+{
+    __u8 *addr[2] = { NULL, (__u8 *) 0xf0000 };
+    int i, j, length[2] = { 1024, 64*1024 };
+    /*
+     * Find MP Floating Pointer Structure
+     * 1a. search first 1K of EBDA
+     * 1b. if EBDA is undefined, search last 1K of base memory
+     *  2. search 64K starting at 0xf0000
+     */
+    addr[0] = (__u8 *) (ebda ? ebda : 639 * 1024);
+    for (i = 0; i < 2; i++) {
+        for (j = 0; j < length[i]; j += 16) {
+            if (*((__u32 *) &addr[i][j]) == FS_SIGNATURE && mps_fs_check(&addr[i][j])) {
+                fs = (struct mps_fs *) &addr[i][j];
+                goto fs_found;
+            }
+        }
+    }
+    return;
+fs_found:
+    printf("%L: MPS Floating Pointer Structure\n", fs);
+    frame_not_free((__address) fs);
+    if (fs->config_type == 0 && fs->configuration_table) {
+        if (fs->mpfib2 >> 7) {
+            printf("%s: PIC mode not supported\n", __FUNCTION__);
+            return;
+        }
+        ct = fs->configuration_table;
+        frame_not_free((__address) ct);
+        config.cpu_count = configure_via_ct();
+    }
+    else
+        config.cpu_count = configure_via_default(fs->config_type);
+    return;
+}
+int configure_via_ct(void)
+{
+    __u8 *cur;
+    int i, cnt;
+    if (ct->signature != CT_SIGNATURE) {
+        printf("%s: bad ct->signature\n", __FUNCTION__);
+        return 1;
+    }
+    if (!mps_ct_check()) {
+        printf("%s: bad ct checksum\n", __FUNCTION__);
+        return 1;
+    }
+    if (ct->oem_table) {
+        printf("%s: ct->oem_table not supported\n", __FUNCTION__);
+        return 1;
+    }
+    l_apic = ct->l_apic;
+    cnt = 0;
+    cur = &ct->base_table[0];
+    for (i=0; i < ct->entry_count; i++) {
+        switch (*cur) {
+            /* Processor entry */
+            case 0:
+                processor_entries = processor_entries ? processor_entries : (struct __processor_entry *) cur;
+                processor_entry_cnt++;
+                cnt += ct_processor_entry((struct __processor_entry *) cur);
+                cur += 20;
+                break;
+            /* Bus entry */
+            case 1:
+                bus_entries = bus_entries ? bus_entries : (struct __bus_entry *) cur;
+                bus_entry_cnt++;
+                ct_bus_entry((struct __bus_entry *) cur);
+                cur += 8;
+                break;
+            /* I/O Apic */
+            case 2:
+                io_apic_entries = io_apic_entries ? io_apic_entries : (struct __io_apic_entry *) cur;
+                io_apic_entry_cnt++;
+                ct_io_apic_entry((struct __io_apic_entry *) cur);
+                cur += 8;
+                break;
+            /* I/O Interrupt Assignment */
+            case 3:
+                io_intr_entries = io_intr_entries ? io_intr_entries : (struct __io_intr_entry *) cur;
+                io_intr_entry_cnt++;
+                ct_io_intr_entry((struct __io_intr_entry *) cur);
+                cur += 8;
+                break;
+            /* Local Interrupt Assignment */
+            case 4:
+                l_intr_entries = l_intr_entries ? l_intr_entries : (struct __l_intr_entry *) cur;
+                l_intr_entry_cnt++;
+                ct_l_intr_entry((struct __l_intr_entry *) cur);
+                cur += 8;
+                break;
+            default:
+                /*
+                 * Something is wrong. Fallback to UP mode.
+                 */
+                printf("%s: ct badness\n", __FUNCTION__);
+                return 1;
+        }
+    }
+    /*
+     * Process extended entries.
+     */
+    ct_extended_entries();
+    return cnt;
+}
+int configure_via_default(__u8 n)
+{
+    /*
+     * Not yet implemented.
+     */
+    printf("%s: not supported\n", __FUNCTION__);
+    return 1;
+}
+int ct_processor_entry(struct __processor_entry *pr)
+{
+    /*
+     * Ignore processors which are not marked enabled.
+     */
+    if ((pr->cpu_flags & (1<<0)) == 0)
+        return 0;
+    apic_id_mask |= (1<<pr->l_apic_id);
+    return 1;
+}
+void ct_bus_entry(struct __bus_entry *bus)
+{
+#ifdef MPSCT_VERBOSE
+    char buf[7];
+    memcopy((__address) bus->bus_type, (__address) buf, 6);
+    buf[6] = 0;
+    printf("bus%d: %s\n", bus->bus_id, buf);
+#endif
+}
+void ct_io_apic_entry(struct __io_apic_entry *ioa)
+{
+    static int io_apic_count = 0;
+    /* this ioapic is marked unusable */
+    if (ioa->io_apic_flags & 1 == 0)
+        return;
+    if (io_apic_count++ > 0) {
+        /*
+         * Multiple IO APIC's are currently not supported.
+         */
+        return;
+    }
+    io_apic = ioa->io_apic;
+}
+//#define MPSCT_VERBOSE
+void ct_io_intr_entry(struct __io_intr_entry *iointr)
+{
+#ifdef MPSCT_VERBOSE
+    switch (iointr->intr_type) {
+        case 0: printf("INT"); break;
+        case 1: printf("NMI"); break;
+        case 2: printf("SMI"); break;
+        case 3: printf("ExtINT"); break;
+    }
+    putchar(',');
+    switch (iointr->poel&3) {
+        case 0: printf("bus-like"); break;
+        case 1: printf("active high"); break;
+        case 2: printf("reserved"); break;
+        case 3: printf("active low"); break;
+    }
+    putchar(',');
+    switch ((iointr->poel>>2)&3) {
+        case 0: printf("bus-like"); break;
+        case 1: printf("edge-triggered"); break;
+        case 2: printf("reserved"); break;
+        case 3: printf("level-triggered"); break;
+    }
+    putchar(',');
+    printf("bus%d,irq%d", iointr->src_bus_id, iointr->src_bus_irq);
+    putchar(',');
+    printf("io_apic%d,pin%d", iointr->dst_io_apic_id, iointr->dst_io_apic_pin);
+    putchar('\n');
+#endif
+}
+void ct_l_intr_entry(struct __l_intr_entry *lintr)
+{
+#ifdef MPSCT_VERBOSE
+    switch (lintr->intr_type) {
+        case 0: printf("INT"); break;
+        case 1: printf("NMI"); break;
+        case 2: printf("SMI"); break;
+        case 3: printf("ExtINT"); break;
+    }
+    putchar(',');
+    switch (lintr->poel&3) {
+        case 0: printf("bus-like"); break;
+        case 1: printf("active high"); break;
+        case 2: printf("reserved"); break;
+        case 3: printf("active low"); break;
+    }
+    putchar(',');
+    switch ((lintr->poel>>2)&3) {
+        case 0: printf("bus-like"); break;
+        case 1: printf("edge-triggered"); break;
+        case 2: printf("reserved"); break;
+        case 3: printf("level-triggered"); break;
+    }
+    putchar(',');
+    printf("bus%d,irq%d", lintr->src_bus_id, lintr->src_bus_irq);
+    putchar(',');
+    printf("l_apic%d,pin%d", lintr->dst_l_apic_id, lintr->dst_l_apic_pin);
+    putchar('\n');
+#endif
+}
+void ct_extended_entries(void)
+{
+    __u8 *ext = (__u8 *) ct + ct->base_table_length;
+    __u8 *cur;
+    for (cur = ext; cur < ext + ct->ext_table_length; cur += cur[CT_EXT_ENTRY_LEN]) {
+        switch (cur[CT_EXT_ENTRY_TYPE]) {
+            default:
+                printf("%L: skipping MP Configuration Table extended entry type %d\n", cur, cur[CT_EXT_ENTRY_TYPE]);
+                break;
+        }
+    }
+}
+int mps_irq_to_pin(int irq)
+{
+    int i;
+    for(i=0;i<io_intr_entry_cnt;i++) {
+        if (io_intr_entries[i].src_bus_irq == irq && io_intr_entries[i].intr_type == 0)
+            return io_intr_entries[i].dst_io_apic_pin;
+    }
+    return -1;
+}
+#endif /* __SMP__ */

 /SPARTAN/trunk/arch/ia32/src/smp/smp.c
 ,0 → 1,164
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <smp/smp.h>
+#include <arch/smp/smp.h>
+#include <arch/smp/mps.h>
+#include <arch/smp/ap.h>
+#include <arch/acpi/acpi.h>
+#include <arch/acpi/madt.h>
+#include <config.h>
+#include <synch/waitq.h>
+#include <arch/pm.h>
+#include <func.h>
+#include <panic.h>
+#include <debug.h>
+#include <arch/asm.h>
+#include <mm/frame.h>
+#include <mm/page.h>
+#include <mm/heap.h>
+#ifdef __SMP__
+static struct smp_config_operations *ops = NULL;
+void smp_init(void)
+{
+    if (acpi_madt) {
+        acpi_madt_parse();
+        ops = &madt_config_operations;
+    }
+    if (config.cpu_count == 1) {
+        mps_init();
+        ops = &mps_config_operations;
+    }
+    if (config.cpu_count > 1) {
+        map_page_to_frame((__address) l_apic, (__address) l_apic, PAGE_NOT_CACHEABLE, 0);
+        map_page_to_frame((__address) io_apic, (__address) io_apic, PAGE_NOT_CACHEABLE, 0);
+        }
+        /*
+         * Must be initialized outside the kmp thread, since it is waited
+         * on before the kmp thread is created.
+         */
+        waitq_initialize(&kmp_completion_wq);
+}
+/*
+ * Kernel thread for bringing up application processors. It becomes clear
+ * that we need an arrangement like this (AP's being initialized by a kernel
+ * thread), for a thread has its dedicated stack. (The stack used during the
+ * BSP initialization (prior the very first call to scheduler()) will be used
+ * as an initialization stack for each AP.)
+ */
+void kmp(void *arg)
+{
+    __address src, dst;
+    int i;
+    ASSERT(ops != NULL);
+    waitq_initialize(&ap_completion_wq);
+    /*
+     * We need to access data in frame 0.
+     * We boldly make use of kernel address space mapping.
+     */
+    /*
+     * Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot()
+     */
+    *((__u16 *) (PA2KA(0x467+0))) =  ((__address) ap_boot) >> 4;    /* segment */
+    *((__u16 *) (PA2KA(0x467+2))) =  0;             /* offset */
+    /*
+     * Save 0xa to address 0xf of the CMOS RAM.
+     * BIOS will not do the POST after the INIT signal.
+     */
+    outb(0x70,0xf);
+    outb(0x71,0xa);
+    cpu_priority_high();
+    pic_disable_irqs(0xffff);
+    apic_init();
+    for (i = 0; i < ops->cpu_count(); i++) {
+        struct descriptor *gdt_new;
+        /*
+         * Skip processors marked unusable.
+         */
+        if (!ops->cpu_enabled(i))
+            continue;
+        /*
+         * The bootstrap processor is already up.
+         */
+        if (ops->cpu_bootstrap(i))
+            continue;
+        if (ops->cpu_apic_id(i) == l_apic_id()) {
+            printf("kmp: bad processor entry #%d, will not send IPI to myself\n", i);
+            continue;
+        }
+        /*
+         * Prepare new GDT for CPU in question.
+         */
+        if (!(gdt_new = (struct descriptor *) malloc(GDT_ITEMS*sizeof(struct descriptor))))
+            panic("couldn't allocate memory for GDT\n");
+        memcopy(gdt, gdt_new, GDT_ITEMS*sizeof(struct descriptor));
+        memsetb(&gdt_new[TSS_DES], sizeof(struct descriptor), 0);
+        gdtr.base = KA2PA((__address) gdt_new);
+        if (l_apic_send_init_ipi(ops->cpu_apic_id(i))) {
+            /*
+                 * There may be just one AP being initialized at
+             * the time. After it comes completely up, it is
+             * supposed to wake us up.
+                 */
+            waitq_sleep(&ap_completion_wq);
+            cpu_priority_high();
+        }
+        else {
+            printf("INIT IPI for l_apic%d failed\n", ops->cpu_apic_id(i));
+        }
+    }
+    /*
+     * Wakeup the kinit thread so that
+     * system initialization can go on.
+     */
+    waitq_wakeup(&kmp_completion_wq, WAKEUP_FIRST);
+}
+#endif /* __SMP__ */

 /SPARTAN/trunk/arch/ia32/src/smp/apic.c
 ,0 → 1,417
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <arch/types.h>
+#include <arch/smp/apic.h>
+#include <arch/smp/ap.h>
+#include <arch/smp/mps.h>
+#include <mm/page.h>
+#include <time/delay.h>
+#include <arch/interrupt.h>
+#include <print.h>
+#include <arch/asm.h>
+#include <arch.h>
+#ifdef __SMP__
+/*
+ * This is functional, far-from-general-enough interface to the APIC.
+ * Advanced Programmable Interrupt Controller for MP systems.
+ * Tested on:
+ *  Bochs 2.0.2 - Bochs 2.2 with 2-8 CPUs
+ *  Simics 2.0.28 - Simics 2.2.14 2-4 CPUs
+ *  ASUS P/I-P65UP5 + ASUS C-P55T2D REV. 1.41 with 2x 200Mhz Pentium CPUs
+ */
+/*
+ * These variables either stay configured as initilalized, or are changed by
+ * the MP configuration code.
+ *
+ * Pay special attention to the volatile keyword. Without it, gcc -O2 would
+ * optimize the code too much and accesses to l_apic and io_apic, that must
+ * always be 32-bit, would use byte oriented instructions.
+ */
+volatile __u32 *l_apic = (__u32 *) 0xfee00000;
+volatile __u32 *io_apic = (__u32 *) 0xfec00000;
+__u32 apic_id_mask = 0;
+int apic_poll_errors(void);
+void apic_init(void)
+{
+    __u32 tmp, id, i;
+    trap_register(VECTOR_APIC_SPUR, apic_spurious);
+    enable_irqs_function = io_apic_enable_irqs;
+    disable_irqs_function = io_apic_disable_irqs;
+    eoi_function = l_apic_eoi;
+    /*
+     * Configure interrupt routing.
+     * IRQ 0 remains masked as the time signal is generated by l_apic's themselves.
+     * Other interrupts will be forwarded to the lowest priority CPU.
+     */
+    io_apic_disable_irqs(0xffff);
+    trap_register(VECTOR_CLK, l_apic_timer_interrupt);
+    for (i=1; i<16; i++) {
+        int pin;
+        if ((pin = mps_irq_to_pin(i)) != -1)
+        io_apic_change_ioredtbl(pin,0xf,IVT_IRQBASE+i,LOPRI);
+    }
+    /*
+     * Ensure that io_apic has unique ID.
+     */
+    tmp = io_apic_read(IOAPICID);
+    id = (tmp >> 24) & 0xf;
+    if ((1<<id) & apic_id_mask) {
+        int i;
+        for (i=0; i<15; i++) {
+            if (!((1<<i) & apic_id_mask)) {
+                io_apic_write(IOAPICID, (tmp & (~(0xf<<24))) | (i<<24));
+                break;
+            }
+        }
+    }
+    /*
+     * Configure the BSP's lapic.
+     */
+    l_apic_init();
+    l_apic_debug();
+}
+void apic_spurious(__u8 n, __u32 stack[])
+{
+    printf("cpu%d: APIC spurious interrupt\n", CPU->id);
+}
+int apic_poll_errors(void)
+{
+    __u32 esr;
+    esr = l_apic[ESR] & ~ESRClear;
+    if ((esr>>0) & 1)
+        printf("Send CS Error\n");
+    if ((esr>>1) & 1)
+        printf("Receive CS Error\n");
+    if ((esr>>2) & 1)
+        printf("Send Accept Error\n");
+    if ((esr>>3) & 1)
+        printf("Receive Accept Error\n");
+    if ((esr>>5) & 1)
+        printf("Send Illegal Vector\n");
+    if ((esr>>6) & 1)
+        printf("Received Illegal Vector\n");
+    if ((esr>>7) & 1)
+        printf("Illegal Register Address\n");
+    return !esr;
+}
+/*
+ * Send all CPUs excluding CPU IPI vector.
+ */
+int l_apic_broadcast_custom_ipi(__u8 vector)
+{
+    __u32 lo;
+    /*
+     * Read the ICR register in and zero all non-reserved fields.
+     */
+    lo = l_apic[ICRlo] & ICRloClear;
+    lo |= DLVRMODE_FIXED | DESTMODE_LOGIC | LEVEL_ASSERT | SHORTHAND_EXCL | TRGRMODE_LEVEL | vector;
+    l_apic[ICRlo] = lo;
+    lo = l_apic[ICRlo] & ICRloClear;
+    if (lo & SEND_PENDING)
+        printf("IPI is pending.\n");
+    return apic_poll_errors();
+}
+/*
+ * Universal Start-up Algorithm for bringing up the AP processors.
+ */
+int l_apic_send_init_ipi(__u8 apicid)
+{
+    __u32 lo, hi;
+    int i;
+    /*
+     * Read the ICR register in and zero all non-reserved fields.
+     */
+    lo = l_apic[ICRlo] & ICRloClear;
+    hi = l_apic[ICRhi] & ICRhiClear;
+    lo |= DLVRMODE_INIT | DESTMODE_PHYS | LEVEL_ASSERT | SHORTHAND_DEST | TRGRMODE_LEVEL;
+    hi |= apicid << 24;
+    l_apic[ICRhi] = hi;
+    l_apic[ICRlo] = lo;
+    /*
+     * According to MP Specification, 20us should be enough to
+     * deliver the IPI.
+     */
+    delay(20);
+    if (!apic_poll_errors()) return 0;
+    lo = l_apic[ICRlo] & ICRloClear;
+    if (lo & SEND_PENDING)
+        printf("IPI is pending.\n");
+    l_apic[ICRlo] = lo | DLVRMODE_INIT | DESTMODE_PHYS | LEVEL_DEASSERT | SHORTHAND_DEST | TRGRMODE_LEVEL;
+    /*
+     * Wait 10ms as MP Specification specifies.
+     */
+    delay(10000);
+    if (!is_82489DX_apic(l_apic[LAVR])) {
+        /*
+         * If this is not 82489DX-based l_apic we must send two STARTUP IPI's.
+         */
+        for (i = 0; i<2; i++) {
+            lo = l_apic[ICRlo] & ICRloClear;
+            lo |= ((__address) ap_boot) / 4096; /* calculate the reset vector */
+            l_apic[ICRlo] = lo | DLVRMODE_STUP | DESTMODE_PHYS | LEVEL_ASSERT | SHORTHAND_DEST | TRGRMODE_LEVEL;
+            delay(200);
+        }
+    }
+    return apic_poll_errors();
+}
+void l_apic_init(void)
+{
+    __u32 tmp, t1, t2;
+    l_apic[LVT_Err] |= (1<<16);
+    l_apic[LVT_LINT0] |= (1<<16);
+    l_apic[LVT_LINT1] |= (1<<16);
+    tmp = l_apic[SVR] & SVRClear;
+    l_apic[SVR] = tmp | (1<<8) | (VECTOR_APIC_SPUR);
+    l_apic[TPR] &= TPRClear;
+    if (CPU->arch.family >= 6)
+        enable_l_apic_in_msr();
+    tmp = l_apic[ICRlo] & ICRloClear;
+    l_apic[ICRlo] = tmp | DLVRMODE_INIT | DESTMODE_PHYS | LEVEL_DEASSERT | SHORTHAND_INCL | TRGRMODE_LEVEL;
+    /*
+     * Program the timer for periodic mode and respective vector.
+     */
+    l_apic[TDCR] &= TDCRClear;
+    l_apic[TDCR] |= 0xb;
+    tmp = l_apic[LVT_Tm] | (1<<17) | (VECTOR_CLK);
+    l_apic[LVT_Tm] = tmp & ~(1<<16);
+    t1 = l_apic[CCRT];
+    l_apic[ICRT] = 0xffffffff;
+    while (l_apic[CCRT] == t1)
+        ;
+    t1 = l_apic[CCRT];
+    delay(1000);
+    t2 = l_apic[CCRT];
+    l_apic[ICRT] = t1-t2;
+}
+void l_apic_eoi(void)
+{
+    l_apic[EOI] = 0;
+}
+void l_apic_debug(void)
+{
+#ifdef LAPIC_VERBOSE
+    int i, lint;
+    printf("LVT on cpu%d, LAPIC ID: %d\n", CPU->id, l_apic_id());
+    printf("LVT_Tm: ");
+    if (l_apic[LVT_Tm] & (1<<17)) printf("periodic"); else printf("one-shot"); putchar(',');
+    if (l_apic[LVT_Tm] & (1<<16)) printf("masked"); else printf("not masked"); putchar(',');
+    if (l_apic[LVT_Tm] & (1<<12)) printf("send pending"); else printf("idle"); putchar(',');
+    printf("%B\n", l_apic[LVT_Tm] & 0xff);
+    for (i=0; i<2; i++) {
+        lint = i ? LVT_LINT1 : LVT_LINT0;
+        printf("LVT_LINT%d: ", i);
+        if (l_apic[lint] & (1<<16)) printf("masked"); else printf("not masked"); putchar(',');
+        if (l_apic[lint] & (1<<15)) printf("level"); else printf("edge"); putchar(',');
+        printf("%d", l_apic[lint] & (1<<14)); putchar(',');
+        printf("%d", l_apic[lint] & (1<<13)); putchar(',');
+        if (l_apic[lint] & (1<<12)) printf("send pending"); else printf("idle"); putchar(',');
+        switch ((l_apic[lint]>>8)&7) {
+            case 0: printf("fixed"); break;
+            case 4: printf("NMI"); break;
+            case 7: printf("ExtINT"); break;
+        }
+        putchar(',');
+        printf("%B\n", l_apic[lint] & 0xff);
+    }
+    printf("LVT_Err: ");
+    if (l_apic[LVT_Err] & (1<<16)) printf("masked"); else printf("not masked"); putchar(',');
+    if (l_apic[LVT_Err] & (1<<12)) printf("send pending"); else printf("idle"); putchar(',');
+    printf("%B\n", l_apic[LVT_Err] & 0xff);
+    /*
+     * This register is supported only on P6 and higher.
+     */
+    if (CPU->arch.family > 5) {
+        printf("LVT_PCINT: ");
+        if (l_apic[LVT_PCINT] & (1<<16)) printf("masked"); else printf("not masked"); putchar(',');
+        if (l_apic[LVT_PCINT] & (1<<12)) printf("send pending"); else printf("idle"); putchar(',');
+        switch ((l_apic[LVT_PCINT] >> 8)&7) {
+            case 0: printf("fixed"); break;
+            case 4: printf("NMI"); break;
+            case 7: printf("ExtINT"); break;
+        }
+        putchar(',');
+        printf("%B\n", l_apic[LVT_PCINT] & 0xff);
+    }
+#endif
+}
+void l_apic_timer_interrupt(__u8 n, __u32 stack[])
+{
+    l_apic_eoi();
+    clock();
+}
+__u8 l_apic_id(void)
+{
+    return (l_apic[L_APIC_ID] >> L_APIC_IDShift)&L_APIC_IDMask;
+}
+__u32 io_apic_read(__u8 address)
+{
+    __u32 tmp;
+    tmp = io_apic[IOREGSEL] & ~0xf;
+    io_apic[IOREGSEL] = tmp | address;
+    return io_apic[IOWIN];
+}
+void io_apic_write(__u8 address, __u32 x)
+{
+    __u32 tmp;
+    tmp = io_apic[IOREGSEL] & ~0xf;
+    io_apic[IOREGSEL] = tmp | address;
+    io_apic[IOWIN] = x;
+}
+void io_apic_change_ioredtbl(int signal, int dest, __u8 v, int flags)
+{
+    __u32 reglo, reghi;
+    int dlvr = 0;
+    if (flags & LOPRI)
+        dlvr = 1;
+    reglo = io_apic_read(IOREDTBL + signal*2);
+    reghi = io_apic_read(IOREDTBL + signal*2 + 1);
+    reghi &= ~0x0f000000;
+    reghi |= (dest<<24);
+    reglo &= (~0x1ffff) | (1<<16); /* don't touch the mask */
+    reglo |= (0<<15) | (0<<13) | (0<<11) | (dlvr<<8) | v;
+    io_apic_write(IOREDTBL + signal*2, reglo);
+    io_apic_write(IOREDTBL + signal*2 + 1, reghi);
+}
+void io_apic_disable_irqs(__u16 irqmask)
+{
+    int i,pin;
+    __u32 reglo;
+    for (i=0;i<16;i++) {
+        if ((irqmask>>i) & 1) {
+            /*
+             * Mask the signal input in IO APIC if there is a
+             * mapping for the respective IRQ number.
+             */
+            pin = mps_irq_to_pin(i);
+            if (pin != -1) {
+                reglo = io_apic_read(IOREDTBL + pin*2);
+                reglo |= (1<<16);
+                io_apic_write(IOREDTBL + pin*2,reglo);
+            }
+        }
+    }
+}
+void io_apic_enable_irqs(__u16 irqmask)
+{
+    int i,pin;
+    __u32 reglo;
+    for (i=0;i<16;i++) {
+        if ((irqmask>>i) & 1) {
+            /*
+             * Unmask the signal input in IO APIC if there is a
+             * mapping for the respective IRQ number.
+             */
+            pin = mps_irq_to_pin(i);
+            if (pin != -1) {
+                reglo = io_apic_read(IOREDTBL + pin*2);
+                reglo &= ~(1<<16);
+                io_apic_write(IOREDTBL + pin*2,reglo);
+            }
+        }
+    }
+}
+#endif /* __SMP__ */

 /SPARTAN/trunk/arch/ia32/src/smp/ap.S
 ,0 → 1,74
+#
+# Copyright (C) 2001-2004 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#
+# Init code for application processors.
+#
+.section K_TEXT_START_2
+#ifdef __SMP__
+.global ap_boot
+KTEXT=8
+KDATA=16
+# This piece of code is real-mode and is meant to be alligned at 4K boundary.
+# The requirement for such an alignment comes from MP Specification's STARTUP IPI
+# requirements.
+.align 4096
+ap_boot:
+.code16
+    cli
+    xorw %ax,%ax
+    movw %ax,%ds
+    lgdt gdtr
+    movl %cr0,%eax
+    orl $1,%eax
+    movl %eax,%cr0
+    jmpl $KTEXT,$jump_to_kernel
+jump_to_kernel:
+.code32
+    movw $KDATA,%ax
+    movw %ax,%ds
+    movw %ax,%es
+    movw %ax,%ss
+    movl $(ctx-0x80000000),%eax # KA2PA((__address) &ctx)
+    movl (%eax),%esp
+    subl $0x80000000,%esp       # KA2PA(ctx.sp)
+    lidt idtr
+    call map_kernel
+    jmpl $KTEXT,$main_ap
+#endif /* __SMP__ */

 /SPARTAN/trunk/arch/ia32/src/smp/ipi.c
 ,0 → 1,39
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifdef __SMP__
+#include <smp/ipi.h>
+#include <arch/smp/apic.h>
+void ipi_broadcast_arch(int ipi)
+{
+    (void) l_apic_broadcast_custom_ipi((__u8) ipi);
+}
+#endif /* __SMP__ */

 /SPARTAN/trunk/arch/ia32/src/acpi/madt.c
 ,0 → 1,187
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <arch/types.h>
+#include <typedefs.h>
+#include <arch/acpi/acpi.h>
+#include <arch/acpi/madt.h>
+#include <arch/smp/apic.h>
+#include <arch/smp/smp.h>
+#include <panic.h>
+#include <debug.h>
+#include <config.h>
+struct acpi_madt *acpi_madt = NULL;
+#ifdef __SMP__
+/*
+ * NOTE: it is currently not completely clear to the authors of SPARTAN whether
+ * MADT can exist in such a form that entries of the same type are not consecutive.
+ * Because of this uncertainity, some entry types are explicitly checked for
+ * being consecutive with other entries of the same kind.
+ */
+static void madt_l_apic_entry(struct madt_l_apic *la, __u8 prev_type);
+static void madt_io_apic_entry(struct madt_io_apic *ioa, __u8 prev_type);
+struct madt_l_apic *madt_l_apic_entries = NULL;
+struct madt_io_apic *madt_io_apic_entries = NULL;
+int madt_l_apic_entry_cnt = 0;
+int madt_io_apic_entry_cnt = 0;
+char *entry[] = {
+    "L_APIC",
+    "IO_APIC",
+    "INTR_SRC_OVRD",
+    "NMI_SRC",
+    "L_APIC_NMI",
+    "L_APIC_ADDR_OVRD",
+    "IO_SAPIC",
+    "L_SAPIC",
+    "PLATFORM_INTR_SRC"
+};
+/*
+ * ACPI MADT Implementation of SMP configuration interface.
+ */
+static count_t madt_cpu_count(void);
+static bool madt_cpu_enabled(index_t i);
+static bool madt_cpu_bootstrap(index_t i);
+static __u8 madt_cpu_apic_id(index_t i);
+struct smp_config_operations madt_config_operations = {
+    .cpu_count = madt_cpu_count,
+    .cpu_enabled = madt_cpu_enabled,
+    .cpu_bootstrap = madt_cpu_bootstrap,
+    .cpu_apic_id = madt_cpu_apic_id
+};
+static count_t madt_cpu_count(void)
+{
+    return madt_l_apic_entry_cnt;
+}
+static bool madt_cpu_enabled(index_t i)
+{
+    ASSERT(i < madt_l_apic_entry_cnt);
+    return madt_l_apic_entries[i].flags & 0x1;
+}
+static bool madt_cpu_bootstrap(index_t i)
+{
+    ASSERT(i < madt_l_apic_entry_cnt);
+    return madt_l_apic_entries[i].apic_id == l_apic_id();
+}
+static __u8 madt_cpu_apic_id(index_t i)
+{
+    ASSERT(i < madt_l_apic_entry_cnt);
+    return madt_l_apic_entries[i].apic_id;
+}
+void acpi_madt_parse(void)
+{
+    struct madt_apic_header *end = (struct madt_apic_header *) (((__u8 *) acpi_madt) + acpi_madt->header.length);
+    struct madt_apic_header *h = &acpi_madt->apic_header[0];
+    __u8 prev_type = 0; /* used to detect inconsecutive entries */
+    l_apic = (__u32 *) acpi_madt->l_apic_address;
+    while (h < end) {
+        switch (h->type) {
+            case MADT_L_APIC:
+                madt_l_apic_entry((struct madt_l_apic *) h, prev_type);
+                break;
+            case MADT_IO_APIC:
+                madt_io_apic_entry((struct madt_io_apic *) h, prev_type);
+                break;
+            case MADT_INTR_SRC_OVRD:
+            case MADT_NMI_SRC:
+            case MADT_L_APIC_NMI:
+            case MADT_L_APIC_ADDR_OVRD:
+            case MADT_IO_SAPIC:
+            case MADT_L_SAPIC:
+            case MADT_PLATFORM_INTR_SRC:
+                printf("MADT: skipping %s entry (type=%d)\n", entry[h->type], h->type);
+                break;
+            default:
+                if (h->type >= MADT_RESERVED_SKIP_BEGIN && h->type <= MADT_RESERVED_SKIP_END) {
+                    printf("MADT: skipping reserved entry (type=%d)\n", h->type);
+                }
+                if (h->type >= MADT_RESERVED_OEM_BEGIN) {
+                    printf("MADT: skipping OEM entry (type=%d)\n", h->type);
+                }
+                break;
+        }
+        prev_type = h->type;
+        h = (struct madt_apic_header *) (((__u8 *) h) + h->length);
+    }
+    if (madt_l_apic_entry_cnt)
+        config.cpu_count = madt_l_apic_entry_cnt;
+}
+void madt_l_apic_entry(struct madt_l_apic *la, __u8 prev_type)
+{
+    /* check for consecutiveness */
+    if (madt_l_apic_entry_cnt && prev_type != MADT_L_APIC)
+    panic("%s entries are not consecuitve\n", entry[MADT_L_APIC]);
+    if (!madt_l_apic_entry_cnt++)
+        madt_l_apic_entries = la;
+    if (!(la->flags & 0x1)) {
+        /* Processor is unusable, skip it. */
+        return;
+    }
+    apic_id_mask |= 1<<la->apic_id;
+}
+void madt_io_apic_entry(struct madt_io_apic *ioa, __u8 prev_type)
+{
+    /* check for consecutiveness */
+    if (madt_io_apic_entry_cnt && prev_type != MADT_IO_APIC)
+    panic("%s entries are not consecuitve\n", entry[MADT_IO_APIC]);
+    if (!madt_io_apic_entry_cnt++) {
+        madt_io_apic_entries = ioa;
+        io_apic = (__u32 *) ioa->io_apic_address;
+    }
+    else {
+        /* currently not supported */
+        return;
+    }
+}
+#endif /* __SMP__ */

 /SPARTAN/trunk/arch/ia32/src/acpi/acpi.c
 ,0 → 1,173
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <arch/acpi/acpi.h>
+#include <arch/acpi/madt.h>
+#include <arch/bios/bios.h>
+#include <mm/page.h>
+#define RSDP_SIGNATURE      "RSD PTR "
+#define RSDP_REVISION_OFFS  15
+struct acpi_rsdp *acpi_rsdp = NULL;
+struct acpi_rsdt *acpi_rsdt = NULL;
+struct acpi_xsdt *acpi_xsdt = NULL;
+struct acpi_signature_map signature_map[] = {
+    { "APIC", (struct acpi_sdt_header **) &acpi_madt, "Multiple APIC Description Table" }
+};
+int rsdp_check(__u8 *rsdp) {
+    struct acpi_rsdp *r = (struct acpi_rsdp *) rsdp;
+    __u8 sum = 0;
+    int i;
+    for (i=0; i<20; i++)
+        sum += rsdp[i];
+    if (sum)
+        return 0; /* bad checksum */
+    if (r->revision == 0)
+        return 1; /* ACPI 1.0 */
+    for (; i<r->length; i++)
+        sum += rsdp[i];
+    return !sum;
+}
+int acpi_sdt_check(__u8 *sdt)
+{
+    struct acpi_sdt_header *h = (struct acpi_sdt_header *) sdt;
+    __u8 sum = 0;
+    int i;
+    for (i=0; i<h->length; i++)
+        sum += sdt[i];
+    return !sum;
+}
+void map_sdt(struct acpi_sdt_header *sdt)
+{
+    map_page_to_frame((__address) sdt, (__address) sdt, PAGE_NOT_CACHEABLE, 0);
+    map_structure((__address) sdt, sdt->length);
+}
+void acpi_init(void)
+{
+    __u8 *addr[2] = { NULL, (__u8 *) 0xe0000 };
+    int i, j, length[2] = { 1024, 128*1024 };
+    __u64 *sig = (__u64 *) RSDP_SIGNATURE;
+    /*
+     * Find Root System Description Pointer
+     * 1. search first 1K of EBDA
+     * 2. search 128K starting at 0xe0000
+     */
+    addr[0] = (__u8 *) ebda;
+    for (i = (ebda ? 0 : 1); i < 2; i++) {
+        for (j = 0; j < length[i]; j += 16) {
+            if (*((__u64 *) &addr[i][j]) == *sig && rsdp_check(&addr[i][j])) {
+                acpi_rsdp = (struct acpi_rsdp *) &addr[i][j];
+                goto rsdp_found;
+            }
+        }
+    }
+    return;
+rsdp_found:
+    printf("%L: ACPI Root System Description Pointer\n", acpi_rsdp);
+    acpi_rsdt = (struct acpi_rsdt *) acpi_rsdp->rsdt_address;
+    if (acpi_rsdp->revision) acpi_xsdt = (struct acpi_xsdt *) ((__address) acpi_rsdp->xsdt_address);
+    if (acpi_rsdt) map_sdt((struct acpi_sdt_header *) acpi_rsdt);
+    if (acpi_xsdt) map_sdt((struct acpi_sdt_header *) acpi_xsdt);
+    if (acpi_rsdt && !acpi_sdt_check((__u8 *) acpi_rsdt)) {
+        printf("RSDT: %s\n", "bad checksum");
+        return;
+    }
+    if (acpi_xsdt && !acpi_sdt_check((__u8 *) acpi_xsdt)) {
+        printf("XSDT: %s\n", "bad checksum");
+        return;
+    }
+    if (acpi_xsdt) configure_via_xsdt();
+    else if (acpi_rsdt) configure_via_rsdt();
+}
+void configure_via_rsdt(void)
+{
+    int i, j, cnt = (acpi_rsdt->header.length - sizeof(struct acpi_sdt_header))/sizeof(__u32);
+    for (i=0; i<cnt; i++) {
+        for (j=0; j<sizeof(signature_map)/sizeof(struct acpi_signature_map); j++) {
+            struct acpi_sdt_header *h = (struct acpi_sdt_header *) acpi_rsdt->entry[i];
+            map_sdt(h);
+            if (*((__u32 *) &h->signature[0])==*((__u32 *) &signature_map[j].signature[0])) {
+                if (!acpi_sdt_check((__u8 *) h))
+                    goto next;
+                *signature_map[j].sdt_ptr = h;
+                printf("%L: ACPI %s\n", *signature_map[j].sdt_ptr, signature_map[j].description);
+            }
+        }
+next:
+        ;
+    }
+}
+void configure_via_xsdt(void)
+{
+    int i, j, cnt = (acpi_xsdt->header.length - sizeof(struct acpi_sdt_header))/sizeof(__u64);
+    for (i=0; i<cnt; i++) {
+        for (j=0; j<sizeof(signature_map)/sizeof(struct acpi_signature_map); j++) {
+            struct acpi_sdt_header *h = (struct acpi_sdt_header *) ((__address) acpi_rsdt->entry[i]);
+            map_sdt(h);
+            if (*((__u32 *) &h->signature[0])==*((__u32 *) &signature_map[j].signature[0])) {
+                if (!acpi_sdt_check((__u8 *) h))
+                    goto next;
+                *signature_map[j].sdt_ptr = h;
+                printf("%L: ACPI %s\n", *signature_map[j].sdt_ptr, signature_map[j].description);
+            }
+        }
+next:
+        ;
+    }
+}

 /SPARTAN/trunk/arch/ia32/src/ia32.c
 ,0 → 1,90
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <arch.h>
+#include <arch/types.h>
+#include <typedefs.h>
+#include <arch/pm.h>
+#include <arch/ega.h>
+#include <arch/i8042.h>
+#include <arch/i8254.h>
+#include <arch/i8259.h>
+#include <arch/context.h>
+#include <config.h>
+#include <arch/interrupt.h>
+#include <arch/asm.h>
+#include <arch/acpi/acpi.h>
+void arch_pre_mm_init(void)
+{
+    pm_init();
+    write_dr0(config.cpu_active - 1);
+    if (config.cpu_active == 1) {
+        bios_init();
+        i8042_init();   /* a20 bit */
+        i8259_init();   /* PIC */
+        i8254_init();   /* hard clock */
+        trap_register(VECTOR_SYSCALL, syscall);
+        #ifdef __SMP__
+        trap_register(VECTOR_TLB_SHOOTDOWN_IPI, tlb_shootdown_ipi);
+        trap_register(VECTOR_WAKEUP_IPI, wakeup_ipi);
+        #endif /* __SMP__ */
+    }
+}
+void arch_post_mm_init(void)
+{
+    if (config.cpu_active == 1) {
+        ega_init(); /* video */
+    }
+}
+void arch_late_init(void)
+{
+    if (config.cpu_active == 1) {
+        #ifdef __SMP__
+        acpi_init();
+        #endif /* __SMP__ */
+    }
+}
+void calibrate_delay_loop(void)
+{
+    i8254_calibrate_delay_loop();
+    i8254_normal_operation();
+}

 /SPARTAN/trunk/arch/ia32/src/fpu_context.c
 ,0 → 1,83
+/*
+ * Copyright (C) 2005 Jakub Vana
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#include <fpu_context.h>
+#include <arch.h>
+#include <cpu.h>
+void fpu_context_save(fpu_context_t *fctx)
+{
+}
+void fpu_context_restore(fpu_context_t *fctx)
+{
+    if(THREAD==CPU->fpu_owner) {reset_TS_flag(); }
+    else
+    {
+        set_TS_flag();
+        if((CPU->fpu_owner)!=NULL)(CPU->fpu_owner)->fpu_context_engaged=1;
+    }
+}
+void fpu_lazy_context_save(fpu_context_t *fctx)
+{
+    asm
+    (
+        "push %%eax;"
+        "mov 0x8(%%esp),%%eax;"
+        "fnsave (%%eax);"
+        "pop %%eax;"
+        :"=m"(fctx)
+        :
+        :"eax"
+    );
+}
+void fpu_lazy_context_restore(fpu_context_t *fctx)
+{
+    asm
+    (
+        "push %%eax;"
+        "mov 0x8(%%esp),%%eax;"
+        "frstor (%%eax);"
+        "pop %%eax;"
+        :"=m"(fctx)
+        :
+        :"eax"
+    );
+}
+void fpu_init(void)
+{
+    asm(
+        "fninit;"
+    );
+}

 /SPARTAN/trunk/arch/ia32/src/context.s
 ,0 → 1,83
+#
+# Copyright (C) 2001-2004 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.global context_save
+.global context_restore
+## Save current CPU context
+#
+# Save CPU context to the kernel_context variable
+# pointed by the 1st argument. Returns 1 in EAX.
+#
+context_save:
+    push %ebx
+    movl 4(%esp),%eax   # the caller's return %eip
+    movl 8(%esp),%ebx   # address of the kernel_context variable to save context to
+    movl %eax,4(%ebx)   # %eip -> ctx->pc
+    movl %esp,(%ebx)    # %esp -> ctx->sp
+    movl %ebx,%eax
+    pop %ebx
+    movl %ebx,8(%eax)
+    movl %ecx,12(%eax)
+    movl %edx,16(%eax)
+    movl %esi,20(%eax)
+    movl %edi,24(%eax)
+    movl %ebp,28(%eax)
+    xorl %eax,%eax      # context_save returns 1
+    incl %eax
+    ret
+## Restore current CPU context
+#
+# Restore CPU context from the kernel_context variable
+# pointed by the 1st argument. Returns 0 in EAX.
+#
+context_restore:
+    movl 4(%esp),%eax   # address of the kernel_context variable to restore context from
+    movl (%eax),%esp    # ctx->sp -> %esp
+    addl $4,%esp        # this is for the pop we don't do
+    movl 8(%eax),%ebx
+    movl 12(%eax),%ecx
+    movl 16(%eax),%edx
+    movl 20(%eax),%esi
+    movl 24(%eax),%edi
+    movl 28(%eax),%ebp
+    movl 4(%eax),%eax
+    movl %eax,(%esp)    # ctx->pc -> saver's return %eip
+    xorl %eax,%eax      # context_restore returns 0
+    ret

 /SPARTAN/trunk/arch/ia32/src/proc/scheduler.c
 ,0 → 1,38
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <proc/scheduler.h>
+#include <cpu.h>
+#include <proc/thread.h>
+#include <arch.h>
+void before_thread_runs_arch(void)
+{
+    CPU->arch.tss->esp0 = (__address) &THREAD->kstack[THREAD_STACK_SIZE-8];
+    CPU->arch.tss->ss0 = selector(KDATA_DES);
+}

 /SPARTAN/trunk/arch/ia32/src/cpuid.s
 ,0 → 1,93
+#
+# Copyright (C) 2001-2004 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# The code below just interfaces the CPUID instruction.
+# CPU recognition logic is contained in higher-level functions.
+.text
+.global has_cpuid
+.global cpuid
+.global rdtsc
+## Determine CPUID support
+#
+# Return 0 in EAX if CPUID is not support, 1 if supported.
+#
+has_cpuid:
+    push %ebx
+    pushf           # store flags
+    popl %eax       # read flags
+    movl %eax,%ebx      # copy flags
+    btcl $21,%ebx       # swap the ID bit
+    pushl %ebx
+    popf            # propagate the change into flags
+    pushf
+    popl %ebx       # read flags
+    andl $(1<<21),%eax  # interested only in ID bit
+    andl $(1<<21),%ebx
+    xorl %ebx,%eax      # 0 if not supported, 1 if supported
+    pop %ebx
+    ret
+## Get CPUID data
+#
+# This code is just an interfaces the CPUID instruction, CPU recognition
+# logic is contained in higher-level functions.
+#
+# The C prototype is:
+#   void cpuid(__u32 cmd, struct cpu_info *info)
+#
+# @param cmd  CPUID command.
+# @param info Buffer to store CPUID output.
+#
+cpuid:
+    pushl %ebp
+    movl %esp,%ebp
+    pusha
+    movl 8(%ebp),%eax   # load the command into %eax
+    movl 12(%ebp),%esi  # laod the address of the info struct
+    cpuid
+    movl %eax,0(%esi)
+    movl %ebx,4(%esi)
+    movl %ecx,8(%esi)
+    movl %edx,12(%esi)
+    popa
+    popl %ebp
+    ret
+rdtsc:
+    rdtsc
+    ret

 /SPARTAN/trunk/arch/ia32/src/drivers/i8259.c
 ,0 → 1,120
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <arch/i8259.h>
+#include <cpu.h>
+#include <arch/types.h>
+#include <arch/asm.h>
+#include <arch.h>
+/*
+ * This is the PIC driver.
+ * Programmable Interrupt Controller for UP systems.
+ */
+void i8259_init(void)
+{
+    /* ICW1: this is ICW1, ICW4 to follow */
+    outb(PIC_PIC0PORT1, PIC_ICW1 | PIC_NEEDICW4);
+    /* ICW2: IRQ 0 maps to INT IRQBASE */
+    outb(PIC_PIC0PORT2, IVT_IRQBASE);
+    /* ICW3: pic1 using IRQ IRQ_PIC1 */
+    outb(PIC_PIC0PORT2, 1 << IRQ_PIC1);
+    /* ICW4: i8086 mode */
+    outb(PIC_PIC0PORT2, 1);
+    /* ICW1: ICW1, ICW4 to follow */
+    outb(PIC_PIC1PORT1, PIC_ICW1 | PIC_NEEDICW4);
+    /* ICW2: IRQ 8 maps to INT (IVT_IRQBASE + 8) */
+    outb(PIC_PIC1PORT2, IVT_IRQBASE + 8);
+    /* ICW3: pic1 is known as PIC_PIC1ID */
+    outb(PIC_PIC1PORT2, PIC_PIC1ID);
+    /* ICW4: i8086 mode */
+    outb(PIC_PIC1PORT2, 1);
+    /*
+     * Register interrupt handler for the PIC spurious interrupt.
+     */
+    trap_register(VECTOR_PIC_SPUR, pic_spurious);
+    /*
+     * Set the enable/disable IRQs handlers.
+     * Set the End-of-Interrupt handler.
+     */
+    enable_irqs_function = pic_enable_irqs;
+    disable_irqs_function = pic_disable_irqs;
+    eoi_function = pic_eoi;
+    pic_disable_irqs(0xffff);       /* disable all irq's */
+    pic_enable_irqs(1<<IRQ_PIC1);       /* but enable pic1 */
+}
+void pic_enable_irqs(__u16 irqmask)
+{
+    __u8 x;
+    if (irqmask & 0xff) {
+        x = inb(PIC_PIC0PORT2);
+        outb(PIC_PIC0PORT2, x & (~(irqmask & 0xff)));
+    }
+    if (irqmask >> 8) {
+        x = inb(PIC_PIC1PORT2);
+        outb(PIC_PIC1PORT2, x & (~(irqmask >> 8)));
+    }
+}
+void pic_disable_irqs(__u16 irqmask)
+{
+    __u8 x;
+    if (irqmask & 0xff) {
+        x = inb(PIC_PIC0PORT2);
+        outb(PIC_PIC0PORT2, x | (irqmask & 0xff));
+    }
+    if (irqmask >> 8) {
+        x = inb(PIC_PIC1PORT2);
+        outb(PIC_PIC1PORT2, x | (irqmask >> 8));
+    }
+}
+void pic_eoi(void)
+{
+    outb(0x20,0x20);
+    outb(0xa0,0x20);
+}
+void pic_spurious(__u8 n, __u32 stack[])
+{
+    printf("cpu%d: PIC spurious interrupt\n", CPU->id);
+}

 /SPARTAN/trunk/arch/ia32/src/drivers/i8254.c
 ,0 → 1,127
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <arch/types.h>
+#include <time/clock.h>
+#include <time/delay.h>
+#include <arch/interrupt.h>
+#include <arch/i8259.h>
+#include <arch/i8254.h>
+#include <cpu.h>
+#include <config.h>
+#include <arch/pm.h>
+#include <arch/asm.h>
+#include <arch.h>
+/*
+ * i8254 chip driver.
+ * Low level time functions.
+ */
+#define CLK_PORT1   0x40
+#define CLK_PORT4   0x43
+#define CLK_CONST   1193180
+#define MAGIC_NUMBER    1194
+void i8254_init(void)
+{
+    i8254_normal_operation();
+}
+void i8254_normal_operation(void)
+{
+    outb(CLK_PORT4, 0x36);
+    trap_virtual_disable_irqs(1<<IRQ_CLK);
+    outb(CLK_PORT1, (CLK_CONST/HZ) & 0xf);
+    outb(CLK_PORT1, (CLK_CONST/HZ) >> 8);
+    trap_virtual_enable_irqs(1<<IRQ_CLK);
+    trap_register(VECTOR_CLK, i8254_interrupt);
+}
+#define LOOPS 150000
+#define SHIFT 11
+void i8254_calibrate_delay_loop(void)
+{
+    __u64 clk1, clk2;
+    __u32 t1, t2, o1, o2;
+    __u8 not_ok;
+    /*
+     * One-shot timer. Count-down from 0xffff at 1193180Hz
+     * MAGIC_NUMBER is the magic value for 1ms.
+     */
+    outb(CLK_PORT4, 0x30);
+    outb(CLK_PORT1, 0xff);
+    outb(CLK_PORT1, 0xff);
+    do {
+        /* will read both status and count */
+        outb(CLK_PORT4, 0xc2);
+        not_ok = (inb(CLK_PORT1)>>6)&1;
+        t1 = inb(CLK_PORT1);
+        t1 |= inb(CLK_PORT1) << 8;
+    } while (not_ok);
+    asm_delay_loop(LOOPS);
+    outb(CLK_PORT4, 0xd2);
+    t2 = inb(CLK_PORT1);
+    t2 |= inb(CLK_PORT1) << 8;
+    /*
+     * We want to determine the overhead of the calibrating mechanism.
+     */
+    outb(CLK_PORT4, 0xd2);
+    o1 = inb(CLK_PORT1);
+    o1 |= inb(CLK_PORT1) << 8;
+    asm_fake_loop(LOOPS);
+    outb(CLK_PORT4, 0xd2);
+    o2 = inb(CLK_PORT1);
+    o2 |= inb(CLK_PORT1) << 8;
+    CPU->delay_loop_const = ((MAGIC_NUMBER*LOOPS)/1000) / ((t1-t2)-(o1-o2)) + (((MAGIC_NUMBER*LOOPS)/1000) % ((t1-t2)-(o1-o2)) ? 1 : 0);
+    clk1 = rdtsc();
+    delay(1<<SHIFT);
+    clk2 = rdtsc();
+    CPU->frequency_mhz = (clk2-clk1)>>SHIFT;
+    return;
+}
+void i8254_interrupt(__u8 n, __u32 stack[])
+{
+    trap_virtual_eoi();
+    clock();
+}

 /SPARTAN/trunk/arch/ia32/src/drivers/ega.c
 ,0 → 1,116
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <arch/ega.h>
+#include <putchar.h>
+#include <mm/page.h>
+#include <synch/spinlock.h>
+#include <arch/types.h>
+#include <arch/asm.h>
+/*
+ * The EGA driver.
+ * Simple and short. Function for displaying characters and "scrolling".
+ */
+static spinlock_t egalock;
+static __u32 ega_cursor;
+void ega_move_cursor(void);
+void ega_init(void)
+{
+    __u8 hi, lo;
+    map_page_to_frame(PA2KA(VIDEORAM), VIDEORAM, PAGE_NOT_CACHEABLE, 0);
+    outb(0x3d4,0xe);
+    hi = inb(0x3d5);
+    outb(0x3d4,0xf);
+    lo = inb(0x3d5);
+    ega_cursor = (hi<<8)|lo;
+    ega_putchar('\n');
+}
+void ega_display_char(char ch)
+{
+    __u8 *vram = (__u8 *) PA2KA(VIDEORAM);
+    vram[ega_cursor*2] = ch;
+}
+/*
+ * This function takes care of scrolling.
+ */
+void ega_check_cursor(void)
+{
+    if (ega_cursor < SCREEN)
+        return;
+    memcopy(PA2KA(VIDEORAM) + ROW*2, PA2KA(VIDEORAM), (SCREEN - ROW)*2);
+    memsetw(PA2KA(VIDEORAM) + (SCREEN - ROW)*2, ROW, 0x0720);
+    ega_cursor = ega_cursor - ROW;
+}
+void ega_putchar(const char ch)
+{
+    pri_t pri;
+    pri = cpu_priority_high();
+    spinlock_lock(&egalock);
+    switch (ch) {
+        case '\n':
+        ega_cursor = (ega_cursor + ROW) - ega_cursor % ROW;
+        break;
+        case '\t':
+        ega_cursor = (ega_cursor + 8) - ega_cursor % 8;
+        break;
+        default:
+        ega_display_char(ch);
+        ega_cursor++;
+        break;
+        }
+    ega_check_cursor();
+    ega_move_cursor();
+    spinlock_unlock(&egalock);
+    cpu_priority_restore(pri);
+}
+void ega_move_cursor(void)
+{
+    outb(0x3d4,0xe);
+    outb(0x3d5,(ega_cursor>>8)&0xff);
+    outb(0x3d4,0xf);
+    outb(0x3d5,ega_cursor&0xff);
+}
+void putchar(const char ch)
+{
+    ega_putchar(ch);
+}

 /SPARTAN/trunk/arch/ia32/src/drivers/i8042.c
 ,0 → 1,58
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <arch/i8042.h>
+#include <arch/i8259.h>
+#include <arch/interrupt.h>
+#include <cpu.h>
+#include <arch/asm.h>
+#include <arch.h>
+#include <print.h>
+/*
+ * i8042 processor driver.
+ * Its very essential function is enabling the A20.
+ */
+void i8042_init(void)
+{
+    /* A20: deadly if not enabled */
+    outb(0x64,0xd1);
+    outb(0x60,0xdf);
+    trap_register(VECTOR_KBD, i8042_interrupt);
+}
+void i8042_interrupt(__u8 n, __u32 stack[])
+{
+    __u8 x;
+    trap_virtual_eoi();
+    x = inb(0x60);
+    printf("%d", CPU->id);;
+}

 /SPARTAN/trunk/arch/ia32/src/atomic.S
 ,0 → 1,60
+#
+# Copyright (C) 2001-2004 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+#ifdef __SMP__
+.global spinlock_arch
+#
+# This is a bus-and-hyperthreading-friendly implementation of spinlock
+#
+spinlock_arch:
+    pushl %eax
+    pushl %ebx
+    movl 12(%esp),%ebx
+:
+    #ifdef __HT__
+    pause           # Pentium 4's with HT love this instruction
+    #endif
+    movl (%ebx),%eax
+    testl %eax,%eax
+    jnz 0b          # lightweight looping while it is locked
+    incl %eax
+    xchgl %eax,(%ebx)   # now use the atomic operation
+    testl %eax,%eax
+    jnz 0b
+    popl %ebx
+    popl %eax
+    ret
+#endif

 /SPARTAN/trunk/arch/ia32/src/debug/panic.s
 ,0 → 1,34
+#
+# Copyright (C) 2001-2004 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.global panic_printf
+panic_printf:
+    movl $halt,(%esp)   # fake stack to make printf return to halt
+    jmp printf

 /SPARTAN/trunk/arch/ia32/src/bios/bios.c
 ,0 → 1,38
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <arch/bios/bios.h>
+#include <arch/types.h>
+__address ebda = 0;
+void bios_init(void)
+{
+    /* Copy the EBDA address out from BIOS Data Area */
+    ebda = *((__u16 *) BIOS_EBDA_PTR) * 0x10;
+}

 /SPARTAN/trunk/arch/ia32/src/delay.s
 ,0 → 1,54
+#
+# Copyright (C) 2001-2004 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#
+# Micro second delay loop functions.
+#
+.text
+.global asm_delay_loop
+.global asm_fake_loop
+asm_delay_loop:
+    pushl %ecx
+    movl 8(%esp),%ecx   # move argument to %ecx
+:  lahf
+    dec %ecx
+    jnz 0b
+    popl %ecx
+    ret
+asm_fake_loop:
+    pushl %ecx
+    movl 8(%esp),%ecx   # move argument to %ecx
+:  lahf
+    dec %ecx
+    jz 0b
+    popl %ecx
+    ret

 /SPARTAN/trunk/arch/ia32/include/mm/memory_init.h
 ,0 → 1,36
+/*
+ * Copyright (C) 2005 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __ia32_MEMORY_INIT_H__
+#define __ia32_MEMORY_INIT_H__
+#include <typedefs.h>
+size_t get_memory_size(void);
+#endif

 /SPARTAN/trunk/arch/ia32/include/mm/page.h
 ,0 → 1,114
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __ia32_PAGE_H__
+#define __ia32_PAGE_H__
+#include <mm/page.h>
+#include <arch/types.h>
+#include <arch/mm/frame.h>
+#include <typedefs.h>
+#define PAGE_SIZE   FRAME_SIZE
+#define KA2PA(x)    ((x) - 0x80000000)
+#define PA2KA(x)    ((x) + 0x80000000)
+/*
+ * Implementation of generic 4-level page table interface.
+ * IA-32 has 2-level page tables, so PTL1 and PTL2 are left out.
+ */
+#define PTL0_INDEX_ARCH(vaddr)  (((vaddr)>>22)&0x3ff)
+#define PTL1_INDEX_ARCH(vaddr)  0
+#define PTL2_INDEX_ARCH(vaddr)  0
+#define PTL3_INDEX_ARCH(vaddr)  (((vaddr)>>12)&0x3ff)
+#define GET_PTL0_ADDRESS_ARCH()         ((pte_t *) read_cr3())
+#define GET_PTL1_ADDRESS_ARCH(ptl0, i)      ((pte_t *)((((pte_t *)(ptl0))[(i)].frame_address)<<12))
+#define GET_PTL2_ADDRESS_ARCH(ptl1, i)      (ptl1)
+#define GET_PTL3_ADDRESS_ARCH(ptl2, i)      (ptl2)
+#define GET_FRAME_ADDRESS_ARCH(ptl3, i)     ((__address)((((pte_t *)(ptl3))[(i)].frame_address)<<12))
+#define SET_PTL0_ADDRESS_ARCH(ptl0)     (write_cr3((__address) (ptl0)))
+#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a)   (((pte_t *)(ptl0))[(i)].frame_address = (a)>>12)
+#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
+#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
+#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a)  (((pte_t *)(ptl3))[(i)].frame_address = (a)>>12)
+#define GET_PTL1_FLAGS_ARCH(ptl0, i)        get_pt_flags((pte_t *)(ptl0), (index_t)(i))
+#define GET_PTL2_FLAGS_ARCH(ptl1, i)        PAGE_PRESENT
+#define GET_PTL3_FLAGS_ARCH(ptl2, i)        PAGE_PRESENT
+#define GET_FRAME_FLAGS_ARCH(ptl3, i)       get_pt_flags((pte_t *)(ptl3), (index_t)(i))
+#define SET_PTL1_FLAGS_ARCH(ptl0, i, x)     set_pt_flags((pte_t *)(ptl0), (index_t)(i), (x))
+#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
+#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
+#define SET_FRAME_FLAGS_ARCH(ptl3, i, x)    set_pt_flags((pte_t *)(ptl3), (index_t)(i), (x))
+struct page_specifier {
+    unsigned present : 1;
+    unsigned writeable : 1;
+    unsigned uaccessible : 1;
+    unsigned page_write_through : 1;
+    unsigned page_cache_disable : 1;
+    unsigned accessed : 1;
+    unsigned dirty : 1;
+    unsigned : 2;
+    unsigned avl : 3;
+    unsigned frame_address : 20;
+} __attribute__ ((packed));
+typedef struct page_specifier pte_t;
+static inline int get_pt_flags(pte_t *pt, index_t i)
+{
+    pte_t *p = &pt[i];
+    return (
+        (!p->page_cache_disable)<<PAGE_CACHEABLE_SHIFT |
+        (!p->present)<<PAGE_PRESENT_SHIFT |
+        p->uaccessible<<PAGE_USER_SHIFT |
+<<PAGE_READ_SHIFT |
+        p->writeable<<PAGE_WRITE_SHIFT |
+<<PAGE_EXEC_SHIFT
+    );
+}
+static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
+{
+    pte_t *p = &pt[i];
+    p->page_cache_disable = !(flags & PAGE_CACHEABLE);
+    p->present = !(flags & PAGE_NOT_PRESENT);
+    p->uaccessible = (flags & PAGE_USER) != 0;
+    p->writeable = (flags & PAGE_WRITE) != 0;
+}
+extern void page_arch_init(void);
+#endif

 /SPARTAN/trunk/arch/ia32/include/mm/vm.h
 ,0 → 1,43
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __ia32_VM_H__
+#define __ia32_VM_H__
+#include <arch/types.h>
+#define KERNEL_ADDRESS_SPACE_START_ARCH     (__address) 0x80000000
+#define KERNEL_ADDRESS_SPACE_END_ARCH       (__address) 0xffffffff
+#define USER_ADDRESS_SPACE_START_ARCH       (__address) 0x00000000
+#define USER_ADDRESS_SPACE_END_ARCH     (__address) 0x7fffffff
+#define UTEXT_ADDRESS_ARCH  0x00001000
+#define USTACK_ADDRESS_ARCH (0x7fffffff-(PAGE_SIZE-1))
+#define UDATA_ADDRESS_ARCH  0x21000000
+#endif

 /SPARTAN/trunk/arch/ia32/include/mm/frame.h
 ,0 → 1,40
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __ia32_FRAME_H__
+#define __ia32_FRAME_H__
+#include <arch/types.h>
+#define FRAME_SIZE  4096
+extern __address bootstrap_dba;
+extern void frame_arch_init(void);
+#endif

 /SPARTAN/trunk/arch/ia32/include/boot/memmap.h
 ,0 → 1,48
+/*
+ * Copyright (C) 2005 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __ia32_MEMMAP_H__
+#define __ia32_MEMMAP_H__
+#include <arch/boot/memmapasm.h>
+#include <arch/types.h>
+struct e820memmap_ {
+    __u64 base_address;
+    __u64 size;
+    __u32 type;
+    } __attribute__ ((packed));
+extern struct e820memmap_ e820table[MEMMAP_E820_MAX_RECORDS];
+extern __u8 e820counter;
+extern __u32 e801memorysize; // size of memory in KB
+#endif

 /SPARTAN/trunk/arch/ia32/include/boot/memmapasm.h
 ,0 → 1,50
+/*
+ * Copyright (C) 2005 Josef Cejka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __ia32_MEMMAPASM_H__
+#define __ia32_MEMMAPASM_H__
+/* E820h memory range types - other values*/
+    /* Free memory */
+#define MEMMAP_MEMORY_AVAILABLE 1
+    /* Not available for OS */
+#define MEMMAP_MEMORY_RESERVED  2
+    /* OS may use it after reading ACPI table */
+#define MEMMAP_MEMORY_ACPI  3
+    /* Unusable, required to be saved and restored across an NVS sleep */
+#define MEMMAP_MEMORY_NVS   4
+    /* Corrupted memory */
+#define MEMMAP_MEMORY_UNUSABLE  5
+     /* size of one entry */
+#define MEMMAP_E820_RECORD_SIZE 20
+    /* maximum entries */
+#define MEMMAP_E820_MAX_RECORDS 32
+#endif

 /SPARTAN/trunk/arch/ia32/include/asm.h
 ,0 → 1,159
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __ia32_ASM_H__
+#define __ia32_ASM_H__
+#include <arch/types.h>
+#include <typedefs.h>
+#include <mm/page.h>
+#include <synch/spinlock.h>
+#include <arch/boot/memmap.h>
+extern __u32 interrupt_handler_size;
+extern void paging_on(void);
+extern void interrupt_handlers(void);
+extern __u8 inb(int port);
+extern __u16 inw(int port);
+extern __u32 inl(int port);
+extern void outb(int port, __u8 b);
+extern void outw(int port, __u16 w);
+extern void outl(int port, __u32 l);
+extern void enable_l_apic_in_msr(void);
+/** Halt CPU
+ *
+ * Halt the current CPU until interrupt event.
+ */
+static inline void cpu_halt(void) { __asm__("hlt"); };
+static inline void cpu_sleep(void) { __asm__("hlt"); };
+/** Read CR2
+ *
+ * Return value in CR2
+ *
+ * @return Value read.
+ */
+static inline __u32 read_cr2(void) { __u32 v; __asm__ volatile ("movl %%cr2,%0" : "=r" (v)); return v; }
+/** Write CR3
+ *
+ * Write value to CR3.
+ *
+ * @param v Value to be written.
+ */
+static inline void write_cr3(__u32 v) { __asm__ volatile ("movl %0,%%cr3\n" : : "r" (v)); }
+/** Read CR3
+ *
+ * Return value in CR3
+ *
+ * @return Value read.
+ */
+static inline __u32 read_cr3(void) { __u32 v; __asm__ volatile ("movl %%cr3,%0" : "=r" (v)); return v; }
+/** Write DR0
+ *
+ * Write value to DR0.
+ *
+ * @param v Value to be written.
+ */
+static inline void write_dr0(__u32 v) { __asm__ volatile ("movl %0,%%dr0\n" : : "r" (v)); }
+/** Read DR0
+ *
+ * Return value in DR0
+ *
+ * @return Value read.
+ */
+static inline __u32 read_dr0(void) { __u32 v; __asm__ volatile ("movl %%dr0,%0" : "=r" (v)); return v; }
+/** Set priority level low
+ *
+ * Enable interrupts and return previous
+ * value of EFLAGS.
+ */
+static inline pri_t cpu_priority_low(void) {
+    pri_t v;
+    __asm__ volatile (
+        "pushf\n"
+        "popl %0\n"
+        "sti\n"
+        : "=r" (v)
+    );
+    return v;
+}
+/** Set priority level high
+ *
+ * Disable interrupts and return previous
+ * value of EFLAGS.
+ */
+static inline pri_t cpu_priority_high(void) {
+    pri_t v;
+    __asm__ volatile (
+        "pushf\n"
+        "popl %0\n"
+        "cli\n"
+        : "=r" (v)
+    );
+    return v;
+}
+/** Restore priority level
+ *
+ * Restore EFLAGS.
+ */
+static inline void cpu_priority_restore(pri_t pri) {
+    __asm__ volatile (
+        "pushl %0\n"
+        "popf\n"
+        : : "r" (pri)
+    );
+}
+/** Return raw priority level
+ *
+ * Return EFLAFS.
+ */
+static inline pri_t cpu_priority_read(void) {
+    pri_t v;
+    __asm__ volatile (
+        "pushf\n"
+        "popl %0\n"
+        : "=r" (v)
+    );
+    return v;
+}
+#endif

 /SPARTAN/trunk/arch/ia32/include/acpi/madt.h
 ,0 → 1,140
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __MADT_H__
+#define __MADT_H__
+#include <arch/acpi/acpi.h>
+#include <arch/smp/apic.h>
+#include <arch/smp/smp.h>
+#define MADT_L_APIC         0
+#define MADT_IO_APIC            1
+#define MADT_INTR_SRC_OVRD      2
+#define MADT_NMI_SRC            3
+#define MADT_L_APIC_NMI         4
+#define MADT_L_APIC_ADDR_OVRD       5
+#define MADT_IO_SAPIC           6
+#define MADT_L_SAPIC            7
+#define MADT_PLATFORM_INTR_SRC      8
+#define MADT_RESERVED_SKIP_BEGIN    9
+#define MADT_RESERVED_SKIP_END      127
+#define MADT_RESERVED_OEM_BEGIN     128
+struct madt_apic_header {
+    __u8 type;
+    __u8 length;
+} __attribute__ ((packed));
+/* Multiple APIC Description Table */
+struct acpi_madt {
+    struct acpi_sdt_header header;
+    __u32 l_apic_address;
+    __u32 flags;
+    struct madt_apic_header apic_header[];
+} __attribute__ ((packed));
+struct madt_l_apic {
+    struct madt_apic_header header;
+    __u8 acpi_id;
+    __u8 apic_id;
+    __u32 flags;
+} __attribute__ ((packed));
+struct madt_io_apic {
+    struct madt_apic_header header;
+    __u8 io_apic_id;
+    __u8 reserved;
+    __u32 io_apic_address;
+    __u32 global_intr_base;
+} __attribute__ ((packed));
+struct madt_intr_src_ovrd {
+    struct madt_apic_header header;
+    __u8 bus;
+    __u8 source;
+    __u32 global_intr;
+    __u16 flags;
+} __attribute__ ((packed));
+struct madt_nmi_src {
+    struct madt_apic_header header;
+    __u16 flags;
+    __u32 global_intr;
+} __attribute__ ((packed));
+struct madt_l_apic_nmi {
+    struct madt_apic_header header;
+    __u8 acpi_id;
+    __u16 flags;
+    __u8 l_apic_lint;
+} __attribute__ ((packed));
+struct madt_l_apic_addr_ovrd {
+    struct madt_apic_header header;
+    __u16 reserved;
+    __u64 l_apic_address;
+} __attribute__ ((packed));
+struct madt_io_sapic {
+    struct madt_apic_header header;
+    __u8 io_apic_id;
+    __u8 reserved;
+    __u32 global_intr_base;
+    __u64 io_apic_address;
+} __attribute__ ((packed));
+struct madt_l_sapic {
+    struct madt_apic_header header;
+    __u8 acpi_id;
+    __u8 sapic_id;
+    __u8 sapic_eid;
+    __u8 reserved[3];
+    __u32 flags;
+    __u32 acpi_processor_uid_value;
+    __u8 acpi_processor_uid_str[1];
+} __attribute__ ((packed));
+struct madt_platform_intr_src {
+    struct madt_apic_header header;
+    __u16 flags;
+    __u8 intr_type;
+    __u8 processor_id;
+    __u8 processor_eid;
+    __u8 io_sapic_vector;
+    __u32 global_intr;
+    __u32 platform_intr_src_flags;
+} __attribute__ ((packed));
+extern struct acpi_madt *acpi_madt;
+extern struct smp_config_operations madt_config_operations;
+extern void acpi_madt_parse(void);
+#endif /* __MADT_H__ */

 /SPARTAN/trunk/arch/ia32/include/acpi/acpi.h
 ,0 → 1,89
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __ACPI_H__
+#define __ACPI_H__
+#include <arch/types.h>
+/* Root System Description Pointer */
+struct acpi_rsdp {
+    __u8 signature[8];
+    __u8 checksum;
+    __u8 oemid[6];
+    __u8 revision;
+    __u32 rsdt_address;
+    __u32 length;
+    __u64 xsdt_address;
+    __u32 ext_checksum;
+    __u8 reserved[3];
+} __attribute__ ((packed));
+/* System Description Table Header */
+struct acpi_sdt_header {
+    __u8 signature[4];
+    __u32 length;
+    __u8 revision;
+    __u8 checksum;
+    __u8 oemid[6];
+    __u8 oem_table_id[8];
+    __u32 oem_revision;
+    __u32 creator_id;
+    __u32 creator_revision;
+} __attribute__ ((packed));;
+struct acpi_signature_map {
+    __u8 *signature;
+    struct acpi_sdt_header **sdt_ptr;
+    char *description;
+};
+/* Root System Description Table */
+struct acpi_rsdt {
+    struct acpi_sdt_header header;
+    __u32 entry[];
+} __attribute__ ((packed));;
+/* Extended System Description Table */
+struct acpi_xsdt {
+    struct acpi_sdt_header header;
+    __u64 entry[];
+} __attribute__ ((packed));;
+extern struct acpi_rsdp *acpi_rsdp;
+extern struct acpi_rsdt *acpi_rsdt;
+extern struct acpi_xsdt *acpi_xsdt;
+extern void acpi_init(void);
+static int rsdp_check(__u8 *rsdp);
+static void map_sdt(struct acpi_sdt_header *sdt);
+extern int acpi_sdt_check(__u8 *sdt);
+static void configure_via_rsdt(void);
+static void configure_via_xsdt(void);
+#endif /* __ACPI_H__ */

 /SPARTAN/trunk/arch/ia32/include/smp/mps.h
 ,0 → 1,128
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __MPS_H__
+#define __MPS_H__
+#include <arch/types.h>
+#include <typedefs.h>
+#include <synch/waitq.h>
+#include <config.h>
+#include <arch/smp/smp.h>
+#define CT_EXT_ENTRY_TYPE       0
+#define CT_EXT_ENTRY_LEN        1
+struct mps_fs {
+    __u32 signature;
+    struct mps_ct *configuration_table;
+    __u8 length;
+    __u8 revision;
+    __u8 checksum;
+    __u8 config_type;
+    __u8 mpfib2;
+    __u8 mpfib3;
+    __u8 mpfib4;
+    __u8 mpfib5;
+} __attribute__ ((packed));
+struct mps_ct {
+    __u32 signature;
+    __u16 base_table_length;
+    __u8 revision;
+    __u8 checksum;
+    __u8 oem_id[8];
+    __u8 product_id[12];
+    __u8 *oem_table;
+    __u16 oem_table_size;
+    __u16 entry_count;
+    __u32 *l_apic;
+    __u16 ext_table_length;
+    __u8 ext_table_checksum;
+    __u8 xxx;
+    __u8 base_table[0];
+} __attribute__ ((packed));
+struct __processor_entry {
+    __u8 type;
+    __u8 l_apic_id;
+    __u8 l_apic_version;
+    __u8 cpu_flags;
+    __u8 cpu_signature[4];
+    __u32 feature_flags;
+    __u32 xxx[2];
+} __attribute__ ((packed));
+struct __bus_entry {
+    __u8 type;
+    __u8 bus_id;
+    __u8 bus_type[6];
+} __attribute__ ((packed));
+struct __io_apic_entry {
+    __u8 type;
+    __u8 io_apic_id;
+    __u8 io_apic_version;
+    __u8 io_apic_flags;
+    __u32 *io_apic;
+} __attribute__ ((packed));
+struct __io_intr_entry {
+    __u8 type;
+    __u8 intr_type;
+    __u8 poel;
+    __u8 xxx;
+    __u8 src_bus_id;
+    __u8 src_bus_irq;
+    __u8 dst_io_apic_id;
+    __u8 dst_io_apic_pin;
+} __attribute__ ((packed));
+struct __l_intr_entry {
+    __u8 type;
+    __u8 intr_type;
+    __u8 poel;
+    __u8 xxx;
+    __u8 src_bus_id;
+    __u8 src_bus_irq;
+    __u8 dst_l_apic_id;
+    __u8 dst_l_apic_pin;
+} __attribute__ ((packed));
+extern waitq_t ap_completion_wq;
+extern waitq_t kmp_completion_wq;
+extern struct smp_config_operations mps_config_operations;
+extern int mps_irq_to_pin(int irq);
+extern void mps_init(void);
+extern void kmp(void *arg);
+#endif

 /SPARTAN/trunk/arch/ia32/include/smp/smp.h
 ,0 → 1,42
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __ia32_SMP_H__
+#define __ia32_SMP_H__
+#include <arch/types.h>
+#include <typedefs.h>
+struct smp_config_operations {
+    count_t (* cpu_count)(void);
+    bool (* cpu_enabled)(index_t i);
+    bool (*cpu_bootstrap)(index_t i);
+    __u8 (*cpu_apic_id)(index_t i);
+};
+#endif

 /SPARTAN/trunk/arch/ia32/include/smp/apic.h
 ,0 → 1,140
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __APIC_H__
+#define __APIC_H__
+#include <arch/types.h>
+#include <cpu.h>
+#define FIXED       (0<<0)
+#define LOPRI       (1<<0)
+/* local APIC macros */
+#define IPI_INIT    0
+#define IPI_STARTUP 0
+#define DLVRMODE_FIXED  (0<<8)
+#define DLVRMODE_INIT   (5<<8)
+#define DLVRMODE_STUP   (6<<8)
+#define DESTMODE_PHYS   (0<<11)
+#define DESTMODE_LOGIC  (1<<11)
+#define LEVEL_ASSERT    (1<<14)
+#define LEVEL_DEASSERT  (0<<14)
+#define TRGRMODE_LEVEL  (1<<15)
+#define TRGRMODE_EDGE   (0<<15)
+#define SHORTHAND_DEST  (0<<18)
+#define SHORTHAND_INCL  (2<<18)
+#define SHORTHAND_EXCL  (3<<18)
+#define SEND_PENDING    (1<<12)
+/* Interrupt Command Register */
+#define ICRlo       (0x300/sizeof(__u32))
+#define ICRhi       (0x310/sizeof(__u32))
+#define ICRloClear  ((1<<13)|(3<<16)|(0xfff<<20))
+#define ICRhiClear  (0xffffff<<0)
+/* End Of Interrupt */
+#define EOI     (0x0b0/sizeof(__u32))
+/* Error Status Register */
+#define ESR     (0x280/sizeof(__u32))
+#define ESRClear    ((0xffffff<<8)|(1<<4))
+/* Task Priority Register */
+#define TPR     (0x080/sizeof(__u32))
+#define TPRClear    0xffffff00
+/* Spurious Vector Register */
+#define SVR     (0x0f0/sizeof(__u32))
+#define SVRClear    (~0x3f0)
+/* Time Divide Configuratio Register */
+#define TDCR        (0x3e0/sizeof(__u32))
+#define TDCRClear   (~0xb)
+/* Initial Count Register for Timer */
+#define ICRT        (0x380/sizeof(__u32))
+/* Current Count Register for Timer */
+#define CCRT        (0x390/sizeof(__u32))
+/* LVT */
+#define LVT_Tm      (0x320/sizeof(__u32))
+#define LVT_LINT0   (0x350/sizeof(__u32))
+#define LVT_LINT1   (0x360/sizeof(__u32))
+#define LVT_Err     (0x370/sizeof(__u32))
+#define LVT_PCINT   (0x340/sizeof(__u32))
+/* Local APIC ID Register */
+#define L_APIC_ID   (0x020/sizeof(__u32))
+#define L_APIC_IDClear  (~(0xf<<24))
+#define L_APIC_IDShift  24
+#define L_APIC_IDMask   0xf
+/* Local APIC Version Register */
+#define LAVR        (0x030/sizeof(__u32))
+#define LAVR_Mask   0xff
+#define is_local_apic(x)    (((x)&LAVR_Mask&0xf0)==0x1)
+#define is_82489DX_apic(x)  ((((x)&LAVR_Mask&0xf0)==0x0))
+#define is_local_xapic(x)   (((x)&LAVR_Mask)==0x14)
+/* IO APIC */
+#define IOREGSEL    (0x00/sizeof(__u32))
+#define IOWIN       (0x10/sizeof(__u32))
+#define IOAPICID    0x00
+#define IOAPICVER   0x01
+#define IOAPICARB   0x02
+#define IOREDTBL    0x10
+extern volatile __u32 *l_apic;
+extern volatile __u32 *io_apic;
+extern __u32 apic_id_mask;
+extern void apic_init(void);
+extern void apic_spurious(__u8 n, __u32 stack[]);
+extern void l_apic_init(void);
+extern void l_apic_eoi(void);
+extern int l_apic_broadcast_custom_ipi(__u8 vector);
+extern int l_apic_send_init_ipi(__u8 apicid);
+extern void l_apic_debug(void);
+extern void l_apic_timer_interrupt(__u8 n, __u32 stack[]);
+extern __u8 l_apic_id(void);
+extern __u32 io_apic_read(__u8 address);
+extern void io_apic_write(__u8 address , __u32 x);
+extern void io_apic_change_ioredtbl(int signal, int dest, __u8 v, int flags);
+extern void io_apic_disable_irqs(__u16 irqmask);
+extern void io_apic_enable_irqs(__u16 irqmask);
+#endif

 /SPARTAN/trunk/arch/ia32/include/smp/ap.h
 ,0 → 1,34
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __AP_H__
+#define __AP_H__
+extern void ap_boot(void);
+#endif

 /SPARTAN/trunk/arch/ia32/include/cpu.h
 ,0 → 1,56
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __ia32_CPU_H__
+#define __ia32_CPU_H__
+#include <config.h>
+#include <proc/thread.h>
+#include <typedefs.h>
+#include <arch/pm.h>
+#include <arch/asm.h>
+#ifdef __SMP__
+#define CPU_ID_ARCH (read_dr0())
+#else
+#define CPU_ID_ARCH (0)
+#endif
+struct cpu_arch {
+    int vendor;
+    int family;
+    int model;
+    int stepping;
+    struct tss *tss;
+};
+void set_TS_flag(void);
+void reset_TS_flag(void);
+#endif

 /SPARTAN/trunk/arch/ia32/include/atomic.h
 ,0 → 1,66
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __ia32_ATOMIC_H__
+#define __ia32_ATOMIC_H__
+#include <arch/types.h>
+static inline void atomic_inc(volatile int *val) {
+#ifdef __SMP__
+    __asm__ volatile ("lock incl (%0)\n" : : "r" (val));
+#else
+    __asm__ volatile ("incl (%0)\n" : : "r" (val));
+#endif /* __SMP__ */
+}
+static inline void atomic_dec(volatile int *val) {
+#ifdef __SMP__
+    __asm__ volatile ("lock decl (%0)\n" : : "r" (val));
+#else
+    __asm__ volatile ("decl (%0)\n" : : "r" (val));
+#endif /* __SMP__ */
+}
+static inline int test_and_set(volatile int *val) {
+    int v;
+    __asm__ volatile (
+        "movl $1, %0\n"
+        "xchgl %0, (%1)\n"
+        : "=r" (v)
+        : "r" (val)
+    );
+    return v;
+}
+extern void spinlock_arch(volatile int *val);
+#endif

 /SPARTAN/trunk/arch/ia32/include/pm.h
 ,0 → 1,147
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __PM_H__
+#define __PM_H__
+#include <arch/types.h>
+#include <typedefs.h>
+#include <arch/context.h>
+#define IDT_ITEMS 64
+#define GDT_ITEMS 6
+#define NULL_DES    0
+#define KTEXT_DES   1
+#define KDATA_DES   2
+#define UTEXT_DES   3
+#define UDATA_DES   4
+#define TSS_DES     5
+#define selector(des)   ((des)<<3)
+#define PL_KERNEL   0
+#define PL_USER     3
+#define AR_PRESENT  (1<<7)
+#define AR_DATA     (2<<3)
+#define AR_CODE     (3<<3)
+#define AR_WRITABLE (1<<1)
+#define AR_INTERRUPT    (0xe)
+#define AR_TSS      (0x9)
+#define DPL_KERNEL  (PL_KERNEL<<5)
+#define DPL_USER    (PL_USER<<5)
+#define IO_MAP_BASE (104)
+struct ptr_16_32 {
+    __u16 limit;
+    __u32 base;
+} __attribute__ ((packed));
+struct descriptor {
+    unsigned limit_0_15: 16;
+    unsigned base_0_15: 16;
+    unsigned base_16_23: 8;
+    unsigned access: 8;
+    unsigned limit_16_19: 4;
+    unsigned available: 1;
+    unsigned unused: 1;
+    unsigned special: 1;
+    unsigned granularity : 1;
+    unsigned base_24_31: 8;
+} __attribute__ ((packed));
+struct idescriptor {
+    unsigned offset_0_15: 16;
+    unsigned selector: 16;
+    unsigned unused: 8;
+    unsigned access: 8;
+    unsigned offset_16_31: 16;
+} __attribute__ ((packed));
+struct tss {
+    __u16 link;
+    unsigned : 16;
+    __u32 esp0;
+    __u16 ss0;
+    unsigned : 16;
+    __u32 esp1;
+    __u16 ss1;
+    unsigned : 16;
+    __u32 esp2;
+    __u16 ss2;
+    unsigned : 16;
+    __u32 cr3;
+    __u32 eip;
+    __u32 eflags;
+    __u32 eax;
+    __u32 ecx;
+    __u32 edx;
+    __u32 ebx;
+    __u32 esp;
+    __u32 ebp;
+    __u32 esi;
+    __u32 edi;
+    __u16 es;
+    unsigned : 16;
+    __u16 cs;
+    unsigned : 16;
+    __u16 ss;
+    unsigned : 16;
+    __u16 ds;
+    unsigned : 16;
+    __u16 fs;
+    unsigned : 16;
+    __u16 gs;
+    unsigned : 16;
+    __u16 ldtr;
+    unsigned : 16;
+    unsigned : 16;
+    __u16 io_map_base;
+} __attribute__ ((packed));
+extern struct ptr_16_32 gdtr;
+extern struct tss *tss_p;
+extern struct descriptor gdt[];
+extern struct idescriptor idt[];
+extern void pm_init(void);
+extern void gdt_setbase(struct descriptor *d, __address base);
+extern void gdt_setlimit(struct descriptor *d, __u32 limit);
+extern void idt_init(void);
+extern void idt_setoffset(struct idescriptor *d, __address offset);
+extern void tss_initialize(struct tss *t);
+#endif

 /SPARTAN/trunk/arch/ia32/include/fpu_context.h
 ,0 → 1,40
+/*
+ * Copyright (C) 2005 Jakub Vana
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __ia32_FPU_CONTEXT_H__
+#define __ia32_FPU_CONTEXT_H__
+#include <arch/types.h>
+struct fpu_context {
+    __u8 fpu[512];      /* FXSAVE & FXRSTOR storage area */
+};
+#endif

 /SPARTAN/trunk/arch/ia32/include/interrupt.h
 ,0 → 1,90
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __INTERRUPT_H__
+#define __INTERRUPT_H__
+#include <arch/types.h>
+#include <arch/pm.h>
+#define IVT_ITEMS       IDT_ITEMS
+#define IVT_EXCBASE     0
+#define EXCLAST         31
+#define IVT_IRQBASE     (IVT_EXCBASE+EXCLAST+1)
+#define IRQLAST         15
+#define IVT_FREEBASE        (IVT_IRQBASE+IRQLAST+1)
+#define IRQ_CLK     0
+#define IRQ_KBD     1
+#define IRQ_PIC1    2
+#define IRQ_PIC_SPUR    7
+/* this one must have four least significant bits set to ones */
+#define VECTOR_APIC_SPUR    (IVT_ITEMS-1)
+#if (((VECTOR_APIC_SPUR + 1)%16) || VECTOR_APIC_SPUR >= IVT_ITEMS)
+#error Wrong definition of VECTOR_APIC_SPUR
+#endif
+#define VECTOR_PIC_SPUR     (IVT_IRQBASE+IRQ_PIC_SPUR)
+#define VECTOR_CLK      (IVT_IRQBASE+IRQ_CLK)
+#define VECTOR_KBD      (IVT_IRQBASE+IRQ_KBD)
+#define VECTOR_SYSCALL          (IVT_FREEBASE+0)
+#define VECTOR_TLB_SHOOTDOWN_IPI    (IVT_FREEBASE+1)
+#define VECTOR_WAKEUP_IPI       (IVT_FREEBASE+2)
+typedef void (* iroutine)(__u8 n, __u32 stack[]);
+extern iroutine ivt[IVT_ITEMS];
+extern void (* disable_irqs_function)(__u16 irqmask);
+extern void (* enable_irqs_function)(__u16 irqmask);
+extern void (* eoi_function)(void);
+extern iroutine trap_register(__u8 n, iroutine f);
+extern void trap_dispatcher(__u8 n, __u32 stack[]);
+extern void null_interrupt(__u8 n, __u32 stack[]);
+extern void gp_fault(__u8 n, __u32 stack[]);
+extern void nm_fault(__u8 n, __u32 stack[]);
+extern void ss_fault(__u8 n, __u32 stack[]);
+extern void page_fault(__u8 n, __u32 stack[]);
+extern void syscall(__u8 n, __u32 stack[]);
+extern void tlb_shootdown_ipi(__u8 n, __u32 stack[]);
+extern void wakeup_ipi(__u8 n, __u32 stack[]);
+extern void trap_virtual_enable_irqs(__u16 irqmask);
+extern void trap_virtual_disable_irqs(__u16 irqmask);
+extern void trap_virtual_eoi(void);
+#endif

 /SPARTAN/trunk/arch/ia32/include/context.h
 ,0 → 1,52
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __ia32_CONTEXT_H__
+#define __ia32_CONTEXT_H__
+#include <arch/types.h>
+/*
+ * Both context_save() and context_restore() eat two doublewords from the stack.
+ * First for pop of the saved register, second during ret instruction.
+ */
+#define SP_DELTA    8
+struct context {
+    __u32 sp;
+    __u32 pc;
+    __u32 ebx;
+    __u32 ecx;
+    __u32 edx;
+    __u32 esi;
+    __u32 edi;
+    __u32 ebp;
+    __u32 pri;
+} __attribute__ ((packed));
+#endif

 /SPARTAN/trunk/arch/ia32/include/faddr.h
 ,0 → 1,36
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __ia32_FADDR_H__
+#define __ia32_FADDR_H__
+#include <arch/types.h>
+#define FADDR(fptr)     ((__address) (fptr))
+#endif

 /SPARTAN/trunk/arch/ia32/include/ega.h
 ,0 → 1,43
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __EGA_H__
+#define __EGA_H__
+#define VIDEORAM    0xb8000
+#define ROW     80
+#define ROWS        25
+#define SCREEN      (ROW*ROWS)
+extern void ega_init(void);
+extern void ega_putchar(const char ch);
+static void ega_check_cursor(void);
+static void ega_display_char(char ch);
+#endif

 /SPARTAN/trunk/arch/ia32/include/types.h
 ,0 → 1,47
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __TYPES_H__
+#define __TYPES_H__
+#define NULL 0
+typedef signed char __s8;
+typedef unsigned char __u8;
+typedef unsigned short __u16;
+typedef unsigned long __u32;
+typedef long long __u64;
+typedef __u32 __address;
+typedef __u32 pri_t;
+typedef __u32 __native;
+#endif

 /SPARTAN/trunk/arch/ia32/include/arg.h
 ,0 → 1,34
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __ia32_ARG_H__
+#define __ia32_ARG_H__
+#include <stackarg.h>
+#endif

 /SPARTAN/trunk/arch/ia32/include/bios/bios.h
 ,0 → 1,40
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __BIOS_H__
+#define __BIOS_H__
+#include <arch/types.h>
+#define BIOS_EBDA_PTR   0x40e
+extern __address ebda;
+extern void bios_init(void);
+#endif /* __BIOS_H__ */

 /SPARTAN/trunk/arch/ia32/include/i8254.h
 ,0 → 1,39
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __I8254_H__
+#define __I8254_H__
+#include <arch/types.h>
+extern void i8254_init(void);
+extern void i8254_interrupt(__u8 n, __u32 stack[]);
+extern void i8254_calibrate_delay_loop(void);
+extern void i8254_normal_operation(void);
+#endif

 /SPARTAN/trunk/arch/ia32/include/thread.h
 ,0 → 1,34
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __ia32_THREAD_H__
+#define __ia32_THREAD_H__
+#define ARCH_THREAD_DATA
+#endif

 /SPARTAN/trunk/arch/ia32/include/cpuid.h
 ,0 → 1,46
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __CPUID_H__
+#define __CPUID_H__
+#include <arch/types.h>
+struct cpu_info {
+    __u32 cpuid_eax;
+    __u32 cpuid_ebx;
+    __u32 cpuid_ecx;
+    __u32 cpuid_edx;
+} __attribute__ ((packed));
+extern int has_cpuid(void);
+extern void cpuid(__u32 cmd, cpu_info_t *info);
+extern __u64 rdtsc(void);
+#endif

 /SPARTAN/trunk/arch/ia32/include/i8042.h
 ,0 → 1,37
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __I8042_H__
+#define __I8042_H__
+#include <arch/types.h>
+extern void i8042_init(void);
+extern void i8042_interrupt(__u8 n, __u32 stack[]);
+#endif

 /SPARTAN/trunk/arch/ia32/include/i8259.h
 ,0 → 1,51
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __I8259_H__
+#define __I8259_H__
+#include <arch/types.h>
+#include <arch/interrupt.h>
+#define PIC_PIC0PORT1   0x20
+#define PIC_PIC0PORT2   0x21
+#define PIC_PIC1PORT1   0xa0
+#define PIC_PIC1PORT2   0xa1
+#define PIC_NEEDICW4    (1<<0)
+#define PIC_ICW1    (1<<4)
+#define PIC_PIC1ID  1
+extern void i8259_init(void);
+extern void pic_enable_irqs(__u16 irqmask);
+extern void pic_disable_irqs(__u16 irqmask);
+extern void pic_eoi(void);
+extern void pic_spurious(__u8 n, __u32 stack[]);
+#endif

 /SPARTAN/trunk/arch/ia32/Makefile.inc
 ,0 → 1,50
+CC=gcc
+AS=as
+LD=ld
+DEFS:=-DARCH=$(ARCH)
+ifdef SMP
+DEFS+=-D$(SMP)
+endif
+ifdef HT
+DEFS+=-D$(HT)
+endif
+CPPFLAGS=$(DEFS) -nostdinc -I../include
+CFLAGS=$(CPPFLAGS) -nostdlib -fno-builtin -fomit-frame-pointer -Wmissing-prototypes -Werror -O3
+LFLAGS=-M -no-check-sections -T ../arch/ia32/_link.ld
+arch_sources= \
+    arch/context.s \
+    arch/debug/panic.s \
+    arch/cpuid.s \
+    arch/delay.s \
+    arch/asm.S \
+    arch/proc/scheduler.c \
+    arch/acpi/acpi.c \
+    arch/acpi/madt.c \
+    arch/bios/bios.c \
+    arch/smp/ap.S \
+    arch/smp/apic.c \
+    arch/smp/mps.c \
+    arch/smp/smp.c \
+    arch/atomic.S \
+    arch/smp/ipi.c \
+    arch/ia32.c \
+    arch/interrupt.c \
+    arch/pm.c \
+    arch/userspace.c \
+    arch/cpu/cpu.c \
+    arch/mm/frame.c \
+    arch/mm/memory_init.c \
+    arch/mm/page.c \
+    arch/mm/tlb.c \
+    arch/drivers/i8042.c \
+    arch/drivers/i8254.c \
+    arch/drivers/i8259.c \
+    arch/drivers/ega.c \
+    arch/boot/boot.S \
+    arch/boot/memmap.S\
+    arch/fpu_context.c

 /SPARTAN/trunk/arch/ia32/boot/boot.S
 ,0 → 1,151
+#
+# Copyright (C) 2001-2004 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# This is a very primitive boot.s
+# It assumes that the first sector of the kernel image is found
+# on head 0, track 0, sector 2 of the first floppy drive (1440K).
+# Next kernel sectors follow on disk sector 3, 4, ...
+#
+# KERNEL_SIZE is passed from the outside to the preprocessor
+#if (KERNEL_SIZE%512>0)
+#define TAIL        1
+#else
+#define TAIL        0
+#endif
+#define SECTORS     (KERNEL_SIZE/512+TAIL)
+.text
+.global _start_0x7c00
+.code16
+_start_0x7c00:
+    xorw %ax,%ax        # reset, %al will be used below
+    movw %ax,%dx        # fd0, %dh and %dl will be used below
+    movw %dx,%ds
+    movw %dx,%ss        # initialize stack
+    movw $stack,%sp
+    int $0x13       # reset floppy
+    jc stop_trying
+    movw %dx,%ds
+    movw %dx,%ss
+    movw $0x7c00,%sp
+    movw $0xffe0,%si    # after next increment, %si will become 0x0000
+    movw %si,%es
+    movw $0x8000,%bx    # at %es:%bx
+    movl $(SECTORS),%edi
+read_next:
+    test %edi,%edi
+    jnz read_sectors
+    movb $12,%al
+    movw $0x3f2,%dx
+    outb %al,%dx
+    movb $('$'),%al
+    call echo_mark
+    jmpl $0,$0x8000
+read_sectors:
+    movb $('.'),%al
+    call echo_mark
+    decl %edi
+    incw logical_sector
+    movw %es,%si
+    addw $0x20,%si
+    movw %si,%es
+    movw logical_sector,%ax
+    divb sectors
+    movb %ah,%cl
+    incb %cl            # sector
+    movb %al,%ch
+    shrb $1,%ch         # track
+    movb %al,%dh
+    andb $1,%dh         # head
+    movw $0x0201,%ax
+    int $0x13
+    jnc read_next
+    movb $('R'),%al
+    call echo_mark
+    xorw %ax,%ax            # try to reset
+    movw %ax,%dx            # fd0
+    int $0x13
+    jnc read_next
+stop_trying:
+    movb $('F'),%al
+    call echo_mark
+    cli
+    hlt
+CH=4
+echo_mark:
+    push %bp
+    movw %sp,%bp
+    pusha
+    movb $0xe,%ah
+    movb $7,%bl
+    int $0x10
+    popa
+    pop %bp
+    ret
+# current logical sector from the beginning of the disk
+logical_sector:
+    .word 0
+# number of sectors per track on 1440 floppy
+sectors:
+    .byte 18
+# boot floppy signature
+.org 0x1fe
+boot_floppy_signature:
+    .byte 0x55
+    .byte 0xaa
+stack:

 /SPARTAN/trunk/arch/ia32/boot/Makefile
 ,0 → 1,19
+.PHONY: nothing build clean
+nothing:
+build: boot.bin
+    dd if=boot.bin of=../../../src/image.bin bs=512 conv=sync
+    -cat ../../../src/kernel.bin >>../../../src/image.bin
+    dd if=/dev/zero of=../../../src/image.bin bs=1 seek=1474559 count=1
+boot.bin: boot.o
+    ld -T boot.ld -entry _start_0x7c00 --oformat binary boot.o -o $@
+boot.o: boot.S
+    gcc -E -DKERNEL_SIZE=$(KERNEL_SIZE) boot.S >boot.s
+    as boot.s -o $@
+    rm boot.s
+clean:
+    -rm *.o *.bin

 /SPARTAN/trunk/arch/ia32/_link.ld
 ,0 → 1,43
+/** IA-32 linker script
+ *
+ * umapped section:
+ *  kernel text
+ *  kernel data
+ * mapped section:
+ *  kernel text
+ *  kernel data
+ */
+OUTPUT_FORMAT(binary)
+ENTRY(kernel_image_start)
+SECTIONS {
+    .unmapped 0x8000: AT (0x8000) {
+        unmapped_ktext_start = .;
+        *(K_TEXT_START);
+        *(K_TEXT_START_2);
+        unmapped_ktext_end = .;
+        unmapped_kdata_start = .;
+        *(K_DATA_START);
+        unmapped_kdata_end = .;
+    }
+    .mapped (0x80000000+SIZEOF(.unmapped)+0x8000) : AT (0x8000+SIZEOF(.unmapped)) {
+        ktext_start = .;
+        *(.text);
+        ktext_end = .;
+        kdata_start = .;
+        *(.data);       /* initialized data */
+        *(.rodata*);        /* string literals */
+        *(COMMON);      /* global variables */
+        *(.bss);        /* uninitialized static variables */
+        *(K_DATA_END);
+        kdata_end = .;
+    }
+    _hardcoded_ktext_size = ktext_end - ktext_start + (unmapped_ktext_end - unmapped_ktext_start);
+    _hardcoded_kdata_size = kdata_end - kdata_start + (unmapped_kdata_end - unmapped_kdata_start);
+    _hardcoded_load_address = 0x80008000;
+}

 /SPARTAN/trunk/arch/mips/Makefile.inc
 ,0 → 1,32
+MIPS_TARGET=mipsel-linux-gnu
+MIPS_CC_DIR=/usr/local/mipsel/bin
+MIPS_BINUTILS_DIR=/usr/local/mipsel/bin
+CC=$(MIPS_CC_DIR)/$(MIPS_TARGET)-gcc
+AS=$(MIPS_BINUTILS_DIR)/$(MIPS_TARGET)-as
+LD=$(MIPS_BINUTILS_DIR)/$(MIPS_TARGET)-ld
+ASFLAGS=-mips3
+DEFS=-DARCH=$(ARCH)
+CPPFLAGS=$(DEFS) -mno-abicalls -nostdinc -I../include
+CFLAGS=$(CPPFLAGS) -mips2 -G 0 -nostdlib -fno-builtin -Wmissing-prototypes -Werror -O2
+LFLAGS=-mips2 -M -no-check-sections -T ../arch/mips/_link.ld
+arch_sources= \
+    arch/start.S \
+    arch/context.S \
+    arch/panic.s \
+    arch/mips.c \
+    arch/fake.s \
+    arch/putchar.c \
+    arch/asm.s \
+    arch/exception.c \
+    arch/interrupt.c \
+    arch/cache.c \
+    arch/cpu/cpu.c \
+    arch/mm/frame.c \
+    arch/mm/page.c \
+    arch/mm/tlb.c \
+    arch/fpu_context.c

 /SPARTAN/trunk/arch/mips/include/mm/memory_init.h
 ,0 → 1,36
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __mips_MEMORY_INIT_H__
+#define __mips_MEMORY_INIT_H__
+#include <config.h>
+#define get_memory_size()   CONFIG_MEMORY_SIZE
+#endif

 /SPARTAN/trunk/arch/mips/include/mm/page.h
 ,0 → 1,113
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __mips_PAGE_H__
+#define __mips_PAGE_H__
+#include <arch/mm/tlb.h>
+#include <mm/page.h>
+#include <arch/mm/frame.h>
+#include <arch/types.h>
+#include <arch.h>
+#define PAGE_SIZE   FRAME_SIZE
+#define KA2PA(x)    ((x) - 0x80000000)
+#define PA2KA(x)    ((x) + 0x80000000)
+/*
+ * Implementation of generic 4-level page table interface.
+ * NOTE: this implementation is under construction
+ *
+ * Page table layout:
+ * - 32-bit virtual addresses
+ * - Offset is 14 bits => pages are 16K long
+ * - PTE's use the same format as CP0 EntryLo[01] registers => PTE is therefore 4 bytes long
+ * - PTL0 has 64 entries (6 bits)
+ * - PTL1 is not used
+ * - PTL2 is not used
+ * - PTL3 has 4096 entries (12 bits)
+ */
+#define PTL0_INDEX_ARCH(vaddr)  ((vaddr)>>26)
+#define PTL1_INDEX_ARCH(vaddr)  0
+#define PTL2_INDEX_ARCH(vaddr)  0
+#define PTL3_INDEX_ARCH(vaddr)  (((vaddr)>>14)&0xfff)
+#define GET_PTL0_ADDRESS_ARCH()         (PTL0)
+#define SET_PTL0_ADDRESS_ARCH(ptl0)     (PTL0 = (pte_t *)(ptl0))
+#define GET_PTL1_ADDRESS_ARCH(ptl0, i)      (((pte_t *)(ptl0))[(i)].pfn<<14)
+#define GET_PTL2_ADDRESS_ARCH(ptl1, i)      (ptl1)
+#define GET_PTL3_ADDRESS_ARCH(ptl2, i)      (ptl2)
+#define GET_FRAME_ADDRESS_ARCH(ptl3, i)     (((pte_t *)(ptl3))[(i)].pfn<<14)
+#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a)   (((pte_t *)(ptl0))[(i)].pfn = (a)>>14)
+#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
+#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
+#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a)  (((pte_t *)(ptl3))[(i)].pfn = (a)>>14)
+#define GET_PTL1_FLAGS_ARCH(ptl0, i)        get_pt_flags((pte_t *)(ptl0), (index_t)(i))
+#define GET_PTL2_FLAGS_ARCH(ptl1, i)        PAGE_PRESENT
+#define GET_PTL3_FLAGS_ARCH(ptl2, i)        PAGE_PRESENT
+#define GET_FRAME_FLAGS_ARCH(ptl3, i)       get_pt_flags((pte_t *)(ptl3), (index_t)(i))
+#define SET_PTL1_FLAGS_ARCH(ptl0, i, x)     set_pt_flags((pte_t *)(ptl0), (index_t)(i), (x))
+#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
+#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
+#define SET_FRAME_FLAGS_ARCH(ptl3, i, x)    set_pt_flags((pte_t *)(ptl3), (index_t)(i), (x))
+static inline int get_pt_flags(pte_t *pt, index_t i)
+{
+    pte_t *p = &pt[i];
+    return (
+        ((p->c>PAGE_UNCACHED)<<PAGE_CACHEABLE_SHIFT) |
+        ((!p->v)<<PAGE_PRESENT_SHIFT) |
+        (1<<PAGE_USER_SHIFT) |
+        (1<<PAGE_READ_SHIFT) |
+        ((p->d)<<PAGE_WRITE_SHIFT) |
+        (1<<PAGE_EXEC_SHIFT)
+    );
+}
+static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
+{
+    pte_t *p = &pt[i];
+    p->c = (flags & PAGE_CACHEABLE) != 0 ? PAGE_CACHEABLE_EXC_WRITE : PAGE_UNCACHED;
+    p->v = !(flags & PAGE_NOT_PRESENT);
+    p->d = (flags & PAGE_WRITE) != 0;
+}
+extern void page_arch_init(void);
+extern pte_t *PTL0;
+#endif

 /SPARTAN/trunk/arch/mips/include/mm/asid.h
 ,0 → 1,34
+/*
+ * Copyright (C) 2005 Matrin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __mips_ASID_H__
+#define __mips_ASID_H__
+extern void asid_bitmap_reset(void);
+#endif

 /SPARTAN/trunk/arch/mips/include/mm/frame.h
 ,0 → 1,36
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __mips_FRAME_H__
+#define __mips_FRAME_H__
+#define FRAME_SIZE      16384
+extern void frame_arch_init(void);
+#endif

 /SPARTAN/trunk/arch/mips/include/mm/tlb.h
 ,0 → 1,69
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __mips_TLB_H__
+#define __mips_TLB_H__
+#define PAGE_UNCACHED           2
+#define PAGE_CACHEABLE_EXC_WRITE    5
+struct entry_lo {
+    unsigned g : 1;     /* global bit */
+    unsigned v : 1;     /* valid bit */
+    unsigned d : 1;     /* dirty/write-protect bit */
+    unsigned c : 3;     /* cache coherency attribute */
+    unsigned pfn : 24;  /* frame number */
+    unsigned : 2;
+} __attribute__ ((packed));
+struct entry_hi {
+    unsigned asid : 8;
+    unsigned : 4;
+    unsigned g : 1;
+    unsigned vpn2 : 19;
+} __attribute__ ((packed));
+struct page_mask {
+    unsigned : 13;
+    unsigned mask : 12;
+    unsigned : 7;
+} __attribute__ ((packed));
+struct tlb_entry {
+    struct entry_lo lo0;
+    struct entry_lo lo1;
+    struct entry_hi hi;
+    struct page_mask mask;
+} __attribute__ ((packed));
+typedef struct entry_lo pte_t;
+extern void tlb_refill(void);
+extern void tlb_invalid(void);
+#endif

 /SPARTAN/trunk/arch/mips/include/mm/vm.h
 ,0 → 1,43
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __mips_VM_H__
+#define __mips_VM_H__
+#include <arch/types.h>
+#define KERNEL_ADDRESS_SPACE_START_ARCH     (__address) 0x80000000
+#define KERNEL_ADDRESS_SPACE_END_ARCH       (__address) 0xffffffff
+#define USER_ADDRESS_SPACE_START_ARCH       (__address) 0x00000000
+#define USER_ADDRESS_SPACE_END_ARCH     (__address) 0x7fffffff
+#define UTEXT_ADDRESS_ARCH  0x00001000
+#define USTACK_ADDRESS_ARCH (0x7fffffff-(PAGE_SIZE-1))
+#define UDATA_ADDRESS_ARCH  0x01001000
+#endif

 /SPARTAN/trunk/arch/mips/include/context.h
 ,0 → 1,73
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __mips_CONTEXT_H__
+#define __mips_CONTEXT_H__
+#include <arch/types.h>
+#define SP_DELTA    0
+struct context {
+    __u32 r0;
+    __u32 r1;
+    __u32 r2;
+    __u32 r3;
+    __u32 r4;
+    __u32 r5;
+    __u32 r6;
+    __u32 r7;
+    __u32 r8;
+    __u32 r9;
+    __u32 r10;
+    __u32 r11;
+    __u32 r12;
+    __u32 r13;
+    __u32 r14;
+    __u32 r15;
+    __u32 r16;
+    __u32 r17;
+    __u32 r18;
+    __u32 r19;
+    __u32 r20;
+    __u32 r21;
+    __u32 r22;
+    __u32 r23;
+    __u32 r24;
+    __u32 r25;
+    __u32 r26;
+    __u32 r27;
+    __u32 r28;
+    __u32 sp;
+    __u32 r30;
+    __u32 pc;
+    __u32 pri;
+};
+#endif

 /SPARTAN/trunk/arch/mips/include/cpu.h
 ,0 → 1,41
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __mips_CPU_H__
+#define __mips_CPU_H__
+#include <typedefs.h>
+#define CPU_ID_ARCH 0
+struct cpu_arch {
+    int imp_num;
+    int rev_num;
+};
+#endif

 /SPARTAN/trunk/arch/mips/include/exception.h
 ,0 → 1,53
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __EXCEPTION_H__
+#define __EXCEPTION_H__
+#define EXC_Int     0
+#define EXC_Mod     1
+#define EXC_TLBL    2
+#define EXC_TLBS    3
+#define EXC_AdEL    4
+#define EXC_AdES    5
+#define EXC_IBE     6
+#define EXC_DBE     7
+#define EXC_Sys     8
+#define EXC_Bp      9
+#define EXC_RI      10
+#define EXC_CpU     11
+#define EXC_Ov      12
+#define EXC_Tr      13
+#define EXC_VCEI    14
+#define EXC_FPE     15
+#define EXC_WATCH   23
+#define EXC_VCED    31
+extern void exception(void);
+#endif

 /SPARTAN/trunk/arch/mips/include/atomic.h
 ,0 → 1,96
+/*
+ * Copyright (C) 2005 Ondrej Palkovsky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __MIPS_ATOMIC_H__
+#define __MIPS_ATOMIC_H__
+#define atomic_inc(x)   (a_add(x,1))
+#define atomic_dec(x)   (a_sub(x,1))
+/*
+ * Atomic addition
+ *
+ * This case is harder, and we have to use the special LL and SC operations
+ * to achieve atomicity. The instructions are similar to LW (load) and SW
+ * (store), except that the LL (load-linked) instruction loads the address
+ * of the variable to a special register and if another process writes to
+ * the same location, the SC (store-conditional) instruction fails.
+ */
+static inline int a_add( volatile int *val, int i)
+{
+    int tmp, tmp2;
+    asm volatile (
+        "   .set    push\n"
+        "   .set    noreorder\n"
+        "   nop\n"
+        "1:\n"
+        "   ll  %0, %1\n"
+        "   addu    %0, %0, %2\n"
+        "       move    %3, %0\n"
+        "   sc  %0, %1\n"
+        "   beq %0, 0x0, 1b\n"
+        "   move    %0, %3\n"
+        "   .set    pop\n"
+        : "=&r" (tmp), "=o" (*val)
+        : "r" (i), "r" (tmp2)
+        );
+    return tmp;
+}
+/*
+ * Atomic subtraction
+ *
+ * Implemented in the same manner as a_add, except we substract the value.
+ */
+static inline int a_sub( volatile int *val, int i)
+{
+    int tmp, tmp2;
+    asm volatile (
+        "   .set    push\n"
+        "   .set    noreorder\n"
+        "   nop\n"
+        "1:\n"
+        "   ll  %0, %1\n"
+        "   subu    %0, %0, %2\n"
+        "       move    %3, %0\n"
+        "   sc  %0, %1\n"
+        "   beq %0, 0x0, 1b\n"
+        "       move    %0, %3\n"
+        "   .set    pop\n"
+        : "=&r" (tmp), "=o" (*val)
+        : "r" (i), "r" (tmp2)
+        );
+    return tmp;
+}
+#endif

 /SPARTAN/trunk/arch/mips/include/fpu_context.h
 ,0 → 1,41
+/*
+ * Copyright (C) 2005 Jakub Vana
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __mips_FPU_CONTEXT_H__
+#define __mips_FPU_CONTEXT_H__
+#include <arch/types.h>
+struct fpu_context {
+/* TODO: define MIPS FPU context */
+};
+#endif

 /SPARTAN/trunk/arch/mips/include/faddr.h
 ,0 → 1,36
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __mips_FADDR_H__
+#define __mips_FADDR_H__
+#include <arch/types.h>
+#define FADDR(fptr)     ((__address) (fptr))
+#endif

 /SPARTAN/trunk/arch/mips/include/arg.h
 ,0 → 1,34
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __mips_ARG_H__
+#define __mips_ARG_H__
+#include <stackarg.h>
+#endif

 /SPARTAN/trunk/arch/mips/include/types.h
 ,0 → 1,47
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __TYPES_H__
+#define __TYPES_H__
+#define NULL    0
+typedef signed char __s8;
+typedef unsigned char __u8;
+typedef unsigned short __u16;
+typedef unsigned long __u32;
+typedef long long __u64;
+typedef __u32 __address;
+typedef __u32 pri_t;
+typedef __u32 __native;
+#endif

 /SPARTAN/trunk/arch/mips/include/asm/macro.h
 ,0 → 1,101
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ * MIPS assembler macros
+ */
+.macro REGISTERS_STORE r
+    sw $0,0(\r)
+    sw $1,4(\r)
+    sw $2,8(\r) # meaningless
+    sw $3,12(\r)
+    sw $4,16(\r)
+    sw $5,20(\r)
+    sw $6,24(\r)
+    sw $7,28(\r)
+    sw $8,32(\r)
+    sw $9,36(\r)
+    sw $10,40(\r)
+    sw $11,44(\r)
+    sw $12,48(\r)
+    sw $13,52(\r)
+    sw $14,56(\r)
+    sw $15,60(\r)
+    sw $16,64(\r)
+    sw $17,68(\r)
+    sw $18,72(\r)
+    sw $19,76(\r)
+    sw $20,80(\r)
+    sw $21,84(\r)
+    sw $22,88(\r)
+    sw $23,92(\r)
+    sw $24,96(\r)
+    sw $25,100(\r)
+    sw $26,104(\r)
+    sw $27,108(\r)
+    sw $28,112(\r)
+    sw $29,116(\r)
+    sw $30,120(\r)
+    sw $31,124(\r)
+.endm
+.macro REGISTERS_LOAD r
+    lw $0,0(\r)
+    lw $1,4(\r)
+    lw $2,8(\r)  # meaningless
+    lw $3,12(\r)
+    lw $4,16(\r) # this is ok, $4 == 16(\r)
+    lw $5,20(\r)
+    lw $6,24(\r)
+    lw $7,28(\r)
+    lw $8,32(\r)
+    lw $9,36(\r)
+    lw $10,40(\r)
+    lw $11,44(\r)
+    lw $12,48(\r)
+    lw $13,52(\r)
+    lw $14,56(\r)
+    lw $15,60(\r)
+    lw $16,64(\r)
+    lw $17,68(\r)
+    lw $18,72(\r)
+    lw $19,76(\r)
+    lw $20,80(\r)
+    lw $21,84(\r)
+    lw $22,88(\r)
+    lw $23,92(\r)
+    lw $24,96(\r)
+    lw $25,100(\r)
+    lw $26,104(\r)
+    lw $27,108(\r)
+    lw $28,112(\r)
+    lw $29,116(\r)
+    lw $30,120(\r)
+    lw $31,124(\r)
+.endm

 /SPARTAN/trunk/arch/mips/include/interrupt.h
 ,0 → 1,34
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __INTERRUPT_H__
+#define __INTERRUPT_H__
+extern void interrupt(void);
+#endif

 /SPARTAN/trunk/arch/mips/include/asm.h
 ,0 → 1,34
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __MIPS_ASM_H__
+#define __MIPS_ASM_H__
+#define cpu_sleep() ;
+#endif

 /SPARTAN/trunk/arch/mips/include/cp0.h
 ,0 → 1,93
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __CP0_H__
+#define __CP0_H__
+#include <arch/types.h>
+#define cp0_status_ie_enabled_bit   (1<<0)
+#define cp0_status_exl_exception_bit    (1<<1)
+#define cp0_status_erl_error_bit    (1<<2)
+#define cp0_status_bev_bootstrap_bit    (1<<22)
+#define cp0_status_im7_shift        15
+/*
+ * Magic value for use in msim.
+ * On AMD Duron 800Mhz, this roughly seems like one us.
+ */
+#define cp0_compare_value       10000
+extern  __u32 cp0_index_read(void);
+extern void cp0_idnex_write(__u32 val);
+extern __u32 cp0_random_read(void);
+extern __u32 cp0_entry_lo0_read(void);
+extern void cp0_entry_lo0_write(__u32 val);
+extern __u32 cp0_entry_lo1_read(void);
+extern void cp0_entry_lo1_write(__u32 val);
+extern __u32 cp0_context_read(void);
+extern void cp0_context_write(__u32 val);
+extern __u32 cp0_pagemask_read(void);
+extern void cp0_pagemask_write(__u32 val);
+extern __u32 cp0_wired_read(void);
+extern void cp0_wired_write(__u32 val);
+extern __u32 cp0_badvaddr_read(void);
+extern volatile __u32 cp0_count_read(void);
+extern void cp0_count_write(__u32 val);
+extern volatile __u32 cp0_entry_hi_read(void);
+extern void cp0_entry_hi_write(__u32 val);
+extern volatile __u32 cp0_compare_read(void);
+extern void cp0_compare_write(__u32 val);
+extern __u32 cp0_status_read(void);
+extern void cp0_status_write(__u32 val);
+extern __u32 cp0_cause_read(void);
+extern void cp0_cause_write(__u32 val);
+extern __u32 cp0_epc_read(void);
+extern void cp0_epc_write(__u32 val);
+extern __u32 cp0_prid_read(void);
+extern void tlbp(void);
+extern void tlbr(void);
+extern void tlbwi(void);
+extern void tlbwr(void);
+#endif

 /SPARTAN/trunk/arch/mips/include/cache.h
 ,0 → 1,34
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __CACHE_H__
+#define __CACHE_H__
+extern void cache_error(void);
+#endif

 /SPARTAN/trunk/arch/mips/include/thread.h
 ,0 → 1,36
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __mips_THREAD_H__
+#define __mips_THREAD_H__
+#define ARCH_THREAD_DATA \
+    pri_t   saved_pri; \
+    __u32   saved_epc;
+#endif

 /SPARTAN/trunk/arch/mips/boot/boot.s
 ,0 → 1,44
+#
+# Copyright (C) 2001-2004 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.set noat
+.set noreorder
+.set nomacro
+.global start
+start:
+    # move 0x80000000 to reg $8
+    lui $8, 0x8000
+    # prepare stack
+    lui $29, 0x8100
+    j $8
+    nop

 /SPARTAN/trunk/arch/mips/boot/Makefile
 ,0 → 1,24
+MIPS_BINUTILS_DIR=/usr/local/mipsel/bin
+MIPS_TARGET=mipsel-linux-gnu
+.PHONY: nothing build
+nothing:
+build: boot.bin
+    cp boot.bin ../../../src/load.bin
+AS=$(MIPS_BINUTILS_DIR)/$(MIPS_TARGET)-as
+LD=$(MIPS_BINUTILS_DIR)/$(MIPS_TARGET)-ld
+ASFLAGS=-mips2
+LFLAGS=--oformat=binary -mips2 -e start
+boot.bin: boot.o
+    $(LD) $(LFLAGS) boot.o -o $@
+boot.o:
+    $(AS) boot.s -o $@
+clean:
+    -rm *.o *.bin

 /SPARTAN/trunk/arch/mips/src/mm/asid.c
 ,0 → 1,56
+/*
+ * Copyright (C) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <arch.h>
+#include <memstr.h>
+/**< Array of threads that have currently some ASID assigned,
+     NULL means no thread have ASID with number of that index assigned */
+struct thread * asids[256];
+int last_asid; /**< The number of last assigned ASID */
+int asid_bitmap[32]; /**< Bitmap of ASIDs currently in TLB */
+/** Cleanup asid_bitmap
+ *
+ */
+void asid_bitmap_reset(void)
+{
+    memsetb(asid_bitmap, sizeof(asid_bitmap), 0);
+}
+/** Initialize manipulating with ASIDs
+ *
+ */
+void init_asids(void)
+{
+    memsetb(asids, sizeof(asids), 0);
+    asid_bitmap_reset();
+    last_asid = 0;
+}

 /SPARTAN/trunk/arch/mips/src/mm/tlb.c
 ,0 → 1,64
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <arch/mm/tlb.h>
+#include <arch/mm/asid.h>
+#include <mm/tlb.h>
+#include <arch/cp0.h>
+#include <panic.h>
+#include <arch.h>
+int bootstrap = 1;
+void tlb_refill(void)
+{
+    if (bootstrap) {
+        bootstrap = 0;
+        main_bsp();
+    }
+    panic("tlb_refill exception\n");
+}
+void tlb_invalid(void)
+{
+    panic("%X: TLB exception at %X", cp0_badvaddr_read(), THREAD ? THREAD->saved_epc : 0);
+}
+void tlb_invalidate(int asid)
+{
+    pri_t pri;
+    pri = cpu_priority_high();
+    asid_bitmap_reset();
+    // TODO
+    cpu_priority_restore(pri);
+}

 /SPARTAN/trunk/arch/mips/src/mm/page.c
 ,0 → 1,45
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <arch/types.h>
+#include <arch/mm/page.h>
+#include <arch/mm/frame.h>
+#include <mm/frame.h>
+#include <mm/page.h>
+pte_t *PTL0 = NULL;
+void page_arch_init(void)
+{
+    __address ptl0;
+    ptl0 = frame_alloc(FRAME_KA | FRAME_PANIC);
+    memsetb(ptl0, FRAME_SIZE, 0);
+    SET_PTL0_ADDRESS(KA2PA(ptl0));
+}

 /SPARTAN/trunk/arch/mips/src/mm/frame.c
 ,0 → 1,34
+/*
+ * Copyright (C) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <arch/mm/frame.h>
+#include <mm/frame.h>
+void frame_arch_init(void)
+{
+}

 /SPARTAN/trunk/arch/mips/src/cpu/cpu.c
 ,0 → 1,94
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <arch/cpu.h>
+#include <cpu.h>
+#include <arch.h>
+#include <arch/cp0.h>
+#include <typedefs.h>
+struct {
+    char *vendor;
+    char *model;
+} imp_data[] = {
+    { "Invalid", "Invalid" },   /* 0x00 */
+    { "MIPS", "R2000" },        /* 0x01 */
+    { "MIPS", "R3000" },        /* 0x02 */
+    { "MIPS", "R6000" },        /* 0x03 */
+    { "MIPS", " R4000/R4400" },     /* 0x04 */
+    { "LSI Logic", "R3000" },   /* 0x05 */
+    { "MIPS", "R6000A" },       /* 0x06 */
+    { "IDT", "3051/3052" },     /* 0x07 */
+    { "Invalid", "Invalid" },   /* 0x08 */
+    { "MIPS", "R10000/T5" },    /* 0x09 */
+    { "MIPS", "R4200" },        /* 0x0a */
+    { "Unknown", "Unknown" },   /* 0x0b */
+    { "Unknown", "Unknown" },   /* 0x0c */
+    { "Invalid", "Invalid" },   /* 0x0d */
+    { "Invalid", "Invalid" },   /* 0x0e */
+    { "Invalid", "Invalid" },   /* 0x0f */
+    { "MIPS", "R8000" },        /* 0x10 */
+    { "Invalid", "Invalid" },   /* 0x11 */
+    { "Invalid", "Invalid" },   /* 0x12 */
+    { "Invalid", "Invalid" },   /* 0x13 */
+    { "Invalid", "Invalid" },   /* 0x14 */
+    { "Invalid", "Invalid" },   /* 0x15 */
+    { "Invalid", "Invalid" },   /* 0x16 */
+    { "Invalid", "Invalid" },   /* 0x17 */
+    { "Invalid", "Invalid" },   /* 0x18 */
+    { "Invalid", "Invalid" },   /* 0x19 */
+    { "Invalid", "Invalid" },   /* 0x1a */
+    { "Invalid", "Invalid" },   /* 0x1b */
+    { "Invalid", "Invalid" },   /* 0x1c */
+    { "Invalid", "Invalid" },   /* 0x1d */
+    { "Invalid", "Invalid" },   /* 0x1e */
+    { "Invalid", "Invalid" },   /* 0x1f */
+    { "QED", "R4600" },     /* 0x20 */
+    { "Sony", "R3000" },        /* 0x21 */
+    { "Toshiba", "R3000" },     /* 0x22 */
+    { "NKK", "R3000" }      /* 0x23 */
+};
+void cpu_arch_init(void)
+{
+}
+void cpu_identify(void)
+{
+    CPU->arch.rev_num = cp0_prid_read() & 0xff;
+    CPU->arch.imp_num = (cp0_prid_read() >> 8) & 0xff;
+}
+void cpu_print_report(cpu_t *m)
+{
+    printf("cpu%d: %s %s (rev=%d.%d, imp=%d)\n",
+        m->id, imp_data[m->arch.imp_num].vendor, imp_data[m->arch.imp_num].model, m->arch.rev_num >> 4, m->arch.rev_num & 0xf, m->arch.imp_num);
+}

 /SPARTAN/trunk/arch/mips/src/mips.c
 ,0 → 1,59
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <arch.h>
+#include <arch/cp0.h>
+#include <arch/exception.h>
+void arch_pre_mm_init(void)
+{
+    /*
+     * Switch to BEV normal level so that exception vectors point to the kernel.
+     * Clear the error level.
+     */
+    cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit));
+    /*
+     * Unmask hardware clock interrupt.
+     */
+    cp0_status_write(cp0_status_read() | (1<<cp0_status_im7_shift));
+    /*
+     * Start hardware clock.
+     */
+    cp0_compare_write(cp0_compare_value);
+    cp0_count_write(0);
+}
+void arch_post_mm_init(void)
+{
+}
+void arch_late_init(void)
+{
+}

 /SPARTAN/trunk/arch/mips/src/interrupt.c
 ,0 → 1,95
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <arch/interrupt.h>
+#include <arch/types.h>
+#include <arch.h>
+#include <arch/cp0.h>
+#include <time/clock.h>
+#include <panic.h>
+pri_t cpu_priority_high(void)
+{
+    pri_t pri = (pri_t) cp0_status_read();
+    cp0_status_write(pri & ~cp0_status_ie_enabled_bit);
+    return pri;
+}
+pri_t cpu_priority_low(void)
+{
+    pri_t pri = (pri_t) cp0_status_read();
+    cp0_status_write(pri | cp0_status_ie_enabled_bit);
+    return pri;
+}
+void cpu_priority_restore(pri_t pri)
+{
+    cp0_status_write(cp0_status_read() | (pri & cp0_status_ie_enabled_bit));
+}
+pri_t cpu_priority_read(void)
+{
+    return cp0_status_read();
+}
+void interrupt(void)
+{
+    __u32 cause;
+    int i;
+    /* decode interrupt number and process the interrupt */
+    cause = (cp0_cause_read() >> 8) &0xff;
+    for (i = 0; i < 8; i++) {
+        if (cause & (1 << i)) {
+            switch (i) {
+                case 0: /* SW0 - Software interrupt 0 */
+                    cp0_cause_write(cause & ~(1 << 8)); /* clear SW0 interrupt */
+                    break;
+                case 1: /* SW1 - Software interrupt 1 */
+                    cp0_cause_write(cause & ~(1 << 9)); /* clear SW1 interrupt */
+                    break;
+                case 2: /* IRQ0 */
+                case 3: /* IRQ1 */
+                case 4: /* IRQ2 */
+                case 5: /* IRQ3 */
+                case 6: /* IRQ4 */
+                    panic("unhandled interrupt %d\n", i);
+                    break;
+                case 7: /* Timer Interrupt */
+                    cp0_compare_write(cp0_compare_value); /* clear timer interrupt */
+                    /* start counting over again */
+                    cp0_count_write(0);
+                    clock();
+                    break;
+            }
+        }
+    }
+}

 /SPARTAN/trunk/arch/mips/src/start.S
 ,0 → 1,91
+#
+# Copyright (C) 2001-2004 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#include <arch/asm/macro.h>
+#define STACK_SPACE 128
+.text
+.set noat
+.set noreorder
+.set nomacro
+.global kernel_image_start
+.global tlb_refill_entry
+.global cache_error_entry
+.global exception_entry
+.org 0x0
+kernel_image_start:
+tlb_refill_entry:
+    j tlb_refill_handler
+    nop
+.org 0x100
+cache_error_entry:
+    j cache_error_handler
+    nop
+.org 0x180
+exception_entry:
+exception_handler:
+    sub $29, STACK_SPACE
+    REGISTERS_STORE $29
+    jal exception
+    nop
+    REGISTERS_LOAD $29
+    add $29, STACK_SPACE
+    eret
+tlb_refill_handler:
+    sub $29, STACK_SPACE
+    REGISTERS_STORE $29
+    jal tlb_refill
+    nop
+    REGISTERS_LOAD $29
+    add $29, STACK_SPACE
+    eret
+cache_error_handler:
+    sub $29, STACK_SPACE
+    REGISTERS_STORE $29
+    jal cache_error
+    nop
+    REGISTERS_LOAD $29
+    add $29, STACK_SPACE
+    eret

 /SPARTAN/trunk/arch/mips/src/asm.s
 ,0 → 1,169
+#
+# Copyright (C) 2001-2004 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.macro cp0_read reg
+    mfc0 $2,\reg
+    j $31
+    nop
+.endm
+.macro cp0_write reg
+    mtc0 $4,\reg
+    j $31
+    nop
+.endm
+.set noat
+.set noreorder
+.set nomacro
+.global cp0_index_read
+.global cp0_index_write
+.global cp0_random_read
+.global cp0_entry_lo0_read
+.global cp0_entry_lo0_write
+.global cp0_entry_lo1_read
+.global cp0_entry_lo1_write
+.global cp0_context_read
+.global cp0_context_write
+.global cp0_pagemask_read
+.global cp0_pagemask_write
+.global cp0_wired_read
+.global cp0_wired_write
+.global cp0_badvaddr_read
+.global cp0_count_read
+.global cp0_count_write
+.global cp0_hi_read
+.global cp0_hi_write
+.global cp0_compare_read
+.global cp0_compare_write
+.global cp0_status_read
+.global cp0_status_write
+.global cp0_cause_read
+.global cp0_cause_write
+.global cp0_epc_read
+.global cp0_epc_write
+.global cp0_prid_read
+cp0_index_read:     cp0_read $0
+cp0_index_write:    cp0_write $0
+cp0_random_read:    cp0_read $1
+cp0_entry_lo0_read: cp0_read $2
+cp0_entry_lo0_write:    cp0_write $2
+cp0_entry_lo1_read: cp0_read $3
+cp0_entry_lo1_write:    cp0_write $3
+cp0_context_read:   cp0_read $4
+cp0_context_write:  cp0_write $4
+cp0_pagemask_read:  cp0_read $5
+cp0_pagemask_write: cp0_write $5
+cp0_wired_read:     cp0_read $6
+cp0_wired_write:    cp0_write $6
+cp0_badvaddr_read:  cp0_read $8
+cp0_count_read:     cp0_read $9
+cp0_count_write:    cp0_write $9
+cp0_entry_hi_read:  cp0_read $10
+cp0_entry_hi_write: cp0_write $10
+cp0_compare_read:   cp0_read $11
+cp0_compare_write:  cp0_write $11
+cp0_status_read:    cp0_read $12
+cp0_status_write:   cp0_write $12
+cp0_cause_read:     cp0_read $13
+cp0_cause_write:    cp0_write $13
+cp0_epc_read:       cp0_read $14
+cp0_epc_write:      cp0_write $14
+cp0_prid_read:      cp0_read $15
+.global tlbp
+tlbp:
+    tlbp
+    j $31
+    nop
+.global tlbr
+tlbr:
+    tlbr
+    j $31
+    nop
+.global tlbwi
+tlbwi:
+    tlbwi
+    j $31
+    nop
+.global tlbwr
+tlbwr:
+    tlbwr
+    j $31
+    nop
+.global cpu_halt
+cpu_halt:
+    j cpu_halt
+    nop
+.global memsetb
+memsetb:
+    j _memsetb
+    nop
+.global memcopy
+memcopy:
+    j _memcopy
+    nop
+# THIS IS USERSPACE CODE
+.global utext
+utext:
+    j $31
+    nop
+utext_end:
+.data
+.global utext_size
+utext_size:
+    .long utext_end-utext

 /SPARTAN/trunk/arch/mips/src/exception.c
 ,0 → 1,115
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <arch/exception.h>
+#include <panic.h>
+#include <arch/cp0.h>
+#include <arch/types.h>
+#include <arch.h>
+void exception(void)
+{
+    int excno;
+    __u32 epc;
+    __u32 epc_shift = 0;
+    pri_t pri;
+    pri = cpu_priority_high();
+    epc = cp0_epc_read();
+    cp0_status_write(cp0_status_read() & ~ cp0_status_exl_exception_bit);
+    if (THREAD) {
+        THREAD->saved_pri = pri;
+        THREAD->saved_epc = epc;
+    }
+    /* decode exception number and process the exception */
+    switch (excno = (cp0_cause_read() >> 2) & 0x1f) {
+        case EXC_Int:
+            interrupt();
+            break;
+        case EXC_TLBL:
+        case EXC_TLBS:
+            tlb_invalid();
+            break;
+        case EXC_Mod:
+            panic("unhandled TLB Modification Exception\n");
+            break;
+        case EXC_AdEL:
+            panic("unhandled Address Error Exception - load or instruction fetch\n");
+            break;
+        case EXC_AdES:
+            panic("unhandled Address Error Exception - store\n");
+            break;
+        case EXC_IBE:
+            panic("unhandled Bus Error Exception - fetch instruction\n");
+            break;
+        case EXC_DBE:
+            panic("unhandled Bus Error Exception - data reference: load or store\n");
+            break;
+        case EXC_Bp:
+            /* it is necessary to not re-execute BREAK instruction after returning from Exception handler
+               (see page 138 in R4000 Manual for more information) */
+            epc_shift = 4;
+            break;
+        case EXC_RI:
+            panic("unhandled Reserved Instruction Exception\n");
+            break;
+        case EXC_CpU:
+            panic("unhandled Coprocessor Unusable Exception\n");
+            break;
+        case EXC_Ov:
+            panic("unhandled Arithmetic Overflow Exception\n");
+            break;
+        case EXC_Tr:
+            panic("unhandled Trap Exception\n");
+            break;
+        case EXC_VCEI:
+            panic("unhandled Virtual Coherency Exception - instruction\n");
+            break;
+        case EXC_FPE:
+            panic("unhandled Floating-Point Exception\n");
+            break;
+        case EXC_WATCH:
+            panic("unhandled reference to WatchHi/WatchLo address\n");
+            break;
+        case EXC_VCED:
+            panic("unhandled Virtual Coherency Exception - data\n");
+            break;
+        default:
+            panic("unhandled exception %d\n", excno);
+    }
+    if (THREAD) {
+        pri = THREAD->saved_pri;
+        epc = THREAD->saved_epc;
+    }
+    cp0_epc_write(epc + epc_shift);
+    cp0_status_write(cp0_status_read() | cp0_status_exl_exception_bit);
+    cpu_priority_restore(pri);
+}

 /SPARTAN/trunk/arch/mips/src/putchar.c
 ,0 → 1,42
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <putchar.h>
+#include <arch/types.h>
+#include <arch/cp0.h>
+#define VIDEORAM    0xB0000000
+void putchar(const char ch)
+{
+    __u32 status = cp0_status_read();
+    cp0_status_write(cp0_status_read() | cp0_status_erl_error_bit);
+    *((char *) VIDEORAM) = ch;
+    cp0_status_write(status);
+}

 /SPARTAN/trunk/arch/mips/src/fpu_context.c
 ,0 → 1,48
+/*
+ * Copyright (C) 2005 Jakub Vana
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#include <fpu_context.h>
+void fpu_context_save(fpu_context_t *fctx)
+{
+}
+void fpu_context_restore(fpu_context_t *fctx)
+{
+}
+void fpu_lazy_context_save(fpu_context_t *fctx)
+{
+}
+void fpu_lazy_context_restore(fpu_context_t *fctx)
+{
+}

 /SPARTAN/trunk/arch/mips/src/cache.c
 ,0 → 1,35
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <arch/cache.h>
+#include <panic.h>
+void cache_error(void)
+{
+    panic("cache_error exception\n");
+}

 /SPARTAN/trunk/arch/mips/src/panic.s
 ,0 → 1,42
+#
+# Copyright (C) 2001-2004 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.set noat
+.set noreorder
+.set nomacro
+.global panic_printf
+panic_printf:
+    jal printf
+    nop
+    j cpu_halt
+    nop

 /SPARTAN/trunk/arch/mips/src/fake.s
 ,0 → 1,42
+#
+# Copyright (C) 2001-2004 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+.text
+.set noat
+.global calibrate_delay_loop
+.global asm_delay_loop
+.global userspace
+.global before_thread_runs_arch
+before_thread_runs_arch:
+userspace:
+calibrate_delay_loop:
+asm_delay_loop:
+    j $31
+    nop

 /SPARTAN/trunk/arch/mips/src/context.S
 ,0 → 1,52
+#
+# Copyright (C) 2001-2004 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#include <arch/asm/macro.h>
+.text
+.set noat
+.set noreorder
+.set nomacro
+.global context_save
+.global context_restore
+context_save:
+    REGISTERS_STORE $4
+    # context_save returns 1
+    j $31
+    li $2, 1
+context_restore:
+    REGISTERS_LOAD $4
+    # context_restore returns 0
+    j $31
+    xor $2, $2

 /SPARTAN/trunk/arch/mips/_link.ld
 ,0 → 1,52
+/*
+ *  MIPS linker script
+ *
+ *  kernel text
+ *  kernel data
+ *
+ */
+OUTPUT_FORMAT(binary)
+ENTRY(kernel_image_start)
+SECTIONS {
+    .image 0x80000000: AT (0x80000000) {
+        _gp = 0x00000000;
+        ktext_start = .;
+        *(.text);
+        ktext_end = .;
+        kdata_start = .;
+        *(.reginfo);
+        *(.rodata);
+        *(.rodata.*);
+        *(.rdata);
+        *(.data);       /* initialized data */
+        *(.lit8);
+        *(.lit4);
+        *(.sdata);
+        *(.sbss);
+        *(.bss);        /* uninitialized static variables */
+        *(.scommon);
+        *(COMMON);      /* global variables */
+        kdata_end = .;
+    } = 0x00000000
+    . = ABSOLUTE(hardcoded_ktext_size);
+    .patch_1 : {
+        LONG(ktext_end - ktext_start);
+    }
+    . = ABSOLUTE(hardcoded_kdata_size);
+    .patch_2 : {
+        LONG(kdata_end - kdata_start);
+    }
+    . = ABSOLUTE(hardcoded_load_address);
+    .patch_3 : {
+        LONG(0x80000000);
+    }
+}

 /SPARTAN/trunk/arch/powerpc/_link.ld
 ,0 → 1,37
+/*
+ *  PowerPC linker script
+ *
+ *  kernel text
+ *  kernel data
+ *
+ */
+OUTPUT_FORMAT(binary)
+ENTRY(kernel_image_start)
+SECTIONS {
+    .image 0x80000000: AT (0x80000000) {
+        ktext_start = .;
+        *(.text);
+        ktext_end = .;
+        kdata_start = .;
+        kdata_end = .;
+    } = 0x00000000
+    . = ABSOLUTE(hardcoded_ktext_size);
+    .patch_1 : {
+            LONG(ktext_end - ktext_start);
+    }
+    . = ABSOLUTE(hardcoded_kdata_size);
+    .patch_2 : {
+            LONG(kdata_end - kdata_start);
+    }
+    . = ABSOLUTE(hardcoded_load_address);
+    .patch_3 : {
+        LONG(0x80000000);
+    }
+}

 /SPARTAN/trunk/arch/powerpc/src/fpu_context.c
 ,0 → 1,49
+/*
+ * Copyright (C) 2005 Jakub Vana
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#include <fpu_context.h>
+void fpu_context_save(fpu_context_t *fctx)
+{
+}
+void fpu_context_restore(fpu_context_t *fctx)
+{
+}
+void fpu_lazy_context_save(fpu_context_t *fctx)
+{
+}
+void fpu_lazy_context_restore(fpu_context_t *fctx)
+{
+}

 /SPARTAN/trunk/arch/powerpc/src/powerpc.c
 ,0 → 1,28
+/*
+ * Copyright (C) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */

 /SPARTAN/trunk/arch/powerpc/Makefile.inc
 ,0 → 1,15
+MIPS_CC_DIR=/usr/local/powerpc/bin
+CC=$(MIPS_CC_DIR)/powerpc-linux-gcc
+AS=$(MIPS_CC_DIR)/powerpc-linux-as
+LD=$(MIPS_CC_DIR)/powerpc-linux-ld
+ASFLAGS=
+DEFS=-DARCH=$(ARCH)
+CPPFLAGS=$(DEFS) -nostdinc -I../include
+CFLAGS=$(CPPFLAGS) -nostdlib -fno-builtin -Wmissing-prototypes -Werror -O2
+LFLAGS=-M -no-check-sections -T ../arch/mips/_link.ld
+arch_sources= \
+    arch/powerpc.c \
+    arch/fpu_context.c

 /SPARTAN/trunk/arch/powerpc/boot/boot.s
 ,0 → 1,28
+#
+# Copyright (C) 2001-2004 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#

 /SPARTAN/trunk/arch/powerpc/boot/Makefile
 ,0 → 1,21
+.PHONY: nothing build
+nothing:
+build: boot.bin
+    cp boot.bin ../../../src/load.bin
+AS=/usr/local/mips/bin/decstation-ultrix-as
+LD=/usr/local/mips/bin/decstation-ultrix-ld
+ASFLAGS=-mips2 -EL
+LFLAGS=--oformat=binary -mips2 -EL -e start
+boot.bin: boot.o
+    $(LD) $(LFLAGS) boot.o -o $@
+boot.o:
+    $(AS) boot.s -o $@
+clean:
+    -rm *.o *.bin

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