/SPARTAN/trunk/include/mm/page.h |
---|
76,7 → 76,6 |
* These macros traverse the 4-level tree of page tables, |
* each descending by one level. |
*/ |
#define GET_PTL0_ADDRESS() GET_PTL0_ADDRESS_ARCH() |
#define GET_PTL1_ADDRESS(ptl0, i) GET_PTL1_ADDRESS_ARCH(ptl0, i) |
#define GET_PTL2_ADDRESS(ptl1, i) GET_PTL2_ADDRESS_ARCH(ptl1, i) |
#define GET_PTL3_ADDRESS(ptl2, i) GET_PTL3_ADDRESS_ARCH(ptl2, i) |
86,7 → 85,6 |
* These macros are provided to change shape of the 4-level |
* tree of page tables on respective level. |
*/ |
#define SET_PTL0_ADDRESS(ptl0) SET_PTL0_ADDRESS_ARCH(ptl0) |
#define SET_PTL1_ADDRESS(ptl0, i, a) SET_PTL1_ADDRESS_ARCH(ptl0, i, a) |
#define SET_PTL2_ADDRESS(ptl1, i, a) SET_PTL2_ADDRESS_ARCH(ptl1, i, a) |
#define SET_PTL3_ADDRESS(ptl2, i, a) SET_PTL3_ADDRESS_ARCH(ptl2, i, a) |
/SPARTAN/trunk/include/mm/vm.h |
---|
29,6 → 29,7 |
#ifndef __VM_H__ |
#define __VM_H__ |
#include <arch/mm/page.h> |
#include <arch/mm/vm.h> |
#include <arch/types.h> |
#include <typedefs.h> |
51,7 → 52,7 |
}; |
/* |
* Each vm_area structure describes one continuous area of virtual memory. |
* Each vm_area_t structure describes one continuous area of virtual memory. |
* In the future, it should not be difficult to support shared areas of vm. |
*/ |
struct vm_area { |
64,7 → 65,7 |
}; |
/* |
* vm_mapping_t contains the list of vm_areas of userspace accessible |
* vm_t contains the list of vm_areas of userspace accessible |
* pages for one or more tasks. Ranges of kernel memory pages are not |
* supposed to figure in the list as they are shared by all tasks and |
* set up during system initialization. |
72,6 → 73,8 |
struct vm { |
spinlock_t lock; |
link_t vm_area_head; |
int j; |
pte_t *ptl0; |
}; |
extern vm_t * vm_create(void); |
/SPARTAN/trunk/doc/AUTHORS |
---|
1,6 → 1,6 |
Jakub Jermar |
Jakub Vana |
Martin Decky |
Josef Cejka |
Sergey Bondari |
Ondrej Palkovsky |
Jakub Jermar <jermar@itbs.cz> |
Jakub Vana <jakub.vana@gmail.com> |
Martin Decky <martin@decky.cz> |
Josef Cejka <malyzelenyhnus@seznam.cz> |
Sergey Bondari <bondari@itbs.cz> |
Ondrej Palkovsky <ondrap@penguin.cz> |
/SPARTAN/trunk/src/mm/vm.c |
---|
48,6 → 48,7 |
if (m) { |
spinlock_initialize(&m->lock); |
list_initialize(&m->vm_area_head); |
m->ptl0 = NULL; |
} |
return m; |
/SPARTAN/trunk/arch/ia64/include/mm/page.h |
---|
29,6 → 29,7 |
#ifndef __ia64_PAGE_H__ |
#define __ia64_PAGE_H__ |
#include <arch/types.h> |
#include <arch/mm/frame.h> |
#define PAGE_SIZE FRAME_SIZE |
/SPARTAN/trunk/arch/mips/include/mm/frame.h |
---|
29,7 → 29,7 |
#ifndef __mips_FRAME_H__ |
#define __mips_FRAME_H__ |
#define FRAME_SIZE 4096 |
#define FRAME_SIZE 16384 |
extern void frame_arch_init(void); |
/SPARTAN/trunk/arch/mips/include/mm/page.h |
---|
29,8 → 29,11 |
#ifndef __mips_PAGE_H__ |
#define __mips_PAGE_H__ |
#include <arch/mm/tlb.h> |
#include <mm/page.h> |
#include <arch/mm/frame.h> |
#include <arch/types.h> |
#include <arch.h> |
#define PAGE_SIZE FRAME_SIZE |
37,39 → 40,74 |
#define KA2PA(x) ((x) - 0x80000000) |
#define PA2KA(x) ((x) + 0x80000000) |
#define page_arch_init() ; |
/* |
* Implementation of generic 4-level page table interface. |
* TODO: this is a fake implementation provided to satisfy the compiler |
* NOTE: this implementation is under construction |
* |
* Page table layout: |
* - 32-bit virtual addresses |
* - Offset is 14 bits => pages are 16K long |
* - PTE's use the same format as CP0 EntryLo[01] registers => PTE is therefore 4 bytes long |
* - PTL0 has 64 entries (6 bits) |
* - PTL1 is not used |
* - PTL2 is not used |
* - PTL3 has 4096 entries (12 bits) |
*/ |
#define PTL0_INDEX_ARCH(vaddr) 0 |
#define PTL0_INDEX_ARCH(vaddr) ((vaddr)>>26) |
#define PTL1_INDEX_ARCH(vaddr) 0 |
#define PTL2_INDEX_ARCH(vaddr) 0 |
#define PTL3_INDEX_ARCH(vaddr) 0 |
#define PTL3_INDEX_ARCH(vaddr) (((vaddr)>>14)&0xfff) |
#define GET_PTL0_ADDRESS_ARCH() ((pte_t *) 0) |
#define GET_PTL1_ADDRESS_ARCH(ptl0, i) ((pte_t *) 0) |
#define GET_PTL2_ADDRESS_ARCH(ptl1, i) ((pte_t *) 0) |
#define GET_PTL3_ADDRESS_ARCH(ptl2, i) ((pte_t *) 0) |
#define GET_FRAME_ADDRESS_ARCH(ptl3, i) ((pte_t *) 0) |
#define GET_PTL0_ADDRESS_ARCH() (PTL0) |
#define SET_PTL0_ADDRESS_ARCH(ptl0) (PTL0 = (pte_t *)(ptl0)) |
#define SET_PTL0_ADDRESS_ARCH(ptl0) |
#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) |
#define GET_PTL1_ADDRESS_ARCH(ptl0, i) (((pte_t *)(ptl0))[(i)].pfn<<14) |
#define GET_PTL2_ADDRESS_ARCH(ptl1, i) (ptl1) |
#define GET_PTL3_ADDRESS_ARCH(ptl2, i) (ptl2) |
#define GET_FRAME_ADDRESS_ARCH(ptl3, i) (((pte_t *)(ptl3))[(i)].pfn<<14) |
#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) (((pte_t *)(ptl0))[(i)].pfn = (a)>>14) |
#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) |
#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) |
#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) |
#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) (((pte_t *)(ptl3))[(i)].pfn = (a)>>14) |
#define GET_PTL1_FLAGS_ARCH(ptl0, i) 0 |
#define GET_PTL2_FLAGS_ARCH(ptl1, i) 0 |
#define GET_PTL3_FLAGS_ARCH(ptl2, i) 0 |
#define GET_FRAME_FLAGS_ARCH(ptl3, i) 0 |
#define GET_PTL1_FLAGS_ARCH(ptl0, i) get_pt_flags((pte_t *)(ptl0), (index_t)(i)) |
#define GET_PTL2_FLAGS_ARCH(ptl1, i) PAGE_PRESENT |
#define GET_PTL3_FLAGS_ARCH(ptl2, i) PAGE_PRESENT |
#define GET_FRAME_FLAGS_ARCH(ptl3, i) get_pt_flags((pte_t *)(ptl3), (index_t)(i)) |
#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) |
#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) set_pt_flags((pte_t *)(ptl0), (index_t)(i), (x)) |
#define SET_PTL2_FLAGS_ARCH(ptl1, i, x) |
#define SET_PTL3_FLAGS_ARCH(ptl2, i, x) |
#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) |
#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) set_pt_flags((pte_t *)(ptl3), (index_t)(i), (x)) |
typedef __u32 pte_t; |
static inline int get_pt_flags(pte_t *pt, index_t i) |
{ |
pte_t *p = &pt[i]; |
return ( |
((p->c>PAGE_UNCACHED)<<PAGE_CACHEABLE_SHIFT) | |
((!p->v)<<PAGE_PRESENT_SHIFT) | |
(1<<PAGE_USER_SHIFT) | |
(1<<PAGE_READ_SHIFT) | |
((p->d)<<PAGE_WRITE_SHIFT) | |
(1<<PAGE_EXEC_SHIFT) |
); |
} |
static inline void set_pt_flags(pte_t *pt, index_t i, int flags) |
{ |
pte_t *p = &pt[i]; |
p->c = (flags & PAGE_CACHEABLE) ? PAGE_CACHEABLE_EXC_WRITE : PAGE_UNCACHED; |
p->v = !(flags & PAGE_NOT_PRESENT); |
p->d = flags & PAGE_WRITE; |
} |
extern void page_arch_init(void); |
extern pte_t *PTL0; |
#endif |
/SPARTAN/trunk/arch/mips/include/mm/tlb.h |
---|
29,12 → 29,15 |
#ifndef __mips_TLB_H__ |
#define __mips_TLB_H__ |
#define PAGE_UNCACHED 2 |
#define PAGE_CACHEABLE_EXC_WRITE 5 |
struct entry_lo { |
unsigned g : 1; |
unsigned v : 1; |
unsigned d : 1; |
unsigned c : 3; |
unsigned pfn : 24; |
unsigned g : 1; /* global bit */ |
unsigned v : 1; /* valid bit */ |
unsigned d : 1; /* dirty/write-protect bit */ |
unsigned c : 3; /* cache coherency attribute */ |
unsigned pfn : 24; /* frame number */ |
unsigned : 2; |
} __attribute__ ((packed)); |
58,6 → 61,8 |
struct page_mask mask; |
} __attribute__ ((packed)); |
typedef struct entry_lo pte_t; |
extern void tlb_refill(void); |
extern void tlb_invalid(void); |
/SPARTAN/trunk/arch/mips/src/mm/page.c |
---|
27,4 → 27,19 |
*/ |
#include <arch/types.h> |
#include <arch/mm/page.h> |
#include <arch/mm/frame.h> |
#include <mm/frame.h> |
#include <mm/page.h> |
pte_t *PTL0 = NULL; |
void page_arch_init(void) |
{ |
__address ptl0; |
ptl0 = frame_alloc(FRAME_KA | FRAME_PANIC); |
memsetb(ptl0, FRAME_SIZE, 0); |
SET_PTL0_ADDRESS(KA2PA(ptl0)); |
} |