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Ignore whitespace Rev 276 → Rev 277

/SPARTAN/trunk/arch/amd64/Makefile.inc
52,7 → 52,8
arch/acpi/madt.c
 
ifdef SMP
arch_sources += arch/smp/apic.c \
arch_sources += arch/smp/ap.S \
arch/smp/apic.c \
arch/smp/ipi.c \
arch/smp/mps.c \
arch/smp/smp.c
/SPARTAN/trunk/arch/amd64/src/dummy.s
27,8 → 27,3
#
 
.text
 
.global ap_boot
ap_boot:
ret
/SPARTAN/trunk/arch/amd64/src/pm.c
91,7 → 91,7
.special = 1,
.granularity = 1,
.base_24_31 = 0 },
/* KTEXT 16-bit protected */
/* KTEXT 32-bit protected */
{ .limit_0_15 = 0xffff,
.base_0_15 = 0,
.base_16_23 = 0,
99,7 → 99,7
.limit_16_19 = 0xf,
.available = 0,
.longmode = 0,
.special = 0,
.special = 1,
.granularity = 1,
.base_24_31 = 0 },
/* TSS descriptor - set up will be completed later,
/SPARTAN/trunk/arch/amd64/src/smp/ap.S
0,0 → 1,109
#
# Copyright (C) 2001-2004 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
#
# Init code for application processors.
#
 
#define __ASM__
#include <arch/boot/boot.h>
#include <arch/pm.h>
#include <arch/cpu.h>
#include <arch/cpuid.h>
#include <arch/mm/page.h>
.section K_TEXT_START_2
 
#ifdef __SMP__
 
.global ap_boot
 
# This piece of code is real-mode and is meant to be alligned at 4K boundary.
# The requirement for such an alignment comes from MP Specification's STARTUP IPI
# requirements.
 
.align 4096
ap_boot:
.code16
cli
xorw %ax, %ax
movw %ax, %ds
 
lgdt ap_bootstrap_gdtr_boot # initialize Global Descriptor Table register
movl %cr0, %eax
orl $1, %eax
movl %eax, %cr0 # switch to protected mode
jmpl $gdtselector(KTEXT32_DES), $now_in_prot
 
.code32
now_in_prot:
movw $gdtselector(KDATA_DES), %ax
movw %ax, %ds
movw %ax, %ss
 
# Enable 64-bit page transaltion entries - CR4.PAE = 1.
# Paging is not enabled until after long mode is enabled
movl %cr4, %eax
btsl $5, %eax
movl %eax, %cr4
 
# Set up NEW paging tables, that are
# already moved BOOT_OFFSET up
leal ptl_0+BOOT_OFFSET, %eax
movl %eax, %cr3
# Enable long mode
movl $EFER_MSR_NUM, %ecx # EFER MSR number
rdmsr # Read EFER
btsl $AMD_LME_FLAG, %eax # Set LME=1
wrmsr # Write EFER
# Enable paging to activate long mode (set CR0.PG=1)
movl %cr0, %eax
btsl $31, %eax
movl %eax, %cr0
# At this point we are in compatibility mode
jmpl $gdtselector(KTEXT_DES), $start64
 
.code64
start64:
movq $ctx, %rax
movq 0(%rax), %rsp
call main_ap # never returns
.global ap_bootstrap_gdtr_boot
ap_bootstrap_gdtr_boot:
.word gdtselector(GDT_ITEMS)
.long KA2PA(gdt)
 
#endif /* __SMP__ */
/SPARTAN/trunk/arch/amd64/src/boot/boot.S
82,14 → 82,13
1:
jmp 1b
 
# Protected 16-bit. We want to reuse the code-seg descriptor,
# the Default operand size must not be 1 when entering long mode
# Protected 32-bit. We want to reuse the code-seg descriptor,
# the Default operand size must not be 1 when entering long mode
.code32
now_in_prot:
# Set up stack & data descriptors
movw $gdtselector(KDATA_DES), %ax
movw %ax, %ds
movw %ax, %fs
movw %ax, %gs
movw %ax, %ss
 
movb $0xd1, %al # enable A20 using the keyboard controller
171,8 → 170,3
bsp_bootstrap_gdtr:
.word gdtselector(GDT_ITEMS)
.long KA2PA(gdt)-BOOT_OFFSET
 
.global ap_bootstrap_gdtr
ap_bootstrap_gdtr:
.word gdtselector(GDT_ITEMS)
.long KA2PA(gdt)-BOOT_OFFSET
/SPARTAN/trunk/arch/amd64/_link.ld
55,9 → 55,13
 
kdata_end = .;
}
_map_address = 0xffffffff80100000;
_boot_offset = 0x100000;
_ka2pa_offset = 0xffffffff80000000;
_map_address = _ka2pa_offset + _boot_offset;
 
_hardcoded_kernel_size = (ktext_end - ktext_start) + (unmapped_ktext_end - unmapped_ktext_start) + (kdata_end - kdata_start) + (unmapped_kdata_end - unmapped_kdata_start);
 
e820table_boot = e820table - _map_address;
e820counter_boot = e820counter - _map_address;
ap_bootstrap_gdtr = ap_bootstrap_gdtr_boot + _ka2pa_offset;
}
/SPARTAN/trunk/arch/ia32/src/smp/mps.c
223,7 → 223,7
return 1;
}
l_apic = (__u32 *)PA2KA((__address)ct->l_apic);
l_apic = (__u32 *)(__address)ct->l_apic;
 
cnt = 0;
cur = &ct->base_table[0];
333,7 → 333,7
return;
}
io_apic = (__u32 *)PA2KA((__address)ioa->io_apic);
io_apic = (__u32 *)(__address)ioa->io_apic;
}
 
//#define MPSCT_VERBOSE
/SPARTAN/trunk/arch/ia32/src/smp/smp.c
61,11 → 61,11
ops = &mps_config_operations;
}
 
if (config.cpu_count > 1) {
map_page_to_frame((__address)l_apic, KA2PA((__address)l_apic),
if (config.cpu_count > 1) {
map_page_to_frame((__address)l_apic, (__address)l_apic,
PAGE_NOT_CACHEABLE, 0);
map_page_to_frame((__address) io_apic,
KA2PA((__address) io_apic),
map_page_to_frame((__address) io_apic,
(__address) io_apic,
PAGE_NOT_CACHEABLE, 0);
}