/SPARTAN/trunk/include/arch.h |
---|
33,13 → 33,12 |
#include <typedefs.h> |
#include <cpu.h> |
#include <arch/cpu.h> |
#define CPU (the->cpu) |
#define THREAD (the->thread) |
#define TASK (the->task) |
#define CPU (cpu_private_data[CPU_ID_ARCH].cpu) |
#define THREAD (cpu_private_data[CPU_ID_ARCH].thread) |
#define TASK (cpu_private_data[CPU_ID_ARCH].task) |
extern cpu_private_page_t *the; |
extern void arch_init(void); |
extern void calibrate_delay_loop(void); |
/SPARTAN/trunk/include/typedefs.h |
---|
30,7 → 30,7 |
#define __TYPEDEFS_H__ |
typedef struct config config_t; |
typedef struct cpu_private_page cpu_private_page_t; |
typedef struct cpu_private_data cpu_private_data_t; |
typedef struct cpu_info cpu_info_t; |
typedef struct cpu cpu_t; |
/SPARTAN/trunk/include/cpu.h |
---|
68,12 → 68,17 |
__u8 *stack; |
}; |
struct cpu_private_page { |
/* |
* read/write by associated CPU |
* read only by other CPUs |
*/ |
struct cpu_private_data { |
cpu_t *cpu; |
thread_t *thread; |
task_t *task; |
}; |
extern cpu_private_data_t *cpu_private_data; |
extern cpu_t *cpus; |
extern void cpu_init(void); |
/SPARTAN/trunk/src/Makefile.config |
---|
11,7 → 11,7 |
HT=__HT__ |
# Deadlock detection support for spinlocks. |
DEBUG_SPINLOCK=DEBUG_SPINLOCK |
#DEBUG_SPINLOCK=DEBUG_SPINLOCK |
# Uncomment if you want to run in the test mode |
#TEST=__TEST__ |
/SPARTAN/trunk/src/proc/thread.c |
---|
99,7 → 99,7 |
i = (t->pri < RQ_COUNT -1) ? ++t->pri : t->pri; |
cpu = the->cpu; |
cpu = CPU; |
if (t->flags & X_WIRED) { |
cpu = t->cpu; |
} |
/SPARTAN/trunk/src/main/main.c |
---|
103,6 → 103,7 |
arch_init(); |
printf("%s, %s\n", project, copyright); |
printf("%L: hardcoded_ktext_size=%dK, hardcoded_kdata_size=%dK\n", |
/SPARTAN/trunk/src/cpu/cpu.c |
---|
39,8 → 39,7 |
#include <memstr.h> |
#include <list.h> |
cpu_private_page_t *the = NULL; |
cpu_private_data_t *cpu_private_data; |
cpu_t *cpus; |
void cpu_init(void) { |
49,11 → 48,16 |
#ifdef __SMP__ |
if (config.cpu_active == 1) { |
#endif /* __SMP__ */ |
cpu_private_data = (cpu_private_data_t *) malloc(sizeof(cpu_private_data_t) * config.cpu_count); |
if (!cpu_private_data) |
panic("malloc/cpu_private_data"); |
cpus = (cpu_t *) malloc(sizeof(cpu_t) * config.cpu_count); |
if (!cpus) |
panic("malloc/cpus"); |
/* initialize everything */ |
memsetb((__address) cpu_private_data, sizeof(cpu_private_data_t) * config.cpu_count, 0); |
memsetb((__address) cpus, sizeof(cpu_t) * config.cpu_count, 0); |
for (i=0; i < config.cpu_count; i++) { |
70,22 → 74,14 |
for (j = 0; j < RQ_COUNT; j++) { |
list_initialize(&cpus[i].rq[j].rq_head); |
} |
cpu_private_data[i].cpu = &cpus[i]; |
} |
the = (cpu_private_page_t *) frame_alloc(FRAME_KA | FRAME_PANIC); |
memsetb((__address) the, PAGE_SIZE, 0); |
#ifdef __SMP__ |
} |
else { |
__address frame; |
frame = frame_alloc(FRAME_KA | FRAME_PANIC); |
memsetb(frame, PAGE_SIZE, 0); |
map_page_to_frame((__address) the, frame, PAGE_CACHEABLE, 1); |
} |
#endif /* __SMP__ */ |
CPU = &cpus[config.cpu_active-1]; |
cpu_identify(); |
cpu_arch_init(); |
} |
/SPARTAN/trunk/arch/mips/include/cpu.h |
---|
31,6 → 31,8 |
#include <typedefs.h> |
#define CPU_ID_ARCH 0 |
struct cpu_arch { |
int imp_num; |
int rev_num; |
/SPARTAN/trunk/arch/ia32/boot/boot.ld |
---|
1,3 → 1,5 |
OUTPUT_FORMAT(binary) |
ENTRY(main) |
SECTIONS { |
.text 0x7c00 : AT (0x0) { *(.text) } |
} |
/SPARTAN/trunk/arch/ia32/include/smp/apic.h |
---|
95,6 → 95,8 |
/* Local APIC ID Register */ |
#define L_APIC_ID (0x020/sizeof(__u32)) |
#define L_APIC_IDClear (~(0xf<<24)) |
#define L_APIC_IDShift 24 |
#define L_APIC_IDMask 0xf |
/* IO APIC */ |
#define IOREGSEL (0x00/sizeof(__u32)) |
120,6 → 122,7 |
extern int l_apic_send_init_ipi(__u8 apicid); |
extern void l_apic_debug(void); |
extern void l_apic_timer_interrupt(__u8 n, __u32 stack[]); |
extern __u8 l_apic_id(void); |
extern __u32 io_apic_read(__u8 address); |
extern void io_apic_write(__u8 address , __u32 x); |
/SPARTAN/trunk/arch/ia32/include/cpu.h |
---|
29,9 → 29,16 |
#ifndef __ia32_CPU_H__ |
#define __ia32_CPU_H__ |
#include <config.h> |
#include <typedefs.h> |
#include <arch/pm.h> |
#ifdef __SMP__ |
#define CPU_ID_ARCH (config.cpu_count>1?l_apic_id():0) |
#else |
#define CPU_ID_ARCH (0) |
#endif |
struct cpu_arch { |
int vendor; |
int family; |
/SPARTAN/trunk/arch/ia32/Makefile.inc |
---|
13,7 → 13,7 |
endif |
CPPFLAGS=$(DEFS) -nostdinc -I../include |
CFLAGS=$(CPPFLAGS) -nostdlib -fno-builtin -fomit-frame-pointer -Wmissing-prototypes -Werror -O3 |
CFLAGS=$(CPPFLAGS) -nostdlib -fno-builtin -fomit-frame-pointer -Wmissing-prototypes -Werror -O1 |
LFLAGS=-M -no-check-sections -T ../arch/ia32/_link.ld |
arch_sources= \ |
/SPARTAN/trunk/arch/ia32/src/smp/apic.c |
---|
26,8 → 26,6 |
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
*/ |
#ifdef __SMP__ |
#include <arch/types.h> |
#include <arch/smp/apic.h> |
#include <arch/smp/ap.h> |
39,6 → 37,8 |
#include <arch/asm.h> |
#include <arch.h> |
#ifdef __SMP__ |
/* |
* This is functional, far-from-general-enough interface to the APIC. |
* Advanced Programmable Interrupt Controller for MP systems. |
221,8 → 221,20 |
void l_apic_init(void) |
{ |
__u32 tmp, t1, t2; |
int cpu_id = config.cpu_active - 1; |
/* |
* Here we set local APIC ID's so that they match operating system's CPU ID's |
* This operation is dangerous as it is model specific. |
* TODO: some care should be taken. |
* NOTE: CPU may not be used to define APIC ID |
*/ |
if (l_apic_id() != cpu_id) { |
l_apic[L_APIC_ID] &= L_APIC_IDClear; |
l_apic[L_APIC_ID] |= (l_apic[L_APIC_ID]&L_APIC_IDClear)|((cpu_id)<<L_APIC_IDShift); |
} |
l_apic[LVT_Err] |= (1<<16); |
l_apic[LVT_LINT0] |= (1<<16); |
l_apic[LVT_LINT1] |= (1<<16); |
270,7 → 282,7 |
#ifdef LAPIC_VERBOSE |
int i, lint; |
printf("LVT on cpu%d, LAPIC ID: %d\n", CPU->id, (l_apic[L_APIC_ID] >> 24)&0xf); |
printf("LVT on cpu%d, LAPIC ID: %d\n", CPU->id, l_apic_id()); |
printf("LVT_Tm: "); |
if (l_apic[LVT_Tm] & (1<<17)) printf("periodic"); else printf("one-shot"); putchar(','); |
304,7 → 316,7 |
/* |
* This register is supported only on P6 and higher. |
*/ |
if (CPU->family > 5) { |
if (CPU->arch.family > 5) { |
printf("LVT_PCINT: "); |
if (l_apic[LVT_PCINT] & (1<<16)) printf("masked"); else printf("not masked"); putchar(','); |
if (l_apic[LVT_PCINT] & (1<<12)) printf("send pending"); else printf("idle"); putchar(','); |
325,6 → 337,11 |
clock(); |
} |
__u8 l_apic_id(void) |
{ |
return (l_apic[L_APIC_ID] >> L_APIC_IDShift)&L_APIC_IDMask; |
} |
__u32 io_apic_read(__u8 address) |
{ |
__u32 tmp; |
/SPARTAN/trunk/arch/ia32/src/cpu/cpu.c |
---|
35,6 → 35,8 |
#include <print.h> |
#include <typedefs.h> |
#include <arch/smp/apic.h> |
/* |
* Identification of CPUs. |
* Contains only non-MP-Specification specific SMP code. |
/SPARTAN/trunk/arch/ia32/src/pm.c |
---|
66,7 → 66,7 |
struct tss *tss_p = NULL; |
/* gdtr changes everytime new CPU is initialized */ |
struct ptr_16_32 gdtr = { .limit = sizeof(gdt), .base = (__address) gdt }; |
struct ptr_16_32 gdtr __attribute__ ((section ("K_DATA_START"))) = { .limit = sizeof(gdt), .base = (__address) gdt }; |
struct ptr_16_32 idtr = { .limit = sizeof(idt), .base = (__address) idt }; |
void gdt_setbase(struct descriptor *d, __address base) |
/SPARTAN/trunk/arch/ia32/_link.ld |
---|
13,11 → 13,13 |
.image 0x8000: AT (0x8000) { |
ktext_start = .; |
*(K_TEXT_START); |
delta_start = .; |
*(K_DATA_START); |
delta_end = .; |
*(.text); |
ktext_end = .; |
kdata_start = .; |
*(K_DATA_START); |
*(.data); /* initialized data */ |
*(.rodata*); /* string literals */ |
*(COMMON); /* global variables */ |
28,12 → 30,12 |
. = ABSOLUTE(hardcoded_ktext_size); |
.patch_1 : { |
LONG(ktext_end - ktext_start); |
LONG(ktext_end - ktext_start - (delta_end - delta_start)); |
} |
. = ABSOLUTE(hardcoded_kdata_size); |
.patch_2 : { |
LONG(kdata_end - kdata_start); |
LONG(kdata_end - kdata_start + (delta_end - delta_start)); |
} |
. = ABSOLUTE(hardcoded_load_address); |