/trunk/kernel/arch/ppc32/include/barrier.h |
55,6 → 55,7 |
"dcbst 0, %0\n" |
"sync\n" |
"icbi 0, %0\n" |
"sync\n" |
"isync\n" |
:: "r" (addr) |
); |
76,7 → 77,10 |
asm volatile ("icbi 0, %0\n" :: "r" (addr + i)); |
} |
|
asm volatile ("isync"); |
asm volatile ( |
"sync\n" |
"isync\n" |
); |
} |
|
#endif |
/trunk/kernel/arch/ppc32/src/mm/tlb.c |
47,6 → 47,11 |
static unsigned int seed_real __attribute__ ((section("K_UNMAPPED_DATA_START"))) = 42; |
|
|
#define TLB_FLUSH \ |
"tlbie %0\n" \ |
"addi %0, %0, 0x1000\n" |
|
|
/** Try to find PTE for faulting address |
* |
* Try to find PTE for faulting address. |
411,8 → 416,87 |
|
void tlb_invalidate_all(void) |
{ |
uint32_t index; |
asm volatile ( |
"li %0, 0\n" |
"sync\n" |
|
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
|
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
|
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
|
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
|
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
|
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
|
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
|
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
TLB_FLUSH |
|
"eieio\n" |
"tlbsync\n" |
"sync\n" |
: "=r" (index) |
); |
} |
|
/trunk/boot/arch/ppc32/loader/asm.S |
29,13 → 29,25 |
#include "asm.h" |
#include "regname.h" |
|
.macro FLUSH_CACHE addr |
.macro SMC_COHERENCY addr |
dcbst 0, \addr |
sync |
icbi 0, \addr |
sync |
isync |
.endm |
|
.macro FLUSH_DCACHE addr |
dcbst 0, \addr |
sync |
isync |
.endm |
|
.macro TLB_FLUSH reg |
tlbie \reg |
addi \reg, \reg, 0x1000 |
.endm |
|
.text |
|
.global halt |
171,7 → 183,7 |
lwz r28, 0(r29) |
stw r28, 0(r30) |
|
FLUSH_CACHE r30 |
SMC_COHERENCY r30 |
|
addi r29, r29, 4 |
addi r30, r30, 4 |
268,7 → 280,7 |
# write zeroes |
|
stw r29, 0(r31) |
FLUSH_CACHE r31 |
FLUSH_DCACHE r31 |
|
addi r31, r31, 4 |
subi r30, r30, 4 |
328,7 → 340,86 |
|
#endif |
|
# flush TLB |
|
li r31, 0 |
sync |
|
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
|
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
|
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
|
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
|
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
|
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
|
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
|
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
TLB_FLUSH r31 |
|
eieio |
tlbsync |
sync |
|
# start the kernel |
# |