| /branches/arm/kernel/arch/arm32/include/mm/page.h |
|---|
| 99,7 → 99,7 |
| * \param pt pointer to page table to set |
| */ |
| static inline void set_ptl0_addr( pte_level0_t* pt){ |
| asm volatile ( "mrc p15, 0, %0, c2, c0, 0 \n" |
| asm volatile ( "mcr p15, 0, %0, c2, c0, 0 \n" |
| : |
| : "r"(pt) |
| ); |
| /branches/arm/kernel/arch/arm32/src/mm/tlb.c |
|---|
| 45,6 → 45,7 |
| asm volatile ( |
| "eor r1, r1\n" |
| "MCR p15, 0, r1, c8, c7, 0\n" // see ARM Architecture reference relE 3.7.7 p.528 |
| ::: "r1" |
| ); |
| } |
| 64,10 → 65,11 |
| static inline void invlpg(uintptr_t page) |
| { |
| asm volatile ( |
| "MCR p15, 0, %0, c8, c7, 1" |
| : /* no output */ |
| : "r"(page) /* input */ |
| ); |
| "MCR p15, 0, %0, c8, c7, 1" |
| : /* no output */ |
| : "r"(page) /* input */ |
| ); |
| } |
| /** Invalidate TLB entries for specified page range belonging to specified address space. |
| /branches/arm/kernel/arch/arm32/src/mm/frame.c |
|---|
| 39,15 → 39,14 |
| /** Create memory zones. */ |
| void frame_arch_init(void) |
| { |
| aux_printf("frame_arch_init ... begin\n"); |
| aux_printf("frame_arch_init ... begin\n"); |
| // all memory as one zone |
| zone_create(0, ADDR2PFN(config.memory_size), 1, 0); |
| aux_printf("frame_arch_init ... 1\n"); |
| zone_create(0, ADDR2PFN(config.memory_size), 11, 0); |
| /* |
| * Blacklist interrupt vector |
| * Blacklist interrupt vector + Kernels from boot loader page table |
| */ |
| frame_mark_unavailable(0, 1); |
| aux_printf("frame_arch_init ... end\n"); |
| frame_mark_unavailable(0, 10); |
| aux_printf("frame_arch_init ... end\n"); |
| } |
| /branches/arm/kernel/arch/arm32/src/mm/page.c |
|---|
| 41,7 → 41,6 |
| void page_arch_init(void) |
| { |
| aux_printf("page_arch_init\n"); |
| uintptr_t cur; |
| int flags; |
| 52,25 → 51,11 |
| const unsigned maxmem = ALIGN_DOWN(config.memory_size, FRAME_SIZE); |
| for (cur = 0; cur < maxmem; cur += FRAME_SIZE) { |
| page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags); |
| // page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags); |
| } |
| //TODO set page fault routines |
| // no problem no ... kernel doesn't do page faults |
| asm volatile ( |
| "ldr r0, =0x55555555 \n" |
| "mrc p15, 0, r0, c3, c0, 0 \n" //set domain acces rights to client <==> take rights from page tables |
| "mcr p15, 0, r0, c1, c0, 0 \n" // get current setting of system ... register 1 isn't only for memmory management |
| "ldr r1, =0xFFFFFE8D \n" // mask to disable aligment checks, System, Rom bit disable |
| "and r0, r0, r1 \n" |
| "ldr r1, =0x00000001 \n" // mask to enable paging |
| "orr r0, r0, r1 \n" |
| "mrc p15, 0, r0, c1, c0, 0 \n" // store setting |
| : |
| : |
| : "r0", "r1" |
| ); |
| } |
| /** Map device into kernel space. */ |