/trunk/kernel/arch/sparc64/include/trap/interrupt.h |
---|
89,7 → 89,7 |
#endif /* __ASM__ */ |
#ifndef __ASM__ |
extern void interrupt(void); |
extern void interrupt(int n, istate_t *istate); |
#endif /* !def __ASM__ */ |
#endif |
/trunk/kernel/arch/sparc64/include/trap/trap_table.h |
---|
100,10 → 100,6 |
or %g1, %lo(\f), %g1 |
.endm |
.macro SIMPLE_HANDLER f |
call \f |
nop |
.endm |
#endif /* __ASM__ */ |
#endif |
/trunk/kernel/arch/sparc64/include/trap/exception.h |
---|
42,10 → 42,14 |
#define TT_MEM_ADDRESS_NOT_ALIGNED 0x34 |
#ifndef __ASM__ |
extern void do_instruction_access_exc(void); |
extern void do_mem_address_not_aligned(void); |
extern void do_data_access_error(void); |
extern void do_illegal_instruction(void); |
#include <typedefs.h> |
extern void do_instruction_access_exc(int n, istate_t *istate); |
extern void do_mem_address_not_aligned(int n, istate_t *istate); |
extern void do_data_access_error(int n, istate_t *istate); |
extern void do_illegal_instruction(int n, istate_t *istate); |
#endif /* !__ASM__ */ |
#endif |
52,4 → 56,3 |
/** @} |
*/ |
/trunk/kernel/arch/sparc64/include/trap/mmu.h |
---|
53,9 → 53,9 |
#ifdef __ASM__ |
.macro FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER |
! |
! First, try to refill TLB from TSB. |
! |
/* |
* First, try to refill TLB from TSB. |
*/ |
! TODO |
wrpr %g0, PSTATE_PRIV_BIT | PSTATE_AG_BIT, %pstate |
/trunk/kernel/arch/sparc64/src/trap/exception.c |
---|
34,31 → 34,33 |
*/ |
#include <arch/trap/exception.h> |
#include <arch/interrupt.h> |
#include <arch/asm.h> |
#include <debug.h> |
#include <typedefs.h> |
/** Handle instruction_access_exception. */ |
void do_instruction_access_exc(void) |
void do_instruction_access_exc(int n, istate_t *istate) |
{ |
panic("Instruction Access Exception\n"); |
panic("Instruction Access Exception at %p.\n", istate->tpc); |
} |
/** Handle mem_address_not_aligned. */ |
void do_mem_address_not_aligned(void) |
void do_mem_address_not_aligned(int n, istate_t *istate) |
{ |
panic("Memory Address Not Aligned\n"); |
panic("Memory Address Not Aligned from %p.\n", istate->tpc); |
} |
/** Handle data_access_error. */ |
void do_data_access_error(void) |
void do_data_access_error(int n, istate_t *istate) |
{ |
panic("Data Access Error: %p\n", tpc_read()); |
panic("Data Access Error from %p.\n", istate->tpc); |
} |
/** Handle mem_address_not_aligned. */ |
void do_illegal_instruction(void) |
void do_illegal_instruction(int n, istate_t *istate) |
{ |
panic("Illegal Instruction: %p\n", tpc_read()); |
panic("Illegal Instruction at %p.\n", istate->tpc); |
} |
/** @} |
/trunk/kernel/arch/sparc64/src/trap/interrupt.c |
---|
36,6 → 36,7 |
#include <arch/trap/interrupt.h> |
#include <interrupt.h> |
#include <arch/drivers/fhc.h> |
#include <typedefs.h> |
#include <arch/types.h> |
#include <debug.h> |
#include <ipc/sysipc.h> |
64,7 → 65,7 |
/* TODO */ |
} |
void interrupt(void) |
void interrupt(int n, istate_t *istate) |
{ |
uint64_t intrcv; |
uint64_t data0; |
/trunk/kernel/arch/sparc64/src/trap/trap_table.S |
---|
59,13 → 59,13 |
.org trap_table + TT_INSTRUCTION_ACCESS_EXCEPTION*ENTRY_SIZE |
.global instruction_access_exception |
instruction_access_exception: |
SIMPLE_HANDLER do_instruction_access_exc |
PREEMPTIBLE_HANDLER do_instruction_access_exc |
/* TT = 0x10, TL = 0, illegal_instruction */ |
.org trap_table + TT_ILLEGAL_INSTRUCTION*ENTRY_SIZE |
.global illegal_instruction |
illegal_instruction: |
SIMPLE_HANDLER do_illegal_instruction |
PREEMPTIBLE_HANDLER do_illegal_instruction |
/* TT = 0x24, TL = 0, clean_window handler */ |
.org trap_table + TT_CLEAN_WINDOW*ENTRY_SIZE |
77,13 → 77,13 |
.org trap_table + TT_DATA_ACCESS_ERROR*ENTRY_SIZE |
.global data_access_error |
data_access_error: |
SIMPLE_HANDLER do_data_access_error |
PREEMPTIBLE_HANDLER do_data_access_error |
/* TT = 0x34, TL = 0, mem_address_not_aligned */ |
.org trap_table + TT_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE |
.global mem_address_not_aligned |
mem_address_not_aligned: |
SIMPLE_HANDLER do_mem_address_not_aligned |
PREEMPTIBLE_HANDLER do_mem_address_not_aligned |
/* TT = 0x41, TL = 0, interrupt_level_1 handler */ |
.org trap_table + TT_INTERRUPT_LEVEL_1*ENTRY_SIZE |
237,13 → 237,13 |
.org trap_table + (TT_INSTRUCTION_ACCESS_EXCEPTION+512)*ENTRY_SIZE |
.global instruction_access_exception_high |
instruction_access_exception_high: |
SIMPLE_HANDLER do_instruction_access_exc |
PREEMPTIBLE_HANDLER do_instruction_access_exc |
/* TT = 0x10, TL > 0, illegal_instruction */ |
.org trap_table + (TT_ILLEGAL_INSTRUCTION+512)*ENTRY_SIZE |
.global illegal_instruction_high |
illegal_instruction_high: |
SIMPLE_HANDLER do_illegal_instruction |
PREEMPTIBLE_HANDLER do_illegal_instruction |
/* TT = 0x24, TL > 0, clean_window handler */ |
.org trap_table + (TT_CLEAN_WINDOW+512)*ENTRY_SIZE |
255,13 → 255,13 |
.org trap_table + (TT_DATA_ACCESS_ERROR+512)*ENTRY_SIZE |
.global data_access_error_high |
data_access_error_high: |
SIMPLE_HANDLER do_data_access_error |
PREEMPTIBLE_HANDLER do_data_access_error |
/* TT = 0x34, TL > 0, mem_address_not_aligned */ |
.org trap_table + (TT_MEM_ADDRESS_NOT_ALIGNED+512)*ENTRY_SIZE |
.global mem_address_not_aligned_high |
mem_address_not_aligned_high: |
SIMPLE_HANDLER do_mem_address_not_aligned |
PREEMPTIBLE_HANDLER do_mem_address_not_aligned |
/* TT = 0x64, TL > 0, fast_instruction_access_MMU_miss */ |
.org trap_table + (TT_FAST_INSTRUCTION_ACCESS_MMU_MISS+512)*ENTRY_SIZE |