/SPARTAN/trunk/doc/TODO |
---|
16,7 → 16,8 |
+ zero IOPL in EFLAGS [DONE] |
+ before IRET (from SYSCALL), zero NT in EFLAGS [DONE] |
+ [ia32] review the cache controling bits in CR0 register |
+ [ia32] zero the alignment exception bit in EFLAGS |
+ [ia32] zero the alignment exception bit in EFLAGS [DONE] |
- Task changed to clean AM in CR0 so the alignment check is disabled globaly |
+ make emulated architectures also work on real hardware |
+ bring in support for other architectures (e.g. PowerPC) |
/SPARTAN/trunk/arch/ia32/src/pm.c |
---|
128,7 → 128,7 |
} |
// Clean IOPL(12,13) and NT(14) flags in EFLAGS register |
/* Clean IOPL(12,13) and NT(14) flags in EFLAGS register */ |
static void clean_IOPL_NT_flags(void) |
{ |
asm |
144,7 → 144,7 |
); |
} |
// Clean AM(18) flag in CR0 register |
/* Clean AM(18) flag in CR0 register */ |
static void clean_AM_flag(void) |
{ |
asm |
200,6 → 200,6 |
*/ |
__asm__("ltr %0" : : "r" ((__u16) selector(TSS_DES))); |
clean_IOPL_NT_flags(); //Disable I/O on nonprivileged levels |
clean_AM_flag(); //Disable alignment check |
clean_IOPL_NT_flags(); /* Disable I/O on nonprivileged levels */ |
clean_AM_flag(); /* Disable alignment check */ |
} |
/SPARTAN/trunk/arch/ia32/src/userspace.c |
---|
46,7 → 46,7 |
pri = cpu_priority_high(); |
__asm__ volatile ("" |
// CLNT |
/* CLNT */ |
"pushfl;" |
"pop %%eax;" |
"and $0xFFFFBFFF,%%eax;" |