/kernel/trunk/arch/sparc64/src/dummy.s |
---|
40,6 → 40,7 |
.global fpu_enable |
.global fpu_init |
.global userspace |
.global sys_tls_set |
.global dummy |
55,6 → 56,7 |
fpu_enable: |
fpu_init: |
userspace: |
sys_tls_set: |
dummy: |
retl |
/kernel/trunk/arch/ia64/include/faddr.h |
---|
39,11 → 39,6 |
* @param fptr Function pointer. |
* |
*/ |
static inline __address FADDR(void (* fptr)()) { |
__address faddr; |
#define FADDR(f) (*((__address *)(f))); |
faddr = *((__address *)(fptr));; |
return faddr; |
} |
#endif |
/kernel/trunk/arch/ia64/src/context.S |
---|
106,7 → 106,9 |
mov loc2 = pr ;; |
st8 [in0] = loc2, 16;; /*Next fpu registers should be spilled to 16B aligned address*/ |
/* |
* Save floating-point registers. |
*/ |
stf.spill [in0]=f2,16;; |
stf.spill [in0]=f3,16;; |
stf.spill [in0]=f4,16;; |
129,7 → 131,6 |
stf.spill [in0]=f30,16;; |
stf.spill [in0]=f31,16;; |
mov ar.unat = loc1 |
add r8 = r0, r0, 1 /* context_save returns 1 */ |
214,6 → 215,9 |
ld8 loc2 = [in0], 16 ;; |
mov pr = loc2, ~0 |
/* |
* Restore floating-point registers. |
*/ |
ldf.fill f2=[in0],16;; |
ldf.fill f3=[in0],16;; |
ldf.fill f4=[in0],16;; |
236,8 → 240,6 |
ldf.fill f30=[in0],16;; |
ldf.fill f31=[in0],16;; |
mov ar.unat = loc1 |
mov r8 = r0 /* context_restore returns 0 */ |
/kernel/trunk/arch/ppc32/src/dummy.s |
---|
30,6 → 30,7 |
.global asm_delay_loop |
.global userspace |
.global sys_tls_set |
.global tlb_invalidate_all |
.global tlb_invalidate_asid |
.global tlb_invalidate_pages |
46,5 → 47,8 |
userspace: |
b userspace |
sys_tls_set: |
b sys_tls_set |
asm_delay_loop: |
blr |