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Ignore whitespace Rev 1255 → Rev 1256

//kernel/trunk/arch/ia32/src/ddi/ddi.c
27,6 → 27,7
*/
 
#include <ddi/ddi.h>
#include <arch/ddi/ddi.h>
#include <proc/task.h>
#include <arch/types.h>
#include <typedefs.h>
35,6 → 36,8
#include <arch/pm.h>
#include <errno.h>
#include <arch/cpu.h>
#include <cpu.h>
#include <arch.h>
 
/** Enable I/O space range for task.
*
89,6 → 92,11
*/
bitmap_clear_range(&task->arch.iomap, (index_t) ioaddr, (count_t) size);
 
/*
* Increment I/O Permission bitmap generation counter.
*/
task->arch.iomapver++;
 
return 0;
}
 
105,3 → 113,54
*flags &= ~EFLAGS_IF;
return 0;
}
 
/** Install I/O Permission bitmap.
*
* Current task's I/O permission bitmap, if any, is installed
* in the current CPU's TSS.
*
* Interrupts must be disabled prior this call.
*/
void io_perm_bitmap_install(void)
{
count_t bits;
ptr_16_32_t cpugdtr;
descriptor_t *gdt_p;
count_t ver;
 
/* First, copy the I/O Permission Bitmap. */
spinlock_lock(&TASK->lock);
ver = TASK->arch.iomapver;
if ((bits = TASK->arch.iomap.bits)) {
bitmap_t iomap;
ASSERT(TASK->arch.iomap.map);
bitmap_initialize(&iomap, CPU->arch.tss->iomap, TSS_IOMAP_SIZE * 8);
bitmap_copy(&iomap, &TASK->arch.iomap, TASK->arch.iomap.bits);
/*
* It is safe to set the trailing eight bits because of the extra
* convenience byte in TSS_IOMAP_SIZE.
*/
bitmap_set_range(&iomap, TASK->arch.iomap.bits, 8);
}
spinlock_unlock(&TASK->lock);
 
/* Second, adjust TSS segment limit. */
gdtr_store(&cpugdtr);
gdt_p = (descriptor_t *) cpugdtr.base;
gdt_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE + BITS2BYTES(bits) - 1);
gdtr_load(&cpugdtr);
 
/*
* Before we load new TSS limit, the current TSS descriptor
* type must be changed to describe inactive TSS.
*/
gdt_p[TSS_DES].access = AR_PRESENT | AR_TSS | DPL_KERNEL;
tr_load(selector(TSS_DES));
/*
* Update the generation count so that faults caused by
* early accesses can be serviced.
*/
CPU->arch.iomapver_copy = ver;
}
//kernel/trunk/arch/ia32/src/proc/scheduler.c
35,8 → 35,7
#include <arch/debugger.h>
#include <arch/pm.h>
#include <arch/asm.h>
#include <adt/bitmap.h>
#include <print.h>
#include <arch/ddi/ddi.h>
 
/** Perform ia32 specific tasks needed before the new task is run.
*
44,42 → 43,7
*/
void before_task_runs_arch(void)
{
count_t bits;
ptr_16_32_t cpugdtr;
descriptor_t *gdt_p;
 
/*
* Switch the I/O Permission Bitmap, if necessary.
*/
 
/* First, copy the I/O Permission Bitmap. */
spinlock_lock(&TASK->lock);
if ((bits = TASK->arch.iomap.bits)) {
bitmap_t iomap;
ASSERT(TASK->arch.iomap.map);
bitmap_initialize(&iomap, CPU->arch.tss->iomap, TSS_IOMAP_SIZE * 8);
bitmap_copy(&iomap, &TASK->arch.iomap, TASK->arch.iomap.bits);
/*
* It is safe to set the trailing eight bits because of the extra
* convenience byte in TSS_IOMAP_SIZE.
*/
bitmap_set_range(&iomap, TASK->arch.iomap.bits, 8);
}
spinlock_unlock(&TASK->lock);
 
/* Second, adjust TSS segment limit. */
gdtr_store(&cpugdtr);
gdt_p = (descriptor_t *) cpugdtr.base;
gdt_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE + BITS2BYTES(bits) - 1);
gdtr_load(&cpugdtr);
 
/*
* Before we load new TSS limit, the current TSS descriptor
* type must be changed to describe inactive TSS.
*/
gdt_p[TSS_DES].access = AR_PRESENT | AR_TSS | DPL_KERNEL;
tr_load(selector(TSS_DES));
io_perm_bitmap_install();
}
 
/** Perform ia32 specific tasks needed before the new thread is scheduled.
//kernel/trunk/arch/ia32/src/interrupt.c
40,6 → 40,9
#include <arch.h>
#include <symtab.h>
#include <proc/thread.h>
#include <proc/task.h>
#include <synch/spinlock.h>
#include <arch/ddi/ddi.h>
 
/*
* Interrupt and exception dispatching.
78,8 → 81,29
panic("unserviced interrupt: %d\n", n);
}
 
/** General Protection Fault. */
void gp_fault(int n, istate_t *istate)
{
if (TASK) {
count_t ver;
spinlock_lock(&TASK->lock);
ver = TASK->arch.iomapver;
spinlock_unlock(&TASK->lock);
if (CPU->arch.iomapver_copy != ver) {
/*
* This fault can be caused by an early access
* to I/O port because of an out-dated
* I/O Permission bitmap installed on CPU.
* Install the fresh copy and restart
* the instruction.
*/
io_perm_bitmap_install();
return;
}
}
 
PRINT_INFO_ERRCODE(istate);
panic("general protection fault\n");
}