//SPARTAN/trunk/arch/mips/src/asm.S |
---|
117,6 → 117,13 |
cp0_prid_read: cp0_read $15 |
.global bios_write |
bios_write: |
lw $2, 0x80001020 |
lw $2, 0x6c($2) |
j $2 |
nop |
.global cpu_halt |
cpu_halt: |
j cpu_halt |
//SPARTAN/trunk/arch/mips/src/console.c |
---|
30,7 → 30,20 |
#include <arch/types.h> |
#include <arch/cp0.h> |
#include <arch/console.h> |
#include <arch.h> |
static void arc_putchar(const char ch) |
{ |
int cnt; |
pri_t pri; |
/* TODO: Should be spinlock? */ |
pri = cpu_priority_high(); |
bios_write(1, &ch, 1, &cnt); |
cpu_priority_restore(pri); |
} |
static void cons_putchar(const char ch) |
{ |
*((char *) VIDEORAM) = ch; |
//SPARTAN/trunk/arch/mips/src/cpu/cpu.c |
---|
77,7 → 77,8 |
{ "QED", "R4600" }, /* 0x20 */ |
{ "Sony", "R3000" }, /* 0x21 */ |
{ "Toshiba", "R3000" }, /* 0x22 */ |
{ "NKK", "R3000" } /* 0x23 */ |
{ "NKK", "R3000" }, /* 0x23 */ |
{ NULL, NULL } |
}; |
static struct data_t imp_data80[] = { |
84,7 → 85,8 |
{ "MIPS", "4Kc" }, /* 0x80 */ |
{"Invalid","Invalid"}, /* 0x81 */ |
{"Invalid","Invalid"}, /* 0x82 */ |
{"MIPS","4Km & 4Kp"} /* 0x83 */ |
{"MIPS","4Km & 4Kp"}, /* 0x83 */ |
{ NULL, NULL} |
}; |
void cpu_arch_init(void) |
100,11 → 102,26 |
void cpu_print_report(cpu_t *m) |
{ |
struct data_t *data; |
int i; |
if (m->arch.imp_num & 0x80) { |
/* Count records */ |
for (i=0;imp_data80[i].vendor;i++) |
; |
if (m->arch.imp_num & 0x7f >= i) { |
printf("imp=%d\n",m->arch.imp_num); |
return; |
} |
data = &imp_data80[m->arch.imp_num & 0x7f]; |
} else |
} else { |
for (i=0;imp_data[i].vendor;i++) |
; |
if (m->arch.imp_num >= i) { |
printf("imp=%d\n",m->arch.imp_num); |
return; |
} |
data = &imp_data[m->arch.imp_num]; |
} |
printf("cpu%d: %s %s (rev=%d.%d, imp=%d)\n", |
m->id, data->vendor, data->model, m->arch.rev_num >> 4, |
//SPARTAN/trunk/arch/mips/src/mips.c |
---|
35,6 → 35,7 |
#include <userspace.h> |
#include <arch/console.h> |
#include <memstr.h> |
#include <arch/interrupt.h> |
/* Size of the code jumping to the exception handler code |
* - J+NOP |
47,14 → 48,17 |
#include <arch/debug.h> |
#include <print.h> |
void arch_pre_mm_init(void) |
{ |
/* It is not assumed by default */ |
cpu_priority_high(); |
/* Copy the exception vectors to the right places */ |
memcpy(TLB_EXC, (char *)tlb_refill_entry, EXCEPTION_JUMP_SIZE); |
memcpy(NORM_EXC, (char *)exception_entry, EXCEPTION_JUMP_SIZE); |
memcpy(CACHE_EXC, (char *)cache_error_entry, EXCEPTION_JUMP_SIZE); |
/* |
* Switch to BEV normal level so that exception vectors point to the kernel. |
* Clear the error level. |
61,10 → 65,14 |
*/ |
cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit)); |
/* |
* Mask all interrupts |
*/ |
cp0_mask_all_int(); |
/* |
* Unmask hardware clock interrupt. |
*/ |
cp0_status_write(cp0_status_read() | (1<<cp0_status_im7_shift)); |
cp0_unmask_int(TIMER_INTERRUPT); |
/* |
* Start hardware clock. |
//SPARTAN/trunk/arch/mips/src/mm/frame.c |
---|
28,9 → 28,11 |
#include <arch/mm/frame.h> |
#include <mm/frame.h> |
#include <arch/asm/boot.h> |
#include <arch/mm/page.h> |
void frame_arch_init(void) |
{ |
/* Disable first megabyte (God knows why) */ |
frame_region_not_free(0, 1024*1024); |
/* Disable Everything until load address */ |
frame_region_not_free(0, KA2PA(KERNEL_LOAD_ADDRESS)); |
} |
//SPARTAN/trunk/arch/mips/src/interrupt.c |
---|
81,9 → 81,9 |
case 6: /* IRQ4 */ |
panic("unhandled interrupt %d\n", i); |
break; |
case 7: /* Timer Interrupt */ |
cp0_compare_write(cp0_count_read() + cp0_compare_value); /* clear timer interrupt */ |
/* start counting over again */ |
case TIMER_INTERRUPT: |
/* clear timer interrupt & set new */ |
cp0_compare_write(cp0_count_read() + cp0_compare_value); |
clock(); |
break; |
} |