//SPARTAN/trunk/arch/ia32/src/fpu_context.c |
---|
33,23 → 33,6 |
void fpu_context_save(fpu_context_t *fctx) |
{ |
} |
void fpu_context_restore(fpu_context_t *fctx) |
{ |
if (THREAD==CPU->fpu_owner) |
reset_TS_flag(); |
else { |
set_TS_flag(); |
if (CPU->fpu_owner != NULL) |
(CPU->fpu_owner)->fpu_context_engaged=1; |
} |
} |
void fpu_lazy_context_save(fpu_context_t *fctx) |
{ |
__asm__ volatile ( |
"fnsave %0" |
: "=m"(*fctx) |
56,7 → 39,8 |
); |
} |
void fpu_lazy_context_restore(fpu_context_t *fctx) |
void fpu_context_restore(fpu_context_t *fctx) |
{ |
__asm__ volatile ( |
"frstor %0" |
//SPARTAN/trunk/arch/ia32/src/cpu/cpu.c |
---|
62,10 → 62,9 |
"GenuineIntel" |
}; |
void set_TS_flag(void) |
void fpu_disable(void) |
{ |
asm |
( |
__asm__ volatile ( |
"mov %%cr0,%%eax;" |
"or $8,%%eax;" |
"mov %%eax,%%cr0;" |
75,10 → 74,9 |
); |
} |
void reset_TS_flag(void) |
void fpu_enable(void) |
{ |
asm |
( |
__asm__ volatile ( |
"mov %%cr0,%%eax;" |
"and $0xffFFffF7,%%eax;" |
"mov %%eax,%%cr0;" |
//SPARTAN/trunk/arch/ia32/src/interrupt.c |
---|
109,18 → 109,11 |
void nm_fault(__u8 n, __native stack[]) |
{ |
reset_TS_flag(); |
if (CPU->fpu_owner != NULL) { |
fpu_lazy_context_save(&((CPU->fpu_owner)->saved_fpu_context)); |
CPU->fpu_owner->fpu_context_engaged=0; /* don't prevent migration */ |
} |
if (THREAD->fpu_context_exists) |
fpu_lazy_context_restore(&(THREAD->saved_fpu_context)); |
else { |
fpu_init(); |
THREAD->fpu_context_exists=1; |
} |
CPU->fpu_owner=THREAD; |
#ifdef FPU_LAZY |
scheduler_fpu_lazy_request(); |
#else |
panic("fpu fault"); |
#endif |
} |