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| Rev | Author | Line No. | Line |
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| 33 | jermar | 1 | /* |
| 2 | * Copyright (C) 2005 Jakub Jermar |
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| 3 | * All rights reserved. |
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| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 34 | jermar | 29 | #include <arch/types.h> |
| 129 | jermar | 30 | #include <typedefs.h> |
| 33 | jermar | 31 | #include <arch/acpi/acpi.h> |
| 32 | #include <arch/acpi/madt.h> |
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| 34 | jermar | 33 | #include <arch/smp/apic.h> |
| 129 | jermar | 34 | #include <arch/smp/smp.h> |
| 127 | jermar | 35 | #include <panic.h> |
| 129 | jermar | 36 | #include <debug.h> |
| 37 | #include <config.h> |
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| 195 | vana | 38 | #include <print.h> |
| 33 | jermar | 39 | |
| 40 | struct acpi_madt *acpi_madt = NULL; |
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| 34 | jermar | 41 | |
| 42 | #ifdef __SMP__ |
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| 43 | |||
| 127 | jermar | 44 | /* |
| 45 | * NOTE: it is currently not completely clear to the authors of SPARTAN whether |
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| 46 | * MADT can exist in such a form that entries of the same type are not consecutive. |
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| 47 | * Because of this uncertainity, some entry types are explicitly checked for |
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| 48 | * being consecutive with other entries of the same kind. |
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| 49 | */ |
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| 50 | |||
| 51 | static void madt_l_apic_entry(struct madt_l_apic *la, __u8 prev_type); |
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| 52 | static void madt_io_apic_entry(struct madt_io_apic *ioa, __u8 prev_type); |
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| 53 | |||
| 54 | struct madt_l_apic *madt_l_apic_entries = NULL; |
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| 55 | struct madt_io_apic *madt_io_apic_entries = NULL; |
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| 56 | |||
| 57 | int madt_l_apic_entry_cnt = 0; |
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| 58 | int madt_io_apic_entry_cnt = 0; |
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| 59 | |||
| 34 | jermar | 60 | char *entry[] = { |
| 61 | "L_APIC", |
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| 62 | "IO_APIC", |
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| 63 | "INTR_SRC_OVRD", |
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| 64 | "NMI_SRC", |
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| 65 | "L_APIC_NMI", |
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| 66 | "L_APIC_ADDR_OVRD", |
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| 67 | "IO_SAPIC", |
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| 68 | "L_SAPIC", |
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| 69 | "PLATFORM_INTR_SRC" |
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| 70 | }; |
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| 71 | |||
| 129 | jermar | 72 | /* |
| 73 | * ACPI MADT Implementation of SMP configuration interface. |
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| 74 | */ |
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| 75 | static count_t madt_cpu_count(void); |
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| 76 | static bool madt_cpu_enabled(index_t i); |
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| 77 | static bool madt_cpu_bootstrap(index_t i); |
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| 78 | static __u8 madt_cpu_apic_id(index_t i); |
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| 79 | |||
| 80 | struct smp_config_operations madt_config_operations = { |
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| 81 | .cpu_count = madt_cpu_count, |
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| 82 | .cpu_enabled = madt_cpu_enabled, |
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| 83 | .cpu_bootstrap = madt_cpu_bootstrap, |
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| 84 | .cpu_apic_id = madt_cpu_apic_id |
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| 85 | }; |
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| 86 | |||
| 87 | static count_t madt_cpu_count(void) |
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| 88 | { |
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| 89 | return madt_l_apic_entry_cnt; |
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| 90 | } |
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| 91 | |||
| 92 | static bool madt_cpu_enabled(index_t i) |
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| 93 | { |
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| 94 | ASSERT(i < madt_l_apic_entry_cnt); |
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| 95 | return madt_l_apic_entries[i].flags & 0x1; |
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| 96 | } |
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| 97 | |||
| 98 | static bool madt_cpu_bootstrap(index_t i) |
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| 99 | { |
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| 100 | ASSERT(i < madt_l_apic_entry_cnt); |
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| 101 | return madt_l_apic_entries[i].apic_id == l_apic_id(); |
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| 102 | } |
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| 103 | |||
| 104 | static __u8 madt_cpu_apic_id(index_t i) |
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| 105 | { |
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| 106 | ASSERT(i < madt_l_apic_entry_cnt); |
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| 107 | return madt_l_apic_entries[i].apic_id; |
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| 108 | } |
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| 109 | |||
| 34 | jermar | 110 | void acpi_madt_parse(void) |
| 111 | { |
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| 112 | struct madt_apic_header *end = (struct madt_apic_header *) (((__u8 *) acpi_madt) + acpi_madt->header.length); |
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| 113 | struct madt_apic_header *h = &acpi_madt->apic_header[0]; |
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| 131 | jermar | 114 | __u8 prev_type = 0; /* used to detect inconsecutive entries */ |
| 34 | jermar | 115 | |
| 127 | jermar | 116 | |
| 34 | jermar | 117 | l_apic = (__u32 *) acpi_madt->l_apic_address; |
| 118 | |||
| 119 | while (h < end) { |
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| 120 | switch (h->type) { |
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| 121 | case MADT_L_APIC: |
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| 127 | jermar | 122 | madt_l_apic_entry((struct madt_l_apic *) h, prev_type); |
| 123 | break; |
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| 34 | jermar | 124 | case MADT_IO_APIC: |
| 127 | jermar | 125 | madt_io_apic_entry((struct madt_io_apic *) h, prev_type); |
| 126 | break; |
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| 34 | jermar | 127 | case MADT_INTR_SRC_OVRD: |
| 128 | case MADT_NMI_SRC: |
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| 129 | case MADT_L_APIC_NMI: |
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| 130 | case MADT_L_APIC_ADDR_OVRD: |
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| 131 | case MADT_IO_SAPIC: |
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| 132 | case MADT_L_SAPIC: |
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| 133 | case MADT_PLATFORM_INTR_SRC: |
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| 134 | printf("MADT: skipping %s entry (type=%d)\n", entry[h->type], h->type); |
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| 135 | break; |
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| 136 | |||
| 137 | default: |
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| 138 | if (h->type >= MADT_RESERVED_SKIP_BEGIN && h->type <= MADT_RESERVED_SKIP_END) { |
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| 139 | printf("MADT: skipping reserved entry (type=%d)\n", h->type); |
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| 140 | } |
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| 141 | if (h->type >= MADT_RESERVED_OEM_BEGIN) { |
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| 142 | printf("MADT: skipping OEM entry (type=%d)\n", h->type); |
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| 143 | } |
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| 144 | break; |
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| 145 | } |
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| 127 | jermar | 146 | prev_type = h->type; |
| 34 | jermar | 147 | h = (struct madt_apic_header *) (((__u8 *) h) + h->length); |
| 148 | } |
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| 149 | |||
| 129 | jermar | 150 | if (madt_l_apic_entry_cnt) |
| 151 | config.cpu_count = madt_l_apic_entry_cnt; |
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| 34 | jermar | 152 | } |
| 127 | jermar | 153 | |
| 154 | void madt_l_apic_entry(struct madt_l_apic *la, __u8 prev_type) |
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| 155 | { |
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| 156 | /* check for consecutiveness */ |
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| 157 | if (madt_l_apic_entry_cnt && prev_type != MADT_L_APIC) |
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| 158 | panic("%s entries are not consecuitve\n", entry[MADT_L_APIC]); |
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| 34 | jermar | 159 | |
| 127 | jermar | 160 | if (!madt_l_apic_entry_cnt++) |
| 161 | madt_l_apic_entries = la; |
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| 162 | |||
| 163 | if (!(la->flags & 0x1)) { |
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| 164 | /* Processor is unusable, skip it. */ |
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| 165 | return; |
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| 166 | } |
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| 167 | |||
| 168 | apic_id_mask |= 1<<la->apic_id; |
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| 169 | } |
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| 170 | |||
| 171 | void madt_io_apic_entry(struct madt_io_apic *ioa, __u8 prev_type) |
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| 172 | { |
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| 173 | /* check for consecutiveness */ |
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| 174 | if (madt_io_apic_entry_cnt && prev_type != MADT_IO_APIC) |
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| 175 | panic("%s entries are not consecuitve\n", entry[MADT_IO_APIC]); |
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| 176 | |||
| 177 | if (!madt_io_apic_entry_cnt++) { |
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| 178 | madt_io_apic_entries = ioa; |
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| 179 | io_apic = (__u32 *) ioa->io_apic_address; |
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| 180 | } |
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| 181 | else { |
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| 182 | /* currently not supported */ |
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| 183 | return; |
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| 184 | } |
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| 185 | } |
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| 186 | |||
| 187 | |||
| 34 | jermar | 188 | #endif /* __SMP__ */ |