Subversion Repositories HelenOS-historic

Rev

Rev 758 | Rev 883 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed

Rev Author Line No. Line
418 jermar 1
/*
2
 * Copyright (C) 2005 Jakub Jermar
3
 * All rights reserved.
4
 *
5
 * Redistribution and use in source and binary forms, with or without
6
 * modification, are permitted provided that the following conditions
7
 * are met:
8
 *
9
 * - Redistributions of source code must retain the above copyright
10
 *   notice, this list of conditions and the following disclaimer.
11
 * - Redistributions in binary form must reproduce the above copyright
12
 *   notice, this list of conditions and the following disclaimer in the
13
 *   documentation and/or other materials provided with the distribution.
14
 * - The name of the author may not be used to endorse or promote products
15
 *   derived from this software without specific prior written permission.
16
 *
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
 */
28
 
29
#ifndef __sparc64_BARRIER_H__
30
#define __sparc64_BARRIER_H__
31
 
32
/*
33
 * TODO: Implement true SPARC V9 memory barriers for macros below.
34
 */
35
#define CS_ENTER_BARRIER()  __asm__ volatile ("" ::: "memory")
36
#define CS_LEAVE_BARRIER()  __asm__ volatile ("" ::: "memory")
37
 
38
#define memory_barrier()
39
#define read_barrier()
40
#define write_barrier()
41
 
760 jermar 42
/** Flush Instruction Memory instruction. */
613 jermar 43
static inline void flush(void)
44
{
45
    /*
760 jermar 46
     * The FLUSH instruction takes address parameter.
47
     * As such, it may trap if the address is not found in DTLB.
48
     * However, JPS1 implementations are free to ignore the trap.
613 jermar 49
     */
760 jermar 50
        __asm__ volatile ("flush %sp\n");
613 jermar 51
}
569 jermar 52
 
760 jermar 53
/** Memory Barrier instruction. */
758 jermar 54
static inline void membar(void)
55
{
56
    __asm__ volatile ("membar #Sync\n");
57
}
58
 
418 jermar 59
#endif