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162 decky 1
#
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# Copyright (C) 2005 Martin Decky
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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# - Redistributions of source code must retain the above copyright
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#   notice, this list of conditions and the following disclaimer.
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# - Redistributions in binary form must reproduce the above copyright
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#   notice, this list of conditions and the following disclaimer in the
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#   documentation and/or other materials provided with the distribution.
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# - The name of the author may not be used to endorse or promote products
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#   derived from this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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845 decky 29
#include <arch/asm/regname.h>
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162 decky 31
.text
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1220 decky 33
.global userspace_asm
1004 decky 34
.global iret
1277 decky 35
.global iret_syscall
210 decky 36
.global memsetb
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.global memcpy
1288 jermar 38
.global memcpy_from_uspace
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.global memcpy_to_uspace
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.global memcpy_from_uspace_failover_address
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.global memcpy_to_uspace_failover_address
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1220 decky 43
userspace_asm:
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	# r3 = uspace_uarg
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	# r4 = stack
1267 decky 47
	# r5 = entry
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	# disable interrupts
1220 decky 50
 
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	mfmsr r31
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	rlwinm r31, r31, 0, 17, 15
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	mtmsr r31
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	# set entry point
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57
	mtsrr0 r5
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59
	# set problem state, enable interrupts
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1267 decky 61
	ori r31, r31, msr_pr
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	ori r31, r31, msr_ee
1220 decky 63
	mtsrr1 r31
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	# set stack
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67
	mr sp, r4
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	# jump to userspace
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71
	rfi
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1004 decky 73
iret:
1277 decky 74
 
75
	# disable interrupts
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	mfmsr r31
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	rlwinm r31, r31, 0, 17, 15
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	mtmsr r31
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1355 decky 81
	lwz r0, 8(sp)
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	lwz r2, 12(sp)
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	lwz r3, 16(sp)
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	lwz r4, 20(sp)
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	lwz r5, 24(sp)
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	lwz r6, 28(sp)
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	lwz r7, 32(sp)
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	lwz r8, 36(sp)
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	lwz r9, 40(sp)
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	lwz r10, 44(sp)
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	lwz r11, 48(sp)
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	lwz r13, 52(sp)
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	lwz r14, 56(sp)
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	lwz r15, 60(sp)
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	lwz r16, 64(sp)
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	lwz r17, 68(sp)
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	lwz r18, 72(sp)
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	lwz r19, 76(sp)
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	lwz r20, 80(sp)
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	lwz r21, 84(sp)
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	lwz r22, 88(sp)
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	lwz r23, 92(sp)
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	lwz r24, 96(sp)
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	lwz r25, 100(sp)
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	lwz r26, 104(sp)
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	lwz r27, 108(sp)
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	lwz r28, 112(sp)
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	lwz r29, 116(sp)
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	lwz r30, 120(sp)
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	lwz r31, 124(sp)
1004 decky 111
 
1355 decky 112
	lwz r12, 128(sp)
1277 decky 113
	mtcr r12
114
 
1355 decky 115
	lwz r12, 132(sp)
1267 decky 116
	mtsrr0 r12
1004 decky 117
 
1355 decky 118
	lwz r12, 136(sp)
1267 decky 119
	mtsrr1 r12
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1355 decky 121
	lwz r12, 140(sp)
1267 decky 122
	mtlr r12
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1355 decky 124
	lwz r12, 144(sp)
1277 decky 125
	mtctr r12
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1355 decky 127
	lwz r12, 148(sp)
1277 decky 128
	mtxer r12
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1355 decky 130
	lwz r12, 152(sp)
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	lwz sp, 156(sp)
1277 decky 132
 
133
	rfi
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135
iret_syscall:
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137
	# disable interrupts
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139
	mfmsr r31
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	rlwinm r31, r31, 0, 17, 15
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	mtmsr r31
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1355 decky 143
	lwz r0, 8(sp)
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	lwz r2, 12(sp)
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	lwz r4, 20(sp)
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	lwz r5, 24(sp)
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	lwz r6, 28(sp)
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	lwz r7, 32(sp)
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	lwz r8, 36(sp)
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	lwz r9, 40(sp)
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	lwz r10, 44(sp)
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	lwz r11, 48(sp)
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	lwz r13, 52(sp)
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	lwz r14, 56(sp)
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	lwz r15, 60(sp)
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	lwz r16, 64(sp)
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	lwz r17, 68(sp)
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	lwz r18, 72(sp)
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	lwz r19, 76(sp)
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	lwz r20, 80(sp)
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	lwz r21, 84(sp)
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	lwz r22, 88(sp)
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	lwz r23, 92(sp)
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	lwz r24, 96(sp)
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	lwz r25, 100(sp)
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	lwz r26, 104(sp)
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	lwz r27, 108(sp)
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	lwz r28, 112(sp)
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	lwz r29, 116(sp)
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	lwz r30, 120(sp)
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	lwz r31, 124(sp)
1277 decky 172
 
1355 decky 173
	lwz r12, 128(sp)
1267 decky 174
	mtcr r12
175
 
1355 decky 176
	lwz r12, 132(sp)
1277 decky 177
	mtsrr0 r12
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1355 decky 179
	lwz r12, 136(sp)
1277 decky 180
	mtsrr1 r12
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1355 decky 182
	lwz r12, 140(sp)
1277 decky 183
	mtlr r12
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1355 decky 185
	lwz r12, 144(sp)
1267 decky 186
	mtctr r12
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1355 decky 188
	lwz r12, 148(sp)
1267 decky 189
	mtxer r12
1277 decky 190
 
1355 decky 191
	lwz r12, 152(sp)
192
	lwz sp, 156(sp)
1267 decky 193
 
1004 decky 194
	rfi
195
 
210 decky 196
memsetb:
197
	rlwimi r5, r5, 8, 16, 23
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	rlwimi r5, r5, 16, 0, 15
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200
	addi r14, r3, -4
201
 
202
	cmplwi 0, r4, 4
203
	blt 7f
204
 
205
	stwu r5, 4(r14)
206
	beqlr
207
 
208
	andi. r15, r14, 3
209
	add r4, r15, r4
210
	subf r14, r15, r14
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	srwi r15, r4, 2
212
	mtctr r15
213
 
214
	bdz 6f
215
 
216
	1:
217
		stwu r5, 4(r14)
218
		bdnz 1b
219
 
220
	6:
221
 
222
	andi. r4, r4, 3
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224
	7:
225
 
226
	cmpwi 0, r4, 0
227
	beqlr
228
 
229
	mtctr r4
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	addi r6, r6, 3
231
 
232
	8:
233
 
234
	stbu r5, 1(r14)
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	bdnz 8b
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237
	blr
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239
memcpy:
1288 jermar 240
memcpy_from_uspace:
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memcpy_to_uspace:
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860 decky 243
	srwi. r7, r5, 3
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	addi r6, r3, -4
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	addi r4, r4, -4
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	beq	2f
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248
	andi. r0, r6, 3
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	mtctr r7
250
	bne 5f
251
 
252
	1:
253
 
254
	lwz r7, 4(r4)
255
	lwzu r8, 8(r4)
256
	stw r7, 4(r6)
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	stwu r8, 8(r6)
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	bdnz 1b
259
 
260
	andi. r5, r5, 7
261
 
262
	2:
263
 
264
	cmplwi 0, r5, 4
265
	blt 3f
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267
	lwzu r0, 4(r4)
268
	addi r5, r5, -4
269
	stwu r0, 4(r6)
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271
	3:
272
 
273
	cmpwi 0, r5, 0
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	beqlr
275
	mtctr r5
276
	addi r4, r4, 3
277
	addi r6, r6, 3
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279
	4:
280
 
281
	lbzu r0, 1(r4)
282
	stbu r0, 1(r6)
283
	bdnz 4b
210 decky 284
	blr
860 decky 285
 
286
	5:
287
 
288
	subfic r0, r0, 4
289
	mtctr r0
290
 
291
	6:
292
 
293
	lbz r7, 4(r4)
294
	addi r4, r4, 1
295
	stb r7, 4(r6)
296
	addi r6, r6, 1
297
	bdnz 6b
298
	subf r5, r0, r5
299
	rlwinm. r7, r5, 32-3, 3, 31
300
	beq 2b
301
	mtctr r7
302
	b 1b
1288 jermar 303
 
304
memcpy_from_uspace_failover_address:
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memcpy_to_uspace_failover_address:
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	b memcpy_from_uspace_failover_address