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308 jermar 1
#
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# Copyright (C) 2003-2004 Jakub Jermar
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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# - Redistributions of source code must retain the above copyright
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#   notice, this list of conditions and the following disclaimer.
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# - Redistributions in binary form must reproduce the above copyright
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#   notice, this list of conditions and the following disclaimer in the
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#   documentation and/or other materials provided with the distribution.
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# - The name of the author may not be used to endorse or promote products
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#   derived from this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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#include <arch/asm/regname.h>
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#include <arch/mm/page.h>
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#include <arch/asm/boot.h>
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#include <arch/context_offset.h>
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.text
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36
.set noat
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.set noreorder
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.set nomacro
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40
.global kernel_image_start
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.global tlb_refill_entry
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.global cache_error_entry
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.global exception_entry
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.global userspace_asm
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1096 palkovsky 46
# Which status bits should are thread-local
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#define REG_SAVE_MASK 0x1f # KSU(UM), EXL, ERL, IE
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# Save registers to space defined by \r
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# We will change status: Disable ERL,EXL,UM,IE
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# These changes will be automatically reversed in REGISTER_LOAD
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# SP is NOT saved as part of these registers
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.macro REGISTERS_STORE_AND_EXC_RESET r
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	sw $at,EOFFSET_AT(\r)
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	sw $v0,EOFFSET_V0(\r)
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	sw $v1,EOFFSET_V1(\r)
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	sw $a0,EOFFSET_A0(\r)
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	sw $a1,EOFFSET_A1(\r)
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	sw $a2,EOFFSET_A2(\r)
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	sw $a3,EOFFSET_A3(\r)
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	sw $t0,EOFFSET_T0(\r)
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	sw $t1,EOFFSET_T1(\r)
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	sw $t2,EOFFSET_T2(\r)
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	sw $t3,EOFFSET_T3(\r)
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	sw $t4,EOFFSET_T4(\r)
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	sw $t5,EOFFSET_T5(\r)
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	sw $t6,EOFFSET_T6(\r)
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	sw $t7,EOFFSET_T7(\r)
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	sw $t8,EOFFSET_T8(\r)
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	sw $t9,EOFFSET_T9(\r)
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	mflo $at
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	sw $at, EOFFSET_LO(\r)
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	mfhi $at
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	sw $at, EOFFSET_HI(\r)
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#ifdef CONFIG_DEBUG_ALLREGS	
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	sw $s0,EOFFSET_S0(\r)
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	sw $s1,EOFFSET_S1(\r)
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	sw $s2,EOFFSET_S2(\r)
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	sw $s3,EOFFSET_S3(\r)
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	sw $s4,EOFFSET_S4(\r)
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	sw $s5,EOFFSET_S5(\r)
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	sw $s6,EOFFSET_S6(\r)
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	sw $s7,EOFFSET_S7(\r)
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	sw $s8,EOFFSET_S8(\r)
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#endif
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	sw $gp,EOFFSET_GP(\r)
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	sw $ra,EOFFSET_RA(\r)
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	sw $k1,EOFFSET_K1(\r)
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	mfc0 $t0, $status
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	mfc0 $t1, $epc
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96
	and $t2, $t0, REG_SAVE_MASK  # Save only KSU,EXL,ERL,IE
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	li $t3, ~(0x1f)
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	and $t0, $t0, $t3           # Clear KSU,EXL,ERL,IE
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	sw $t2,EOFFSET_STATUS(\r)
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	sw $t1,EOFFSET_EPC(\r)
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	mtc0 $t0, $status
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.endm
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.macro REGISTERS_LOAD r
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	# Update only UM,EXR,IE from status, the rest
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	# is controlled by OS and not bound to task
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	mfc0 $t0, $status
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	lw $t1,EOFFSET_STATUS(\r)
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	li $t2, ~REG_SAVE_MASK    # Mask UM,EXL,ERL,IE
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	and $t0, $t0, $t2
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	or $t0, $t0, $t1   # Copy UM,EXL,ERL,IE from saved status
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	mtc0 $t0, $status
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	lw $v0,EOFFSET_V0(\r)
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	lw $v1,EOFFSET_V1(\r)
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	lw $a0,EOFFSET_A0(\r)
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	lw $a1,EOFFSET_A1(\r)
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	lw $a2,EOFFSET_A2(\r)
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	lw $a3,EOFFSET_A3(\r)
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	lw $t0,EOFFSET_T0(\r)
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	lw $t1,EOFFSET_T1(\r)
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	lw $t2,EOFFSET_T2(\r)
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	lw $t3,EOFFSET_T3(\r)
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	lw $t4,EOFFSET_T4(\r)
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	lw $t5,EOFFSET_T5(\r)
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	lw $t6,EOFFSET_T6(\r)
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	lw $t7,EOFFSET_T7(\r)
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	lw $t8,EOFFSET_T8(\r)
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	lw $t9,EOFFSET_T9(\r)
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#ifdef CONFIG_DEBUG_ALLREGS	
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	lw $s0,EOFFSET_S0(\r)
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	lw $s1,EOFFSET_S1(\r)
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	lw $s2,EOFFSET_S2(\r)
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	lw $s3,EOFFSET_S3(\r)
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	lw $s4,EOFFSET_S4(\r)
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	lw $s5,EOFFSET_S5(\r)
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	lw $s6,EOFFSET_S6(\r)
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	lw $s7,EOFFSET_S7(\r)
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	lw $s8,EOFFSET_S8(\r)
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#endif
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	lw $gp,EOFFSET_GP(\r)
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	lw $ra,EOFFSET_RA(\r)
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	lw $k1,EOFFSET_K1(\r)
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	lw $at,EOFFSET_LO(\r)
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	mtlo $at
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	lw $at,EOFFSET_HI(\r)
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	mthi $at
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	lw $at,EOFFSET_EPC(\r)
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	mtc0 $at, $epc
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	lw $at,EOFFSET_AT(\r)
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	lw $sp,EOFFSET_SP(\r)
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.endm
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# Move kernel stack pointer address to register K0
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# - if we are in user mode, load the appropriate stack
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# address
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.macro KERNEL_STACK_TO_K0
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	# If we are in user mode
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	mfc0 $k0, $status
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	andi $k0, 0x10
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	beq $k0, $0, 1f
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	add $k0, $sp, 0
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172
	# Move $k0 pointer to kernel stack
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	lui $k0, %hi(supervisor_sp)
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	ori $k0, $k0, %lo(supervisor_sp)
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	# Move $k0 (superveisor_sp)
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	lw $k0, 0($k0)
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1:		
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.endm
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.org 0x0
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kernel_image_start:
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	/* Load temporary stack */
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	lui $sp, %hi(end_stack)
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	ori $sp, $sp, %lo(end_stack)
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	/* Not sure about this, but might be needed for PIC code???? */
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	lui $gp, 0x8000
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1222 decky 189
	jal arch_pre_main
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	nop
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192
	j main_bsp
193
	nop
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	.space TEMP_STACK_SIZE
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end_stack:
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tlb_refill_entry:
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	j tlb_refill_handler
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	nop
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cache_error_entry:
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	j cache_error_handler
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	nop
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exception_entry:
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	j exception_handler
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	nop	
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exception_handler:
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	KERNEL_STACK_TO_K0
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	sub $k0, REGISTER_SPACE
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	sw $sp,EOFFSET_SP($k0)
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	move $sp, $k0
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	mfc0 $k0, $cause
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	sra $k0, $k0, 0x2     # cp0_exc_cause() part 1
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	andi $k0, $k0, 0x1f   # cp0_exc_cause() part 2
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	sub $k0, 8            # 8=SYSCALL
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1102 palkovsky 224
	beqz $k0, syscall_shortcut
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	add $k0, 8            # Revert $k1 back to correct exc number
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	REGISTERS_STORE_AND_EXC_RESET $sp
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	move $a1, $sp
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	jal exc_dispatch      # exc_dispatch(excno, register_space)
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	move $a0, $k0
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	REGISTERS_LOAD $sp
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	# The $sp is automatically restored to former value
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	eret
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# it seems that mips reserves some space on stack for varfuncs???
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#define SS_ARG4   16
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#define SS_SP     EOFFSET_SP
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#define SS_STATUS EOFFSET_STATUS
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#define SS_EPC    EOFFSET_EPC
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syscall_shortcut:
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	# We have a lot of space on the stack, with free use
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	mfc0 $t1, $epc
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	mfc0 $t0, $status
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	sw $t1,SS_EPC($sp)  # Save EPC
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1096 palkovsky 248
	and $t2, $t0, REG_SAVE_MASK # Save only KSU,EXL,ERL,IE
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	li $t3, ~(0x1f)
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	and $t0, $t0, $t3           # Clear KSU,EXL,ERL
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	ori $t0, $t0, 0x1           # Set IE
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253
	sw $t2,SS_STATUS($sp)
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	mtc0 $t0, $status
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	# CALL Syscall handler
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	jal syscall_handler
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	sw $v0, SS_ARG4($sp)        # save v0 - arg4 to stack
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260
	# restore status
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	mfc0 $t0, $status
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	lw $t1,SS_STATUS($sp)
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	# Change back to EXL=1(from last exception), otherwise
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	# an interrupt could rewrite the CP0-EPC
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	li $t2, ~REG_SAVE_MASK      # Mask UM,EXL,ERL,IE
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	and $t0, $t0, $t2
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	or $t0, $t0, $t1            # Copy UM,EXL,ERL,IE from saved status
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	mtc0 $t0, $status
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	# restore epc+4
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	lw $t0,SS_EPC($sp)
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	addi $t0, $t0, 4
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	mtc0 $t0, $epc
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1096 palkovsky 276
	lw $sp,SS_SP($sp) # restore sp
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278
	eret
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1 jermar 280
tlb_refill_handler:
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	KERNEL_STACK_TO_K0
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	sub $k0, REGISTER_SPACE
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	REGISTERS_STORE_AND_EXC_RESET $k0
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	sw $sp,EOFFSET_SP($k0)
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	add $sp, $k0, 0
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317 palkovsky 287
	add $a0, $sp, 0 
288
	jal tlb_refill /* tlb_refill(register_space) */
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	nop
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306 palkovsky 291
	REGISTERS_LOAD $sp
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50 jermar 293
	eret
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295
cache_error_handler:
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	KERNEL_STACK_TO_K0
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	sub $k0, REGISTER_SPACE
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	REGISTERS_STORE_AND_EXC_RESET $k0
299
	sw $sp,EOFFSET_SP($k0)
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	add $sp, $k0, 0
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50 jermar 302
	jal cache_error
303
	nop
125 jermar 304
 
306 palkovsky 305
	REGISTERS_LOAD $sp
1 jermar 306
 
50 jermar 307
	eret
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309
userspace_asm:
310
	add $sp, $a0, 0
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	add $v0, $a1, 0 
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	add $t9, $a2, 0   # Set up correct entry into PIC code 
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	eret