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/*
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 * Copyright (C) 2003-2004 Jakub Jermar
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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#include <arch.h>
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#include <arch/cp0.h>
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#include <arch/exception.h>
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#include <arch/asm.h>
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#include <mm/as.h>
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#include <userspace.h>
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#include <arch/console.h>
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#include <memstr.h>
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#include <proc/thread.h>
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#include <proc/uarg.h>
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#include <print.h>
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#include <syscall/syscall.h>
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#include <arch/interrupt.h>
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#include <arch/drivers/arc.h>
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#include <console/chardev.h>
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#include <arch/debugger.h>
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#include <arch/asm/regname.h>
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/* Size of the code jumping to the exception handler code
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 * - J+NOP
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 */
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#define EXCEPTION_JUMP_SIZE    8
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#define TLB_EXC ((char *) 0x80000000)
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#define NORM_EXC ((char *) 0x80000180)
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#define CACHE_EXC ((char *) 0x80000100)
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void arch_pre_mm_init(void)
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{
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    /* It is not assumed by default */
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    interrupts_disable();
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    /* Initialize dispatch table */
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    exception_init();
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    interrupt_init();
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    arc_init();
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    /* Copy the exception vectors to the right places */
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    memcpy(TLB_EXC, (char *)tlb_refill_entry, EXCEPTION_JUMP_SIZE);
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    memcpy(NORM_EXC, (char *)exception_entry, EXCEPTION_JUMP_SIZE);
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    memcpy(CACHE_EXC, (char *)cache_error_entry, EXCEPTION_JUMP_SIZE);
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    /*
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     * Switch to BEV normal level so that exception vectors point to the kernel.
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     * Clear the error level.
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     */
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    cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit));
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    /*
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     * Mask all interrupts
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     */
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    cp0_mask_all_int();
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    /*
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     * Unmask hardware clock interrupt.
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     */
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    cp0_unmask_int(TIMER_IRQ);
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    /*
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     * Start hardware clock.
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     */
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    cp0_compare_write(cp0_compare_value + cp0_count_read());
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    console_init();
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    debugger_init();
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    /* Setup usermode */
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    init.cnt = 1;
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    init.tasks[0].addr = INIT_ADDRESS;
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    init.tasks[0].size = INIT_SIZE;
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}
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void arch_post_mm_init(void)
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{
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}
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void arch_pre_smp_init(void)
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{
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}
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void arch_post_smp_init(void)
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{
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}
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/* Stack pointer saved when entering user mode */
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/* TODO: How do we do it on SMP system???? */
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/* Why the linker moves the variable 64K away in assembler
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 * when not in .text section ????????
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 */
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__address supervisor_sp __attribute__ ((section (".text")));
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void userspace(uspace_arg_t *kernel_uarg)
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{
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    /* EXL=1, UM=1, IE=1 */
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    cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit |
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                          cp0_status_um_bit |
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                          cp0_status_ie_enabled_bit));
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    cp0_epc_write((__address) kernel_uarg->uspace_entry);
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    userspace_asm(((__address) kernel_uarg->uspace_stack+PAGE_SIZE), (__address) kernel_uarg->uspace_uarg);
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    while (1)
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        ;
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}
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void before_thread_runs_arch(void)
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{
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    supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
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}
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void after_thread_ran_arch(void)
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{
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}
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/** Set Thread-local-storeage pointer
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 *
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 * We have it currently in K1, it is
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 * possible to have it separately in the future.
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 */
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__native sys_tls_set(__native addr)
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{
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    return 0;
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}