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| Rev | Author | Line No. | Line |
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| 1 | jermar | 1 | /* |
| 319 | jermar | 2 | * Copyright (C) 2003-2004 Jakub Jermar |
| 1 | jermar | 3 | * All rights reserved. |
| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 341 | jermar | 29 | #ifndef __mips32_TLB_H__ |
| 30 | #define __mips32_TLB_H__ |
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| 1 | jermar | 31 | |
| 317 | palkovsky | 32 | #include <arch/exception.h> |
| 33 | |||
| 389 | jermar | 34 | #define TLB_SIZE 48 |
| 35 | |||
| 36 | #define TLB_WIRED 1 |
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| 37 | #define TLB_KSTACK_WIRED_INDEX 0 |
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| 38 | |||
| 39 | #define TLB_PAGE_MASK_16K (0x3<<13) |
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| 40 | |||
| 121 | jermar | 41 | #define PAGE_UNCACHED 2 |
| 42 | #define PAGE_CACHEABLE_EXC_WRITE 5 |
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| 43 | |||
| 1 | jermar | 44 | struct entry_lo { |
| 121 | jermar | 45 | unsigned g : 1; /* global bit */ |
| 46 | unsigned v : 1; /* valid bit */ |
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| 47 | unsigned d : 1; /* dirty/write-protect bit */ |
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| 48 | unsigned c : 3; /* cache coherency attribute */ |
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| 49 | unsigned pfn : 24; /* frame number */ |
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| 394 | jermar | 50 | unsigned zero: 2; /* zero */ |
| 1 | jermar | 51 | } __attribute__ ((packed)); |
| 52 | |||
| 394 | jermar | 53 | struct pte { |
| 54 | unsigned g : 1; /* global bit */ |
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| 55 | unsigned v : 1; /* valid bit */ |
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| 56 | unsigned d : 1; /* dirty/write-protect bit */ |
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| 57 | unsigned c : 3; /* cache coherency attribute */ |
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| 58 | unsigned pfn : 24; /* frame number */ |
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| 59 | unsigned w : 1; /* writable */ |
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| 60 | unsigned a : 1; /* accessed */ |
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| 61 | } __attribute__ ((packed)); |
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| 62 | |||
| 1 | jermar | 63 | struct entry_hi { |
| 64 | unsigned asid : 8; |
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| 391 | jermar | 65 | unsigned : 5; |
| 1 | jermar | 66 | unsigned vpn2 : 19; |
| 67 | } __attribute__ ((packed)); |
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| 68 | |||
| 69 | struct page_mask { |
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| 70 | unsigned : 13; |
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| 71 | unsigned mask : 12; |
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| 72 | unsigned : 7; |
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| 73 | } __attribute__ ((packed)); |
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| 74 | |||
| 394 | jermar | 75 | struct index { |
| 76 | unsigned index : 4; |
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| 77 | unsigned : 27; |
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| 78 | unsigned p : 1; |
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| 1 | jermar | 79 | } __attribute__ ((packed)); |
| 80 | |||
| 394 | jermar | 81 | /** Probe TLB for Matching Entry |
| 82 | * |
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| 83 | * Probe TLB for Matching Entry. |
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| 84 | */ |
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| 85 | static inline void tlbp(void) |
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| 86 | { |
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| 87 | __asm__ volatile ("tlbp\n\t"); |
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| 88 | } |
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| 121 | jermar | 89 | |
| 394 | jermar | 90 | |
| 389 | jermar | 91 | /** Read Indexed TLB Entry |
| 92 | * |
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| 93 | * Read Indexed TLB Entry. |
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| 94 | */ |
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| 95 | static inline void tlbr(void) |
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| 96 | { |
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| 97 | __asm__ volatile ("tlbr\n\t"); |
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| 98 | } |
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| 99 | |||
| 100 | /** Write Indexed TLB Entry |
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| 101 | * |
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| 102 | * Write Indexed TLB Entry. |
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| 103 | */ |
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| 104 | static inline void tlbwi(void) |
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| 105 | { |
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| 106 | __asm__ volatile ("tlbwi\n\t"); |
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| 107 | } |
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| 108 | |||
| 109 | /** Write Random TLB Entry |
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| 110 | * |
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| 111 | * Write Random TLB Entry. |
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| 112 | */ |
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| 113 | static inline void tlbwr(void) |
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| 114 | { |
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| 115 | __asm__ volatile ("tlbwr\n\t"); |
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| 116 | } |
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| 117 | |||
| 317 | palkovsky | 118 | extern void tlb_invalid(struct exception_regdump *pstate); |
| 119 | extern void tlb_refill(struct exception_regdump *pstate); |
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| 389 | jermar | 120 | extern void tlb_modified(struct exception_regdump *pstate); |
| 1 | jermar | 121 | |
| 122 | #endif |