Rev 747 | Rev 749 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed
| Rev | Author | Line No. | Line |
|---|---|---|---|
| 684 | jermar | 1 | /* |
| 2 | * Copyright (C) 2006 Jakub Jermar |
||
| 747 | jermar | 3 | * Copyright (C) 2006 Jakub Vana |
| 684 | jermar | 4 | * All rights reserved. |
| 5 | * |
||
| 6 | * Redistribution and use in source and binary forms, with or without |
||
| 7 | * modification, are permitted provided that the following conditions |
||
| 8 | * are met: |
||
| 9 | * |
||
| 10 | * - Redistributions of source code must retain the above copyright |
||
| 11 | * notice, this list of conditions and the following disclaimer. |
||
| 12 | * - Redistributions in binary form must reproduce the above copyright |
||
| 13 | * notice, this list of conditions and the following disclaimer in the |
||
| 14 | * documentation and/or other materials provided with the distribution. |
||
| 15 | * - The name of the author may not be used to endorse or promote products |
||
| 16 | * derived from this software without specific prior written permission. |
||
| 17 | * |
||
| 18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
||
| 19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
||
| 20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
||
| 21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
||
| 22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
||
| 23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
||
| 24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
||
| 25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
||
| 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
||
| 27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||
| 28 | */ |
||
| 29 | |||
| 30 | #include <arch/mm/page.h> |
||
| 747 | jermar | 31 | #include <genarch/mm/page_ht.h> |
| 32 | #include <mm/asid.h> |
||
| 716 | vana | 33 | #include <arch/types.h> |
| 728 | vana | 34 | #include <print.h> |
| 684 | jermar | 35 | #include <mm/page.h> |
| 747 | jermar | 36 | #include <mm/frame.h> |
| 684 | jermar | 37 | #include <config.h> |
| 38 | #include <panic.h> |
||
| 746 | jermar | 39 | #include <arch/asm.h> |
| 747 | jermar | 40 | #include <arch/barrier.h> |
| 748 | jermar | 41 | #include <memstr.h> |
| 684 | jermar | 42 | |
| 747 | jermar | 43 | /** Initialize VHPT and region registers. */ |
| 44 | static void set_vhpt_environment(void) |
||
| 716 | vana | 45 | { |
| 747 | jermar | 46 | region_register rr; |
| 47 | pta_register pta; |
||
| 48 | int i; |
||
| 716 | vana | 49 | |
| 747 | jermar | 50 | /* |
| 51 | * First set up kernel region register. |
||
| 52 | */ |
||
| 53 | rr.word = rr_read(VRN_KERNEL); |
||
| 54 | rr.map.ve = 0; /* disable VHPT walker */ |
||
| 55 | rr.map.ps = PAGE_WIDTH; |
||
| 56 | rr.map.rid = ASID_KERNEL; |
||
| 57 | rr_write(VRN_KERNEL, rr.word); |
||
| 58 | srlz_i(); |
||
| 59 | srlz_d(); |
||
| 716 | vana | 60 | |
| 747 | jermar | 61 | /* |
| 62 | * And invalidate the rest of region register. |
||
| 63 | */ |
||
| 64 | for(i = 0; i < REGION_REGISTERS; i++) { |
||
| 65 | /* skip kernel rr */ |
||
| 66 | if (i == VRN_KERNEL) |
||
| 67 | continue; |
||
| 728 | vana | 68 | |
| 747 | jermar | 69 | rr.word == rr_read(i); |
| 748 | jermar | 70 | rr.map.ve = 0; /* disable VHPT walker */ |
| 747 | jermar | 71 | rr.map.rid = ASID_INVALID; |
| 72 | rr_write(i, rr.word); |
||
| 73 | srlz_i(); |
||
| 74 | srlz_d(); |
||
| 75 | } |
||
| 726 | jermar | 76 | |
| 715 | vana | 77 | /* |
| 747 | jermar | 78 | * Allocate VHPT and invalidate all its entries. |
| 79 | */ |
||
| 80 | page_ht = (pte_t *) frame_alloc(FRAME_KA, VHPT_WIDTH - FRAME_WIDTH, NULL); |
||
| 748 | jermar | 81 | memsetb((__address) page_ht, VHPT_SIZE, 0); |
| 82 | ht_invalidate_all(); |
||
| 715 | vana | 83 | |
| 747 | jermar | 84 | /* |
| 85 | * Set up PTA register. |
||
| 86 | */ |
||
| 87 | pta.word = pta_read(); |
||
| 88 | pta.map.ve = 0; /* disable VHPT walker */ |
||
| 89 | pta.map.vf = 1; /* large entry format */ |
||
| 90 | pta.map.size = VHPT_WIDTH; |
||
| 91 | pta.map.base = (__address) page_ht; |
||
| 92 | pta_write(pta.word); |
||
| 93 | srlz_i(); |
||
| 94 | srlz_d(); |
||
| 95 | } |
||
| 728 | vana | 96 | |
| 747 | jermar | 97 | /** Initialize ia64 virtual address translation subsystem. */ |
| 684 | jermar | 98 | void page_arch_init(void) |
| 99 | { |
||
| 100 | page_operations = &page_ht_operations; |
||
| 746 | jermar | 101 | pk_disable(); |
| 747 | jermar | 102 | set_vhpt_environment(); |
| 684 | jermar | 103 | } |
| 748 | jermar | 104 | |
| 105 | /** Calculate address of collision chain from VPN and ASID. |
||
| 106 | * |
||
| 107 | * This is rather non-trivial function. |
||
| 108 | * First, it has to translate ASID to RID. |
||
| 109 | * This is achieved by taking VRN bits of |
||
| 110 | * page into account. |
||
| 111 | * Second, it must preserve the region register |
||
| 112 | * it writes the RID to. |
||
| 113 | * |
||
| 114 | * @param page Address of virtual page including VRN bits. |
||
| 115 | * @param asid Address space identifier. |
||
| 116 | * |
||
| 117 | * @return Head of VHPT collision chain for page and asid. |
||
| 118 | */ |
||
| 119 | pte_t *vhpt_hash(__address page, asid_t asid) |
||
| 120 | { |
||
| 121 | region_register rr_save, rr; |
||
| 122 | pte_t *t; |
||
| 123 | |||
| 124 | rr_save.word = rr_read(VRN_WORK); |
||
| 125 | rr.word = rr_save.word; |
||
| 126 | if ((page >> VRN_SHIFT) != VRN_KERNEL) |
||
| 127 | rr.map.rid = (asid * RIDS_PER_ASID) + (page >> VRN_SHIFT); |
||
| 128 | else |
||
| 129 | rr.map.rid = ASID_KERNEL; |
||
| 130 | rr_write(VRN_WORK, rr.word); |
||
| 131 | srlz_i(); |
||
| 132 | t = (pte_t *) thash((VRN_WORK << VRN_SHIFT) | (~(VRN_MASK) & page)); |
||
| 133 | rr_write(VRN_WORK, rr_save.word); |
||
| 134 | srlz_i(); |
||
| 135 | srlz_d(); |
||
| 136 | |||
| 137 | return t; |
||
| 138 | } |