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35 jermar 1
/*
747 jermar 2
 * Copyright (C) 2005 - 2006 Jakub Jermar
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 * Copyright (C) 2006 Jakub Vana
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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/** @addtogroup ia64mm 
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 * @{
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 */
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/** @file
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 */
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#ifndef __ia64_PAGE_H__
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#define __ia64_PAGE_H__
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#include <arch/mm/frame.h>
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#define PAGE_SIZE   FRAME_SIZE
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#define PAGE_WIDTH  FRAME_WIDTH
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#ifdef KERNEL
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/** Bit width of the TLB-locked portion of kernel address space. */
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#define KERNEL_PAGE_WIDTH   28  /* 256M */
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#define PPN_SHIFT           12
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#define VRN_SHIFT           61
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#define VRN_MASK            (7LL << VRN_SHIFT)
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#define VA2VRN(va)          ((va)>>VRN_SHIFT)
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#ifdef __ASM__
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#define VRN_KERNEL          7
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#else
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#define VRN_KERNEL          7LL
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#endif
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#define REGION_REGISTERS        8
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#define KA2PA(x)    ((uintptr_t) (x-(VRN_KERNEL<<VRN_SHIFT)))
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#define PA2KA(x)    ((uintptr_t) (x+(VRN_KERNEL<<VRN_SHIFT)))
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#define VHPT_WIDTH          20          /* 1M */
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#define VHPT_SIZE           (1 << VHPT_WIDTH)
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#define PTA_BASE_SHIFT          15
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749 jermar 72
/** Memory Attributes. */
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#define MA_WRITEBACK    0x0
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#define MA_UNCACHEABLE  0x4
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/** Privilege Levels. Only the most and the least privileged ones are ever used. */
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#define PL_KERNEL   0x0
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#define PL_USER     0x3
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/* Access Rigths. Only certain combinations are used by the kernel. */
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#define AR_READ     0x0
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#define AR_EXECUTE  0x1
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#define AR_WRITE    0x2
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901 jermar 85
#ifndef __ASM__
818 vana 86
 
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#include <arch/mm/frame.h>
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#include <arch/barrier.h>
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#include <genarch/mm/page_ht.h>
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#include <arch/mm/asid.h>
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#include <arch/types.h>
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#include <typedefs.h>
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#include <debug.h>
818 vana 94
 
747 jermar 95
struct vhpt_tag_info {
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    unsigned long long tag : 63;
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    unsigned ti : 1;
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} __attribute__ ((packed));
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union vhpt_tag {
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    struct vhpt_tag_info tag_info;
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    unsigned tag_word;
710 vana 103
};
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747 jermar 105
struct vhpt_entry_present {
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    /* Word 0 */
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    unsigned p : 1;
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    unsigned : 1;
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    unsigned ma : 3;
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    unsigned a : 1;
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    unsigned d : 1;
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    unsigned pl : 2;
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    unsigned ar : 3;
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    unsigned long long ppn : 38;
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    unsigned : 2;
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    unsigned ed : 1;
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    unsigned ig1 : 11;
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    /* Word 1 */
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    unsigned : 2;
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    unsigned ps : 6;
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    unsigned key : 24;
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    unsigned : 32;
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    /* Word 2 */
747 jermar 126
    union vhpt_tag tag;
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    /* Word 3 */                                                   
1780 jermar 129
    uint64_t ig3 : 64;
747 jermar 130
} __attribute__ ((packed));
710 vana 131
 
747 jermar 132
struct vhpt_entry_not_present {
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    /* Word 0 */
747 jermar 134
    unsigned p : 1;
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    unsigned long long ig0 : 52;
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    unsigned ig1 : 11;
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    /* Word 1 */
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    unsigned : 2;
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    unsigned ps : 6;
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    unsigned long long ig2 : 56;
710 vana 142
 
747 jermar 143
    /* Word 2 */
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    union vhpt_tag tag;
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    /* Word 3 */                                                   
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    uint64_t ig3 : 64;
747 jermar 148
} __attribute__ ((packed));
710 vana 149
 
747 jermar 150
typedef union vhpt_entry {
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    struct vhpt_entry_present present;
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    struct vhpt_entry_not_present not_present;
1780 jermar 153
    uint64_t word[4];
792 jermar 154
} vhpt_entry_t;
710 vana 155
 
747 jermar 156
struct region_register_map {
157
    unsigned ve : 1;
158
    unsigned : 1;
159
    unsigned ps : 6;
160
    unsigned rid : 24;
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    unsigned : 32;
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} __attribute__ ((packed));
684 jermar 163
 
747 jermar 164
typedef union region_register {
165
    struct region_register_map map;
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    unsigned long long word;
167
} region_register;
715 vana 168
 
747 jermar 169
struct pta_register_map {
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    unsigned ve : 1;
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    unsigned : 1;
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    unsigned size : 6;
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    unsigned vf : 1;
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    unsigned : 6;
175
    unsigned long long base : 49;
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} __attribute__ ((packed));
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178
typedef union pta_register {
179
    struct pta_register_map map;
1780 jermar 180
    uint64_t word;
747 jermar 181
} pta_register;
182
 
183
/** Return Translation Hashed Entry Address.
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 *
185
 * VRN bits are used to read RID (ASID) from one
186
 * of the eight region registers registers.
187
 *
188
 * @param va Virtual address including VRN bits.
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 *
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 * @return Address of the head of VHPT collision chain.
191
 */
1780 jermar 192
static inline uint64_t thash(uint64_t va)
715 vana 193
{
1780 jermar 194
    uint64_t ret;
715 vana 195
 
747 jermar 196
    __asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va));
715 vana 197
 
747 jermar 198
    return ret;
199
}
200
 
201
/** Return Translation Hashed Entry Tag.
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 *
203
 * VRN bits are used to read RID (ASID) from one
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 * of the eight region registers.
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 *
206
 * @param va Virtual address including VRN bits.
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 *
208
 * @return The unique tag for VPN and RID in the collision chain returned by thash().
209
 */
1780 jermar 210
static inline uint64_t ttag(uint64_t va)
715 vana 211
{
1780 jermar 212
    uint64_t ret;
715 vana 213
 
747 jermar 214
    __asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va));
215
 
216
    return ret;
217
}
218
 
219
/** Read Region Register.
220
 *
221
 * @param i Region register index.
222
 *
223
 * @return Current contents of rr[i].
224
 */
1780 jermar 225
static inline uint64_t rr_read(index_t i)
715 vana 226
{
1780 jermar 227
    uint64_t ret;
748 jermar 228
    ASSERT(i < REGION_REGISTERS);
901 jermar 229
    __asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i << VRN_SHIFT));
747 jermar 230
    return ret;
231
}
715 vana 232
 
747 jermar 233
/** Write Region Register.
234
 *
235
 * @param i Region register index.
236
 * @param v Value to be written to rr[i].
237
 */
1780 jermar 238
static inline void rr_write(index_t i, uint64_t v)
715 vana 239
{
748 jermar 240
    ASSERT(i < REGION_REGISTERS);
818 vana 241
    __asm__ volatile (
901 jermar 242
        "mov rr[%0] = %1\n"
243
        :
244
        : "r" (i << VRN_SHIFT), "r" (v)
245
    );
747 jermar 246
}
247
 
248
/** Read Page Table Register.
249
 *
250
 * @return Current value stored in PTA.
251
 */
1780 jermar 252
static inline uint64_t pta_read(void)
747 jermar 253
{
1780 jermar 254
    uint64_t ret;
747 jermar 255
 
256
    __asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret));
257
 
258
    return ret;
259
}
715 vana 260
 
747 jermar 261
/** Write Page Table Register.
262
 *
263
 * @param v New value to be stored in PTA.
264
 */
1780 jermar 265
static inline void pta_write(uint64_t v)
747 jermar 266
{
267
    __asm__ volatile ("mov cr.pta = %0\n" : : "r" (v));
268
}
715 vana 269
 
747 jermar 270
extern void page_arch_init(void);
271
 
1780 jermar 272
extern vhpt_entry_t *vhpt_hash(uintptr_t page, asid_t asid);
273
extern bool vhpt_compare(uintptr_t page, asid_t asid, vhpt_entry_t *v);
274
extern void vhpt_set_record(vhpt_entry_t *v, uintptr_t page, asid_t asid, uintptr_t frame, int flags);
792 jermar 275
 
967 palkovsky 276
#endif /* __ASM__ */
869 vana 277
 
967 palkovsky 278
#endif /* KERNEL */
279
 
869 vana 280
#endif
1702 cejka 281
 
1780 jermar 282
/** @}
1702 cejka 283
 */