Rev 1731 | Details | Compare with Previous | Last modification | View Log | RSS feed
| Rev | Author | Line No. | Line |
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| 1 | jermar | 1 | /* |
| 2 | * Copyright (C) 2001-2004 Jakub Jermar |
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| 3 | * All rights reserved. |
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| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 1731 | jermar | 29 | /** @addtogroup ia32 |
| 1702 | cejka | 30 | * @{ |
| 31 | */ |
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| 32 | /** @file |
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| 33 | */ |
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| 34 | |||
| 1 | jermar | 35 | #include <arch/cpu.h> |
| 36 | #include <arch/cpuid.h> |
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| 37 | #include <arch/pm.h> |
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| 38 | |||
| 39 | #include <arch.h> |
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| 40 | #include <arch/types.h> |
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| 41 | #include <print.h> |
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| 42 | #include <typedefs.h> |
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| 391 | jermar | 43 | #include <fpu_context.h> |
| 1 | jermar | 44 | |
| 16 | jermar | 45 | #include <arch/smp/apic.h> |
| 46 | |||
| 1 | jermar | 47 | /* |
| 48 | * Identification of CPUs. |
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| 49 | * Contains only non-MP-Specification specific SMP code. |
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| 50 | */ |
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| 51 | #define AMD_CPUID_EBX 0x68747541 |
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| 52 | #define AMD_CPUID_ECX 0x444d4163 |
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| 53 | #define AMD_CPUID_EDX 0x69746e65 |
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| 54 | |||
| 55 | #define INTEL_CPUID_EBX 0x756e6547 |
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| 56 | #define INTEL_CPUID_ECX 0x6c65746e |
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| 57 | #define INTEL_CPUID_EDX 0x49656e69 |
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| 58 | |||
| 141 | vana | 59 | |
| 1 | jermar | 60 | enum vendor { |
| 61 | VendorUnknown=0, |
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| 62 | VendorAMD, |
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| 63 | VendorIntel |
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| 64 | }; |
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| 65 | |||
| 66 | static char *vendor_str[] = { |
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| 67 | "Unknown Vendor", |
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| 68 | "AuthenticAMD", |
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| 69 | "GenuineIntel" |
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| 70 | }; |
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| 71 | |||
| 309 | palkovsky | 72 | void fpu_disable(void) |
| 58 | vana | 73 | { |
| 309 | palkovsky | 74 | __asm__ volatile ( |
| 58 | vana | 75 | "mov %%cr0,%%eax;" |
| 76 | "or $8,%%eax;" |
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| 77 | "mov %%eax,%%cr0;" |
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| 78 | : |
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| 79 | : |
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| 80 | :"%eax" |
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| 81 | ); |
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| 82 | } |
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| 83 | |||
| 309 | palkovsky | 84 | void fpu_enable(void) |
| 58 | vana | 85 | { |
| 309 | palkovsky | 86 | __asm__ volatile ( |
| 58 | vana | 87 | "mov %%cr0,%%eax;" |
| 88 | "and $0xffFFffF7,%%eax;" |
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| 89 | "mov %%eax,%%cr0;" |
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| 90 | : |
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| 91 | : |
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| 92 | :"%eax" |
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| 93 | ); |
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| 94 | } |
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| 95 | |||
| 1 | jermar | 96 | void cpu_arch_init(void) |
| 97 | { |
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| 1187 | jermar | 98 | cpuid_feature_info fi; |
| 99 | cpuid_extended_feature_info efi; |
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| 100 | cpu_info_t info; |
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| 1780 | jermar | 101 | uint32_t help = 0; |
| 1019 | vana | 102 | |
| 15 | jermar | 103 | CPU->arch.tss = tss_p; |
| 1780 | jermar | 104 | CPU->arch.tss->iomap_base = &CPU->arch.tss->iomap[0] - ((uint8_t *) CPU->arch.tss); |
| 1019 | vana | 105 | |
| 1187 | jermar | 106 | CPU->fpu_owner = NULL; |
| 1019 | vana | 107 | |
| 108 | cpuid(1, &info); |
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| 109 | |||
| 1187 | jermar | 110 | fi.word = info.cpuid_edx; |
| 111 | efi.word = info.cpuid_ecx; |
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| 1019 | vana | 112 | |
| 1187 | jermar | 113 | if (fi.bits.fxsr) |
| 114 | fpu_fxsr(); |
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| 115 | else |
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| 116 | fpu_fsr(); |
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| 1019 | vana | 117 | |
| 1187 | jermar | 118 | if (fi.bits.sse) { |
| 119 | asm volatile ( |
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| 120 | "mov %%cr4,%0\n" |
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| 121 | "or %1,%0\n" |
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| 122 | "mov %0,%%cr4\n" |
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| 123 | : "+r" (help) |
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| 124 | : "i" (CR4_OSFXSR_MASK|(1<<10)) |
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| 125 | ); |
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| 126 | } |
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| 1 | jermar | 127 | } |
| 128 | |||
| 129 | void cpu_identify(void) |
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| 130 | { |
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| 131 | cpu_info_t info; |
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| 132 | |||
| 15 | jermar | 133 | CPU->arch.vendor = VendorUnknown; |
| 1 | jermar | 134 | if (has_cpuid()) { |
| 135 | cpuid(0, &info); |
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| 136 | |||
| 137 | /* |
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| 138 | * Check for AMD processor. |
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| 139 | */ |
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| 125 | jermar | 140 | if (info.cpuid_ebx==AMD_CPUID_EBX && info.cpuid_ecx==AMD_CPUID_ECX && info.cpuid_edx==AMD_CPUID_EDX) { |
| 15 | jermar | 141 | CPU->arch.vendor = VendorAMD; |
| 1 | jermar | 142 | } |
| 143 | |||
| 144 | /* |
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| 145 | * Check for Intel processor. |
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| 146 | */ |
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| 125 | jermar | 147 | if (info.cpuid_ebx==INTEL_CPUID_EBX && info.cpuid_ecx==INTEL_CPUID_ECX && info.cpuid_edx==INTEL_CPUID_EDX) { |
| 15 | jermar | 148 | CPU->arch.vendor = VendorIntel; |
| 1 | jermar | 149 | } |
| 150 | |||
| 151 | cpuid(1, &info); |
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| 15 | jermar | 152 | CPU->arch.family = (info.cpuid_eax>>8)&0xf; |
| 153 | CPU->arch.model = (info.cpuid_eax>>4)&0xf; |
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| 154 | CPU->arch.stepping = (info.cpuid_eax>>0)&0xf; |
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| 1 | jermar | 155 | } |
| 156 | } |
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| 157 | |||
| 22 | jermar | 158 | void cpu_print_report(cpu_t* m) |
| 1 | jermar | 159 | { |
| 160 | printf("cpu%d: (%s family=%d model=%d stepping=%d) %dMHz\n", |
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| 161 | m->id, vendor_str[m->arch.vendor], m->arch.family, m->arch.model, m->arch.stepping, |
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| 162 | m->frequency_mhz); |
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| 163 | } |
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| 1702 | cejka | 164 | |
| 1731 | jermar | 165 | /** @} |
| 1702 | cejka | 166 | */ |