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1 jermar 1 
/*
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 * Copyright (C) 2001-2004 Jakub Jermar
393 bondari 3 
 * Copyright (C) 2005 Sergey Bondari
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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#ifndef __ia32_ASM_H__
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#define __ia32_ASM_H__
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#include <arch/types.h>
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#include <config.h>
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extern __u32 interrupt_handler_size;
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extern void paging_on(void);
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extern void interrupt_handlers(void);
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extern void enable_l_apic_in_msr(void);
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void asm_delay_loop(__u32 t);
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void asm_fake_loop(__u32 t);
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/** Halt CPU
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 *
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 * Halt the current CPU until interrupt event.
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 */
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static inline void cpu_halt(void) { __asm__("hlt\n"); };
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static inline void cpu_sleep(void) { __asm__("hlt\n"); };
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/** Read CR2
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 *
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 * Return value in CR2
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 *
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 * @return Value read.
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 */
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static inline __u32 read_cr2(void) { __u32 v; __asm__ volatile ("movl %%cr2,%0\n" : "=r" (v)); return v; }
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/** Write CR3
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 *
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 * Write value to CR3.
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 *
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 * @param v Value to be written.
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 */
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static inline void write_cr3(__u32 v) { __asm__ volatile ("movl %0,%%cr3\n" : : "r" (v)); }
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/** Read CR3
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 *
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 * Return value in CR3
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 *
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 * @return Value read.
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 */
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static inline __u32 read_cr3(void) { __u32 v; __asm__ volatile ("movl %%cr3,%0\n" : "=r" (v)); return v; }
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/** Byte to port
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 *
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 * Output byte to port
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 *
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 * @param port Port to write to
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 * @param val Value to write
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 */
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static inline void outb(__u16 port, __u8 val) { __asm__ volatile ("outb %b0, %w1\n" : : "a" (val), "d" (port) ); }
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/** Word to port
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 *
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 * Output word to port
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 *
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 * @param port Port to write to
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 * @param val Value to write
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 */
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static inline void outw(__u16 port, __u16 val) { __asm__ volatile ("outw %w0, %w1\n" : : "a" (val), "d" (port) ); }
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/** Double word to port
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 *
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 * Output double word to port
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 *
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 * @param port Port to write to
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 * @param val Value to write
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 */
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static inline void outl(__u16 port, __u32 val) { __asm__ volatile ("outl %l0, %w1\n" : : "a" (val), "d" (port) ); }
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/** Byte from port
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 *
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 * Get byte from port
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 *
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 * @param port Port to read from
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 * @return Value read
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 */
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static inline __u8 inb(__u16 port) { __u8 val; __asm__ volatile ("inb %w1, %b0 \n" : "=a" (val) : "d" (port) ); return val; }
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/** Word from port
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 *
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 * Get word from port
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 *
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 * @param port Port to read from
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 * @return Value read
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 */
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static inline __u16 inw(__u16 port) { __u16 val; __asm__ volatile ("inw %w1, %w0 \n" : "=a" (val) : "d" (port) ); return val; }
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/** Double word from port
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 *
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 * Get double word from port
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 *
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 * @param port Port to read from
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 * @return Value read
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 */
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static inline __u32 inl(__u16 port) { __u32 val; __asm__ volatile ("inl %w1, %l0 \n" : "=a" (val) : "d" (port) ); return val; }
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/** Enable interrupts.
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 *
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 * Enable interrupts and return previous
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 * value of EFLAGS.
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 *
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 * @return Old interrupt priority level.
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 */
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static inline ipl_t interrupts_enable(void) {
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    ipl_t v;
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    __asm__ volatile (
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        "pushf\n\t"
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        "popl %0\n\t"
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        "sti\n"
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        : "=r" (v)
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    );
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    return v;
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}
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413 jermar 152 
/** Disable interrupts.
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 *
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 * Disable interrupts and return previous
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 * value of EFLAGS.
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 *
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 * @return Old interrupt priority level.
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 */
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static inline ipl_t interrupts_disable(void) {
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    ipl_t v;
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    __asm__ volatile (
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        "pushf\n\t"
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        "popl %0\n\t"
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        "cli\n"
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        : "=r" (v)
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    );
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    return v;
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}
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/** Restore interrupt priority level.
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 *
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 * Restore EFLAGS.
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 *
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 * @param ipl Saved interrupt priority level.
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 */
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static inline void interrupts_restore(ipl_t ipl) {
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    __asm__ volatile (
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        "pushl %0\n\t"
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        "popf\n"
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        : : "r" (ipl)
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    );
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}
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/** Return interrupt priority level.
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 *
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 * @return EFLAFS.
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 */
413 jermar 188 
static inline ipl_t interrupts_read(void) {
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    ipl_t v;
115 jermar 190 
    __asm__ volatile (
358 bondari 191 
        "pushf\n\t"
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        "popl %0\n"
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        : "=r" (v)
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    );
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    return v;
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}
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173 jermar 198 
/** Return base address of current stack
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 *
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 * Return the base address of the current stack.
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 * The stack is assumed to be STACK_SIZE bytes long.
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 * The stack must start on page boundary.
173 jermar 203 
 */
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static inline __address get_stack_base(void)
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{
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    __address v;
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    __asm__ volatile ("andl %%esp, %0\n" : "=r" (v) : "0" (~(STACK_SIZE-1)));
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    return v;
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}
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348 jermar 213 
static inline __u64 rdtsc(void)
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{
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    __u64 v;
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    __asm__ volatile("rdtsc\n" : "=A" (v));
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    return v;
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}
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1 jermar 222 
#endif