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1 jermar 1
/*
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 * Copyright (C) 2001-2004 Jakub Jermar
393 bondari 3
 * Copyright (C) 2005 Sergey Bondari
1 jermar 4
 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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1702 cejka 30
 /** @addtogroup ia32  
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 * @{
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 */
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/** @file
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 */
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11 jermar 36
#ifndef __ia32_ASM_H__
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#define __ia32_ASM_H__
1 jermar 38
 
1186 jermar 39
#include <arch/pm.h>
1 jermar 40
#include <arch/types.h>
177 jermar 41
#include <config.h>
1 jermar 42
 
43
extern __u32 interrupt_handler_size;
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extern void paging_on(void);
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extern void interrupt_handlers(void);
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extern void enable_l_apic_in_msr(void);
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195 vana 51
 
597 jermar 52
extern void asm_delay_loop(__u32 t);
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extern void asm_fake_loop(__u32 t);
195 vana 54
 
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115 jermar 56
/** Halt CPU
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 *
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 * Halt the current CPU until interrupt event.
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 */
348 jermar 60
static inline void cpu_halt(void) { __asm__("hlt\n"); };
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static inline void cpu_sleep(void) { __asm__("hlt\n"); };
1 jermar 62
 
1074 palkovsky 63
#define GEN_READ_REG(reg) static inline __native read_ ##reg (void) \
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    { \
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    __native res; \
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    __asm__ volatile ("movl %%" #reg ", %0" : "=r" (res) ); \
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    return res; \
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    }
27 jermar 69
 
1074 palkovsky 70
#define GEN_WRITE_REG(reg) static inline void write_ ##reg (__native regn) \
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    { \
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    __asm__ volatile ("movl %0, %%" #reg : : "r" (regn)); \
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    }
38 jermar 74
 
1074 palkovsky 75
GEN_READ_REG(cr0);
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GEN_READ_REG(cr2);
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GEN_READ_REG(cr3);
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GEN_WRITE_REG(cr3);
115 jermar 79
 
1074 palkovsky 80
GEN_READ_REG(dr0);
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GEN_READ_REG(dr1);
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GEN_READ_REG(dr2);
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GEN_READ_REG(dr3);
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GEN_READ_REG(dr6);
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GEN_READ_REG(dr7);
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GEN_WRITE_REG(dr0);
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GEN_WRITE_REG(dr1);
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GEN_WRITE_REG(dr2);
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GEN_WRITE_REG(dr3);
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GEN_WRITE_REG(dr6);
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GEN_WRITE_REG(dr7);
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352 bondari 94
/** Byte to port
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 *
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 * Output byte to port
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 *
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 * @param port Port to write to
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 * @param val Value to write
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 */
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static inline void outb(__u16 port, __u8 val) { __asm__ volatile ("outb %b0, %w1\n" : : "a" (val), "d" (port) ); }
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353 bondari 103
/** Word to port
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 *
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 * Output word to port
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 *
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 * @param port Port to write to
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 * @param val Value to write
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 */
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static inline void outw(__u16 port, __u16 val) { __asm__ volatile ("outw %w0, %w1\n" : : "a" (val), "d" (port) ); }
352 bondari 111
 
353 bondari 112
/** Double word to port
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 *
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 * Output double word to port
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 *
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 * @param port Port to write to
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 * @param val Value to write
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 */
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static inline void outl(__u16 port, __u32 val) { __asm__ volatile ("outl %l0, %w1\n" : : "a" (val), "d" (port) ); }
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356 bondari 121
/** Byte from port
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 *
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 * Get byte from port
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 *
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 * @param port Port to read from
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 * @return Value read
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 */
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static inline __u8 inb(__u16 port) { __u8 val; __asm__ volatile ("inb %w1, %b0 \n" : "=a" (val) : "d" (port) ); return val; }
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/** Word from port
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 *
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 * Get word from port
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 *
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 * @param port Port to read from
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 * @return Value read
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 */
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static inline __u16 inw(__u16 port) { __u16 val; __asm__ volatile ("inw %w1, %w0 \n" : "=a" (val) : "d" (port) ); return val; }
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/** Double word from port
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 *
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 * Get double word from port
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 *
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 * @param port Port to read from
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 * @return Value read
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 */
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static inline __u32 inl(__u16 port) { __u32 val; __asm__ volatile ("inl %w1, %l0 \n" : "=a" (val) : "d" (port) ); return val; }
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413 jermar 148
/** Enable interrupts.
115 jermar 149
 *
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 * Enable interrupts and return previous
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 * value of EFLAGS.
413 jermar 152
 *
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 * @return Old interrupt priority level.
115 jermar 154
 */
432 jermar 155
static inline ipl_t interrupts_enable(void)
156
{
413 jermar 157
    ipl_t v;
115 jermar 158
    __asm__ volatile (
358 bondari 159
        "pushf\n\t"
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        "popl %0\n\t"
115 jermar 161
        "sti\n"
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        : "=r" (v)
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    );
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    return v;
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}
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413 jermar 167
/** Disable interrupts.
115 jermar 168
 *
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 * Disable interrupts and return previous
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 * value of EFLAGS.
413 jermar 171
 *
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 * @return Old interrupt priority level.
115 jermar 173
 */
432 jermar 174
static inline ipl_t interrupts_disable(void)
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{
413 jermar 176
    ipl_t v;
115 jermar 177
    __asm__ volatile (
358 bondari 178
        "pushf\n\t"
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        "popl %0\n\t"
115 jermar 180
        "cli\n"
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        : "=r" (v)
182
    );
183
    return v;
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}
185
 
413 jermar 186
/** Restore interrupt priority level.
115 jermar 187
 *
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 * Restore EFLAGS.
413 jermar 189
 *
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 * @param ipl Saved interrupt priority level.
115 jermar 191
 */
432 jermar 192
static inline void interrupts_restore(ipl_t ipl)
193
{
115 jermar 194
    __asm__ volatile (
358 bondari 195
        "pushl %0\n\t"
115 jermar 196
        "popf\n"
413 jermar 197
        : : "r" (ipl)
115 jermar 198
    );
199
}
200
 
413 jermar 201
/** Return interrupt priority level.
115 jermar 202
 *
413 jermar 203
 * @return EFLAFS.
115 jermar 204
 */
432 jermar 205
static inline ipl_t interrupts_read(void)
206
{
413 jermar 207
    ipl_t v;
115 jermar 208
    __asm__ volatile (
358 bondari 209
        "pushf\n\t"
115 jermar 210
        "popl %0\n"
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        : "=r" (v)
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    );
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    return v;
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}
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173 jermar 216
/** Return base address of current stack
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 *
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 * Return the base address of the current stack.
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 * The stack is assumed to be STACK_SIZE bytes long.
180 jermar 220
 * The stack must start on page boundary.
173 jermar 221
 */
222
static inline __address get_stack_base(void)
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{
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    __address v;
225
 
226
    __asm__ volatile ("andl %%esp, %0\n" : "=r" (v) : "0" (~(STACK_SIZE-1)));
227
 
228
    return v;
229
}
230
 
348 jermar 231
static inline __u64 rdtsc(void)
232
{
233
    __u64 v;
234
 
235
    __asm__ volatile("rdtsc\n" : "=A" (v));
236
 
237
    return v;
238
}
239
 
581 palkovsky 240
/** Return current IP address */
241
static inline __address * get_ip()
242
{
243
    __address *ip;
244
 
245
    __asm__ volatile (
246
        "mov %%eip, %0"
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        : "=r" (ip)
248
        );
249
    return ip;
250
}
251
 
597 jermar 252
/** Invalidate TLB Entry.
253
 *
254
 * @param addr Address on a page whose TLB entry is to be invalidated.
255
 */
256
static inline void invlpg(__address addr)
257
{
984 palkovsky 258
    __asm__ volatile ("invlpg %0\n" :: "m" (*(__native *)addr));
597 jermar 259
}
260
 
1186 jermar 261
/** Load GDTR register from memory.
262
 *
263
 * @param gdtr_reg Address of memory from where to load GDTR.
264
 */
1187 jermar 265
static inline void gdtr_load(ptr_16_32_t *gdtr_reg)
1186 jermar 266
{
1251 jermar 267
    __asm__ volatile ("lgdtl %0\n" : : "m" (*gdtr_reg));
1186 jermar 268
}
269
 
270
/** Store GDTR register to memory.
271
 *
272
 * @param gdtr_reg Address of memory to where to load GDTR.
273
 */
1187 jermar 274
static inline void gdtr_store(ptr_16_32_t *gdtr_reg)
1186 jermar 275
{
1251 jermar 276
    __asm__ volatile ("sgdtl %0\n" : : "m" (*gdtr_reg));
1186 jermar 277
}
278
 
279
/** Load IDTR register from memory.
280
 *
281
 * @param idtr_reg Address of memory from where to load IDTR.
282
 */
1187 jermar 283
static inline void idtr_load(ptr_16_32_t *idtr_reg)
1186 jermar 284
{
1251 jermar 285
    __asm__ volatile ("lidtl %0\n" : : "m" (*idtr_reg));
1186 jermar 286
}
287
 
288
/** Load TR from descriptor table.
289
 *
290
 * @param sel Selector specifying descriptor of TSS segment.
291
 */
292
static inline void tr_load(__u16 sel)
293
{
294
    __asm__ volatile ("ltr %0" : : "r" (sel));
295
}
296
 
1 jermar 297
#endif
1702 cejka 298
 
299
 /** @}
300
 */
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