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| Rev | Author | Line No. | Line |
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| 1 | jermar | 1 | /* |
| 319 | jermar | 2 | * Copyright (C) 2003-2004 Jakub Jermar |
| 1 | jermar | 3 | * All rights reserved. |
| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 29 | #include <arch/exception.h> |
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| 195 | vana | 30 | #include <arch/interrupt.h> |
| 1 | jermar | 31 | #include <panic.h> |
| 32 | #include <arch/cp0.h> |
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| 33 | #include <arch/types.h> |
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| 34 | #include <arch.h> |
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| 227 | jermar | 35 | #include <debug.h> |
| 1 | jermar | 36 | |
| 317 | palkovsky | 37 | void exception(struct exception_regdump *pstate) |
| 1 | jermar | 38 | { |
| 330 | palkovsky | 39 | int cause; |
| 1 | jermar | 40 | int excno; |
| 123 | decky | 41 | __u32 epc_shift = 0; |
| 213 | jermar | 42 | |
| 227 | jermar | 43 | ASSERT(CPU != NULL); |
| 44 | |||
| 213 | jermar | 45 | /* |
| 46 | * NOTE ON OPERATION ORDERING |
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| 47 | * |
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| 317 | palkovsky | 48 | * On entry, cpu_priority_high() must be called before |
| 49 | * exception bit is cleared. |
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| 213 | jermar | 50 | */ |
| 51 | |||
| 313 | palkovsky | 52 | cpu_priority_high(); |
| 53 | cp0_status_write(cp0_status_read() & ~ (cp0_status_exl_exception_bit | |
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| 54 | cp0_status_um_bit)); |
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| 327 | palkovsky | 55 | |
| 326 | palkovsky | 56 | /* Save pstate so that the threads can access it */ |
| 327 | palkovsky | 57 | /* If THREAD->pstate is set, this is nested exception, |
| 58 | * do not rewrite it |
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| 59 | */ |
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| 60 | if (THREAD && !THREAD->pstate) |
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| 326 | palkovsky | 61 | THREAD->pstate = pstate; |
| 1 | jermar | 62 | |
| 330 | palkovsky | 63 | cause = cp0_cause_read(); |
| 64 | excno = cp0_cause_excno(cause); |
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| 1 | jermar | 65 | /* decode exception number and process the exception */ |
| 330 | palkovsky | 66 | switch (excno) { |
| 123 | decky | 67 | case EXC_Int: |
| 332 | palkovsky | 68 | interrupt(pstate); |
| 123 | decky | 69 | break; |
| 1 | jermar | 70 | case EXC_TLBL: |
| 123 | decky | 71 | case EXC_TLBS: |
| 317 | palkovsky | 72 | tlb_invalid(pstate); |
| 123 | decky | 73 | break; |
| 327 | palkovsky | 74 | case EXC_CpU: |
| 75 | #ifdef FPU_LAZY |
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| 330 | palkovsky | 76 | if (cp0_cause_coperr(cause) == fpu_cop_id) |
| 77 | scheduler_fpu_lazy_request(); |
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| 78 | else |
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| 327 | palkovsky | 79 | #endif |
| 330 | palkovsky | 80 | panic("unhandled Coprocessor Unusable Exception\n"); |
| 327 | palkovsky | 81 | break; |
| 123 | decky | 82 | case EXC_Mod: |
| 83 | panic("unhandled TLB Modification Exception\n"); |
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| 84 | break; |
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| 85 | case EXC_AdEL: |
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| 86 | panic("unhandled Address Error Exception - load or instruction fetch\n"); |
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| 87 | break; |
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| 88 | case EXC_AdES: |
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| 89 | panic("unhandled Address Error Exception - store\n"); |
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| 90 | break; |
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| 91 | case EXC_IBE: |
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| 92 | panic("unhandled Bus Error Exception - fetch instruction\n"); |
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| 93 | break; |
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| 94 | case EXC_DBE: |
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| 95 | panic("unhandled Bus Error Exception - data reference: load or store\n"); |
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| 96 | break; |
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| 97 | case EXC_Bp: |
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| 98 | /* it is necessary to not re-execute BREAK instruction after returning from Exception handler |
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| 99 | (see page 138 in R4000 Manual for more information) */ |
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| 100 | epc_shift = 4; |
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| 101 | break; |
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| 102 | case EXC_RI: |
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| 103 | panic("unhandled Reserved Instruction Exception\n"); |
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| 104 | break; |
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| 105 | case EXC_Ov: |
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| 106 | panic("unhandled Arithmetic Overflow Exception\n"); |
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| 107 | break; |
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| 108 | case EXC_Tr: |
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| 109 | panic("unhandled Trap Exception\n"); |
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| 110 | break; |
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| 111 | case EXC_VCEI: |
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| 112 | panic("unhandled Virtual Coherency Exception - instruction\n"); |
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| 113 | break; |
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| 114 | case EXC_FPE: |
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| 115 | panic("unhandled Floating-Point Exception\n"); |
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| 116 | break; |
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| 117 | case EXC_WATCH: |
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| 118 | panic("unhandled reference to WatchHi/WatchLo address\n"); |
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| 119 | break; |
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| 120 | case EXC_VCED: |
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| 121 | panic("unhandled Virtual Coherency Exception - data\n"); |
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| 122 | break; |
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| 123 | default: |
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| 124 | panic("unhandled exception %d\n", excno); |
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| 1 | jermar | 125 | } |
| 126 | |||
| 317 | palkovsky | 127 | pstate->epc += epc_shift; |
| 327 | palkovsky | 128 | /* Set to NULL, so that we can still support nested |
| 129 | * exceptions |
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| 130 | * TODO: We should probably set EXL bit before this command, |
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| 131 | * nesting. On the other hand, if some exception occurs between |
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| 132 | * here and ERET, it won't set anything on the pstate anyway. |
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| 133 | */ |
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| 326 | palkovsky | 134 | if (THREAD) |
| 135 | THREAD->pstate = NULL; |
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| 1 | jermar | 136 | } |