Subversion Repositories HelenOS

Rev

Rev 883 | Rev 1787 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed

Rev Author Line No. Line
529 jermar 1
#
2
# Copyright (C) 2005 Jakub Jermar
3
# All rights reserved.
4
#
5
# Redistribution and use in source and binary forms, with or without
6
# modification, are permitted provided that the following conditions
7
# are met:
8
#
9
# - Redistributions of source code must retain the above copyright
10
#   notice, this list of conditions and the following disclaimer.
11
# - Redistributions in binary form must reproduce the above copyright
12
#   notice, this list of conditions and the following disclaimer in the
13
#   documentation and/or other materials provided with the distribution.
14
# - The name of the author may not be used to endorse or promote products
15
#   derived from this software without specific prior written permission.
16
#
17
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
#
28
 
29
/**
883 jermar 30
 * This file contains kernel trap table.
529 jermar 31
 */
666 jermar 32
 
33
.register %g2, #scratch
34
.register %g3, #scratch
35
.register %g6, #scratch
36
.register %g7, #scratch 
37
 
529 jermar 38
.text
39
 
630 jermar 40
#include <arch/trap/trap_table.h>
41
#include <arch/trap/regwin.h>
663 jermar 42
#include <arch/trap/interrupt.h>
667 jermar 43
#include <arch/trap/exception.h>
863 jermar 44
#include <arch/trap/mmu.h>
667 jermar 45
#include <arch/stack.h>
529 jermar 46
 
47
#define TABLE_SIZE	TRAP_TABLE_SIZE
48
#define ENTRY_SIZE	TRAP_TABLE_ENTRY_SIZE
49
 
50
/*
634 jermar 51
 * Kernel trap table.
529 jermar 52
 */
53
.align TABLE_SIZE
54
.global trap_table
55
trap_table:
56
 
667 jermar 57
/* TT = 0x08, TL = 0, instruction_access_exception */
58
.org trap_table + TT_INSTRUCTION_ACCESS_EXCEPTION*ENTRY_SIZE
59
.global instruction_access_exception
60
instruction_access_exception:
61
	SIMPLE_HANDLER do_instruction_access_exc
62
 
883 jermar 63
/* TT = 0x10, TL = 0, illegal_instruction */
64
.org trap_table + TT_ILLEGAL_INSTRUCTION*ENTRY_SIZE
65
.global illegal_instruction
66
illegal_instruction:
67
	SIMPLE_HANDLER do_illegal_instruction
68
 
663 jermar 69
/* TT = 0x24, TL = 0, clean_window handler */
634 jermar 70
.org trap_table + TT_CLEAN_WINDOW*ENTRY_SIZE
630 jermar 71
.global clean_window_handler
72
clean_window_handler:
73
	CLEAN_WINDOW_HANDLER
529 jermar 74
 
897 jermar 75
/* TT = 0x32, TL = 0, data_access_error */
76
.org trap_table + TT_DATA_ACCESS_ERROR*ENTRY_SIZE
77
.global data_access_error
78
data_access_error:
79
	SIMPLE_HANDLER do_data_access_error
80
 
667 jermar 81
/* TT = 0x34, TL = 0, mem_address_not_aligned */
82
.org trap_table + TT_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
83
.global mem_address_not_aligned
84
mem_address_not_aligned:
85
	SIMPLE_HANDLER do_mem_address_not_aligned
86
 
664 jermar 87
/* TT = 0x41, TL = 0, interrupt_level_1 handler */
88
.org trap_table + TT_INTERRUPT_LEVEL_1*ENTRY_SIZE
89
.global interrupt_level_1_handler
90
interrupt_level_1_handler:
91
	INTERRUPT_LEVEL_N_HANDLER 1
92
 
93
/* TT = 0x42, TL = 0, interrupt_level_2 handler */
94
.org trap_table + TT_INTERRUPT_LEVEL_2*ENTRY_SIZE
95
.global interrupt_level_2_handler
96
interrupt_level_2_handler:
97
	INTERRUPT_LEVEL_N_HANDLER 2
98
 
99
/* TT = 0x43, TL = 0, interrupt_level_3 handler */
100
.org trap_table + TT_INTERRUPT_LEVEL_3*ENTRY_SIZE
101
.global interrupt_level_3_handler
102
interrupt_level_3_handler:
103
	INTERRUPT_LEVEL_N_HANDLER 3
104
 
105
/* TT = 0x44, TL = 0, interrupt_level_4 handler */
106
.org trap_table + TT_INTERRUPT_LEVEL_4*ENTRY_SIZE
107
.global interrupt_level_4_handler
108
interrupt_level_4_handler:
109
	INTERRUPT_LEVEL_N_HANDLER 4
110
 
111
/* TT = 0x45, TL = 0, interrupt_level_5 handler */
112
.org trap_table + TT_INTERRUPT_LEVEL_5*ENTRY_SIZE
113
.global interrupt_level_5_handler
114
interrupt_level_5_handler:
115
	INTERRUPT_LEVEL_N_HANDLER 5
116
 
117
/* TT = 0x46, TL = 0, interrupt_level_6 handler */
118
.org trap_table + TT_INTERRUPT_LEVEL_6*ENTRY_SIZE
119
.global interrupt_level_6_handler
120
interrupt_level_6_handler:
121
	INTERRUPT_LEVEL_N_HANDLER 6
122
 
123
/* TT = 0x47, TL = 0, interrupt_level_7 handler */
124
.org trap_table + TT_INTERRUPT_LEVEL_7*ENTRY_SIZE
125
.global interrupt_level_7_handler
126
interrupt_level_7_handler:
127
	INTERRUPT_LEVEL_N_HANDLER 7
128
 
129
/* TT = 0x48, TL = 0, interrupt_level_8 handler */
130
.org trap_table + TT_INTERRUPT_LEVEL_8*ENTRY_SIZE
131
.global interrupt_level_8_handler
132
interrupt_level_8_handler:
133
	INTERRUPT_LEVEL_N_HANDLER 8
134
 
135
/* TT = 0x49, TL = 0, interrupt_level_9 handler */
136
.org trap_table + TT_INTERRUPT_LEVEL_9*ENTRY_SIZE
137
.global interrupt_level_9_handler
138
interrupt_level_9_handler:
139
	INTERRUPT_LEVEL_N_HANDLER 9
140
 
141
/* TT = 0x4a, TL = 0, interrupt_level_10 handler */
142
.org trap_table + TT_INTERRUPT_LEVEL_10*ENTRY_SIZE
143
.global interrupt_level_10_handler
144
interrupt_level_10_handler:
145
	INTERRUPT_LEVEL_N_HANDLER 10
146
 
147
/* TT = 0x4b, TL = 0, interrupt_level_11 handler */
148
.org trap_table + TT_INTERRUPT_LEVEL_11*ENTRY_SIZE
149
.global interrupt_level_11_handler
150
interrupt_level_11_handler:
151
	INTERRUPT_LEVEL_N_HANDLER 11
152
 
153
/* TT = 0x4c, TL = 0, interrupt_level_12 handler */
154
.org trap_table + TT_INTERRUPT_LEVEL_12*ENTRY_SIZE
155
.global interrupt_level_12_handler
156
interrupt_level_12_handler:
157
	INTERRUPT_LEVEL_N_HANDLER 12
158
 
159
/* TT = 0x4d, TL = 0, interrupt_level_13 handler */
160
.org trap_table + TT_INTERRUPT_LEVEL_13*ENTRY_SIZE
161
.global interrupt_level_13_handler
162
interrupt_level_13_handler:
163
	INTERRUPT_LEVEL_N_HANDLER 13
164
 
165
/* TT = 0x4e, TL = 0, interrupt_level_14 handler */
166
.org trap_table + TT_INTERRUPT_LEVEL_14*ENTRY_SIZE
167
.global interrupt_level_14_handler
168
interrupt_level_14_handler:
169
	INTERRUPT_LEVEL_N_HANDLER 14
170
 
171
/* TT = 0x4f, TL = 0, interrupt_level_15 handler */
172
.org trap_table + TT_INTERRUPT_LEVEL_15*ENTRY_SIZE
173
.global interrupt_level_15_handler
174
interrupt_level_15_handler:
175
	INTERRUPT_LEVEL_N_HANDLER 15
176
 
663 jermar 177
/* TT = 0x60, TL = 0, interrupt_vector_trap handler */
178
.org trap_table + TT_INTERRUPT_VECTOR_TRAP*ENTRY_SIZE
179
.global interrupt_vector_trap_handler
180
interrupt_vector_trap_handler:
181
	INTERRUPT_VECTOR_TRAP_HANDLER
182
 
863 jermar 183
/* TT = 0x64, TL = 0, fast_instruction_access_MMU_miss */
184
.org trap_table + TT_FAST_INSTRUCTION_ACCESS_MMU_MISS*ENTRY_SIZE
185
.global fast_instruction_access_mmu_miss_handler
186
fast_instruction_access_mmu_miss_handler:
187
	FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER
188
 
189
/* TT = 0x68, TL = 0, fast_data_access_MMU_miss */
190
.org trap_table + TT_FAST_DATA_ACCESS_MMU_MISS*ENTRY_SIZE
191
.global fast_data_access_mmu_miss_handler
192
fast_data_access_mmu_miss_handler:
193
	FAST_DATA_ACCESS_MMU_MISS_HANDLER
194
 
195
/* TT = 0x6c, TL = 0, fast_data_access_protection */
196
.org trap_table + TT_FAST_DATA_ACCESS_PROTECTION*ENTRY_SIZE
197
.global fast_data_access_protection_handler
198
fast_data_access_protection_handler:
199
	FAST_DATA_ACCESS_PROTECTION_HANDLER
200
 
663 jermar 201
/* TT = 0x80, TL = 0, spill_0_normal handler */
634 jermar 202
.org trap_table + TT_SPILL_0_NORMAL*ENTRY_SIZE
630 jermar 203
.global spill_0_normal
204
spill_0_normal:
205
	SPILL_NORMAL_HANDLER
529 jermar 206
 
663 jermar 207
/* TT = 0xc0, TL = 0, fill_0_normal handler */
634 jermar 208
.org trap_table + TT_FILL_0_NORMAL*ENTRY_SIZE
663 jermar 209
.global fill_0_normal
630 jermar 210
fill_0_normal:
211
	FILL_NORMAL_HANDLER
212
 
529 jermar 213
/*
663 jermar 214
 * Handlers for TL>0.
529 jermar 215
 */
216
 
667 jermar 217
/* TT = 0x08, TL > 0, instruction_access_exception */
218
.org trap_table + (TT_INSTRUCTION_ACCESS_EXCEPTION+512)*ENTRY_SIZE
219
.global instruction_access_exception_high
220
instruction_access_exception_high:
221
	SIMPLE_HANDLER do_instruction_access_exc
222
 
883 jermar 223
/* TT = 0x10, TL > 0, illegal_instruction */
224
.org trap_table + (TT_ILLEGAL_INSTRUCTION+512)*ENTRY_SIZE
225
.global illegal_instruction_high
226
illegal_instruction_high:
227
	SIMPLE_HANDLER do_illegal_instruction
228
 
663 jermar 229
/* TT = 0x24, TL > 0, clean_window handler */
230
.org trap_table + (TT_CLEAN_WINDOW+512)*ENTRY_SIZE
231
.global clean_window_handler_high
232
clean_window_handler_high:
233
	CLEAN_WINDOW_HANDLER
529 jermar 234
 
897 jermar 235
/* TT = 0x32, TL > 0, data_access_error */
236
.org trap_table + (TT_DATA_ACCESS_ERROR+512)*ENTRY_SIZE
237
.global data_access_error_high
238
data_access_error_high:
239
	SIMPLE_HANDLER do_data_access_error
240
 
667 jermar 241
/* TT = 0x34, TL > 0, mem_address_not_aligned */
242
.org trap_table + (TT_MEM_ADDRESS_NOT_ALIGNED+512)*ENTRY_SIZE
243
.global mem_address_not_aligned_high
244
mem_address_not_aligned_high:
245
	SIMPLE_HANDLER do_mem_address_not_aligned
529 jermar 246
 
863 jermar 247
/* TT = 0x64, TL > 0, fast_instruction_access_MMU_miss */
248
.org trap_table + (TT_FAST_INSTRUCTION_ACCESS_MMU_MISS+512)*ENTRY_SIZE
249
.global fast_instruction_access_mmu_miss_handler_high
250
fast_instruction_access_mmu_miss_handler_high:
251
	FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER
252
 
253
/* TT = 0x68, TL > 0, fast_data_access_MMU_miss */
254
.org trap_table + (TT_FAST_DATA_ACCESS_MMU_MISS+512)*ENTRY_SIZE
255
.global fast_data_access_mmu_miss_handler_high
256
fast_data_access_mmu_miss_handler_high:
257
	FAST_DATA_ACCESS_MMU_MISS_HANDLER
258
 
259
/* TT = 0x6c, TL > 0, fast_data_access_protection */
260
.org trap_table + (TT_FAST_DATA_ACCESS_PROTECTION+512)*ENTRY_SIZE
261
.global fast_data_access_protection_handler_high
262
fast_data_access_protection_handler_high:
263
	FAST_DATA_ACCESS_PROTECTION_HANDLER
264
 
663 jermar 265
/* TT = 0x80, TL > 0, spill_0_normal handler */
266
.org trap_table + (TT_SPILL_0_NORMAL+512)*ENTRY_SIZE
267
.global spill_0_normal_high
268
spill_0_normal_high:
269
	SPILL_NORMAL_HANDLER
529 jermar 270
 
663 jermar 271
/* TT = 0xc0, TL > 0, fill_0_normal handler */
272
.org trap_table + (TT_FILL_0_NORMAL+512)*ENTRY_SIZE
273
.global fill_0_normal_high
274
fill_0_normal_high:
275
	FILL_NORMAL_HANDLER
634 jermar 276
 
663 jermar 277
 
667 jermar 278
/* Preemptible trap handler.
666 jermar 279
 *
667 jermar 280
 * This trap handler makes arrangements to
281
 * make calling scheduler() possible.
282
 *
283
 * The caller is responsible for doing save
284
 * and allocating PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE
285
 * bytes on stack.
286
 *
666 jermar 287
 * Input registers:
288
 * 	%l0	 	Address of function to call.
289
 * Output registers:
290
 *	 %l1 - %l7 	Copy of %g1 - %g7
291
 */
667 jermar 292
.global preemptible_handler
293
preemptible_handler:
294
	/*
295
	 * Save TSTATE, TPC, TNPC and PSTATE aside.
296
	 */
297
	rdpr %tstate, %g1
298
	rdpr %tpc, %g2
299
	rdpr %tnpc, %g3
300
	rdpr %pstate, %g4
301
 
302
	stx %g1, [%fp + STACK_BIAS + SAVED_TSTATE]
303
	stx %g2, [%fp + STACK_BIAS + SAVED_TPC]
304
	stx %g3, [%fp + STACK_BIAS + SAVED_TNPC]
305
	stx %g4, [%fp + STACK_BIAS + SAVED_PSTATE]
306
 
307
	/*
308
	 * Write 0 to TL.
309
	 */
310
	wrpr %g0, 0, %tl
311
 
312
	/*
313
	 * Alter PSTATE.
314
	 * - switch to normal globals.
315
	 */
316
	and %g4, ~1, %g4		! mask alternate globals
317
	wrpr %g4, 0, %pstate
318
 
319
	/*
320
	 * Save the normal globals.
321
	 */
666 jermar 322
	SAVE_GLOBALS
667 jermar 323
 
324
	/*
325
	 * Call the higher-level handler.
326
	 */
666 jermar 327
	call %l0
328
	nop
667 jermar 329
 
330
	/*
331
	 * Restore the normal global register set.
332
	 */
666 jermar 333
	RESTORE_GLOBALS
667 jermar 334
 
335
	/*
336
	 * Restore PSTATE from saved copy.
337
	 * Alternate globals become active.
338
	 */
339
	ldx [%fp + STACK_BIAS + SAVED_PSTATE], %l4
340
	wrpr %l4, 0, %pstate
341
 
342
	/*
343
	 * Write 1 to TL.
344
	 */
345
	wrpr %g0, 1, %tl
346
 
347
	/*
348
	 * Read TSTATE, TPC and TNPC from saved copy.
349
	 */
350
	ldx [%fp + STACK_BIAS + SAVED_TSTATE], %g1
351
	ldx [%fp + STACK_BIAS + SAVED_TPC], %g2
352
	ldx [%fp + STACK_BIAS + SAVED_TNPC], %g3
353
 
354
	/*
355
	 * Do restore to match the save instruction from the top-level handler.
356
	 */
357
	restore
358
 
359
	/*
360
	 * On execution of retry instruction, CWP will be restored from TSTATE register.
361
	 * However, because of scheduling, it is possible that CWP in saved TSTATE
362
	 * is different from current CWP. The following chunk of code fixes CWP
363
	 * in the saved copy of TSTATE.
364
	 */
365
	rdpr %cwp, %g4		! read current CWP
366
	and %g1, ~0x1f, %g1	! clear CWP field in saved TSTATE
367
	or %g1, %g4, %g1	! write current CWP to TSTATE
368
 
369
	/*
370
	 * Restore TSTATE, TPC and TNPC from saved copies.
371
	 */
372
	wrpr %g1, 0, %tstate
373
	wrpr %g2, 0, %tpc
374
	wrpr %g3, 0, %tnpc
375
 
376
	/*
377
	 * Return from interrupt.
378
	 */
666 jermar 379
	retry