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570 jermar 1
/*
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 * Copyright (C) 2005 Jakub Jermar
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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#include <arch/mm/tlb.h>
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#include <mm/tlb.h>
619 jermar 31
#include <arch/mm/frame.h>
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#include <arch/mm/page.h>
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#include <arch/mm/mmu.h>
877 jermar 34
#include <mm/asid.h>
570 jermar 35
#include <print.h>
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#include <arch/types.h>
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#include <typedefs.h>
619 jermar 38
#include <config.h>
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#include <arch/trap/trap.h>
863 jermar 40
#include <panic.h>
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#include <arch/asm.h>
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#include <symtab.h>
570 jermar 43
 
873 jermar 44
char *context_encoding[] = {
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    "Primary",
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    "Secondary",
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    "Nucleus",
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    "Reserved"
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};
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619 jermar 51
/** Initialize ITLB and DTLB.
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 *
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 * The goal of this function is to disable MMU
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 * so that both TLBs can be purged and new
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 * kernel 4M locked entry can be installed.
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 * After TLB is initialized, MMU is enabled
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 * again.
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 *
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 * Switching MMU off imposes the requirement for
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 * the kernel to run in identity mapped environment.
619 jermar 61
 */
570 jermar 62
void tlb_arch_init(void)
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{
619 jermar 64
    tlb_tag_access_reg_t tag;
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    tlb_data_t data;
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    frame_address_t fr;
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    page_address_t pg;
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    fr.address = config.base;
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    pg.address = config.base;
646 jermar 71
 
619 jermar 72
    immu_disable();
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    dmmu_disable();
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    /*
846 jermar 76
     * We do identity mapping of 4M-page at 4M.
619 jermar 77
     */
877 jermar 78
    tag.value = ASID_KERNEL;
619 jermar 79
    tag.vpn = pg.vpn;
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    itlb_tag_access_write(tag.value);
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    dtlb_tag_access_write(tag.value);
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    data.value = 0;
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    data.v = true;
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    data.size = PAGESIZE_4M;
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    data.pfn = fr.pfn;
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    data.l = true;
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    data.cp = 1;
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    data.cv = 1;
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    data.p = true;
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    data.w = true;
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    data.g = true;
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    itlb_data_in_write(data.value);
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    dtlb_data_in_write(data.value);
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627 jermar 98
    /*
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     * Register window traps can occur before MMU is enabled again.
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     * This ensures that any such traps will be handled from
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     * kernel identity mapped trap handler.
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     */
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    trap_switch_trap_table();
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619 jermar 105
    tlb_invalidate_all();
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    dmmu_enable();
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    immu_enable();
873 jermar 109
 
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    /*
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     * Quick hack: map frame buffer
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     */
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    fr.address = 0x1C901000000ULL;
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    pg.address = 0xc0000000;
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877 jermar 116
    tag.value = ASID_KERNEL;
873 jermar 117
    tag.vpn = pg.vpn;
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    dtlb_tag_access_write(tag.value);
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    data.value = 0;
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    data.v = true;
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    data.size = PAGESIZE_4M;
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    data.pfn = fr.pfn;
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    data.l = true;
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    data.cp = 0;
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    data.cv = 0;
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    data.p = true;
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    data.w = true;
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    data.g = true;
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    dtlb_data_in_write(data.value);
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570 jermar 134
}
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863 jermar 136
/** ITLB miss handler. */
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void fast_instruction_access_mmu_miss(void)
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{
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    panic("%s\n", __FUNCTION__);
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}
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/** DTLB miss handler. */
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void fast_data_access_mmu_miss(void)
144
{
877 jermar 145
    tlb_tag_access_reg_t tag;
146
    tlb_data_t data;
147
    __address tpc;
873 jermar 148
    char *tpc_str;
149
 
877 jermar 150
    tag.value = dtlb_tag_access_read();
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    if (tag.context != ASID_KERNEL || tag.vpn == 0) {
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        tpc = tpc_read();
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        tpc_str = get_symtab_entry(tpc);
873 jermar 154
 
877 jermar 155
        printf("Faulting page: %P, ASID=%d\n", tag.vpn * PAGE_SIZE, tag.context);
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        printf("TPC=%P, (%s)\n", tpc, tpc_str ? tpc_str : "?");
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        panic("%s\n", __FUNCTION__);
158
    }
159
 
160
    /*
161
     * Identity map piece of faulting kernel address space.
162
     */
163
    data.value = 0;
164
    data.v = true;
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    data.size = PAGESIZE_8K;
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    data.pfn = tag.vpn;
167
    data.l = false;
168
    data.cp = 1;
169
    data.cv = 1;
170
    data.p = true;
171
    data.w = true;
172
    data.g = true;
173
 
174
    dtlb_data_in_write(data.value);
863 jermar 175
}
176
 
177
/** DTLB protection fault handler. */
178
void fast_data_access_protection(void)
179
{
180
    panic("%s\n", __FUNCTION__);
181
}
182
 
570 jermar 183
/** Print contents of both TLBs. */
184
void tlb_print(void)
185
{
186
    int i;
187
    tlb_data_t d;
188
    tlb_tag_read_reg_t t;
189
 
190
    printf("I-TLB contents:\n");
191
    for (i = 0; i < ITLB_ENTRY_COUNT; i++) {
192
        d.value = itlb_data_access_read(i);
613 jermar 193
        t.value = itlb_tag_read_read(i);
570 jermar 194
 
617 jermar 195
        printf("%d: vpn=%Q, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%X, diag=%X, pfn=%X, soft=%X, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n",
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            i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);
570 jermar 197
    }
198
 
199
    printf("D-TLB contents:\n");
200
    for (i = 0; i < DTLB_ENTRY_COUNT; i++) {
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        d.value = dtlb_data_access_read(i);
613 jermar 202
        t.value = dtlb_tag_read_read(i);
570 jermar 203
 
617 jermar 204
        printf("%d: vpn=%Q, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%X, diag=%X, pfn=%X, soft=%X, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n",
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            i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);
570 jermar 206
    }
207
 
208
}
617 jermar 209
 
210
/** Invalidate all unlocked ITLB and DTLB entries. */
211
void tlb_invalidate_all(void)
212
{
213
    int i;
214
    tlb_data_t d;
215
    tlb_tag_read_reg_t t;
216
 
217
    for (i = 0; i < ITLB_ENTRY_COUNT; i++) {
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        d.value = itlb_data_access_read(i);
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        if (!d.l) {
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            t.value = itlb_tag_read_read(i);
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            d.v = false;
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            itlb_tag_access_write(t.value);
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            itlb_data_access_write(i, d.value);
224
        }
225
    }
226
 
227
    for (i = 0; i < DTLB_ENTRY_COUNT; i++) {
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        d.value = dtlb_data_access_read(i);
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        if (!d.l) {
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            t.value = dtlb_tag_read_read(i);
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            d.v = false;
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            dtlb_tag_access_write(t.value);
233
            dtlb_data_access_write(i, d.value);
234
        }
235
    }
236
 
237
}
238
 
239
/** Invalidate all ITLB and DTLB entries that belong to specified ASID (Context).
240
 *
241
 * @param asid Address Space ID.
242
 */
243
void tlb_invalidate_asid(asid_t asid)
244
{
245
    /* TODO: write asid to some Context register and encode the register in second parameter below. */
246
    itlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);
247
    dtlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);
248
}
249
 
727 jermar 250
/** Invalidate all ITLB and DTLB entries for specified page range in specified address space.
617 jermar 251
 *
252
 * @param asid Address Space ID.
727 jermar 253
 * @param page First page which to sweep out from ITLB and DTLB.
254
 * @param cnt Number of ITLB and DTLB entries to invalidate.
617 jermar 255
 */
727 jermar 256
void tlb_invalidate_pages(asid_t asid, __address page, count_t cnt)
617 jermar 257
{
727 jermar 258
    int i;
259
 
260
    for (i = 0; i < cnt; i++) {
261
        /* TODO: write asid to some Context register and encode the register in second parameter below. */
262
        itlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, page + i * PAGE_SIZE);
263
        dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, page + i * PAGE_SIZE);
264
    }
617 jermar 265
}