Subversion Repositories HelenOS

Rev

Rev 1860 | Rev 1864 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed

Rev Author Line No. Line
864 jermar 1 
/*
2 
 * Copyright (C) 2006 Jakub Jermar
3 
 * All rights reserved.
4 
 *
5 
 * Redistribution and use in source and binary forms, with or without
6 
 * modification, are permitted provided that the following conditions
7 
 * are met:
8 
 *
9 
 * - Redistributions of source code must retain the above copyright
10 
 *   notice, this list of conditions and the following disclaimer.
11 
 * - Redistributions in binary form must reproduce the above copyright
12 
 *   notice, this list of conditions and the following disclaimer in the
13 
 *   documentation and/or other materials provided with the distribution.
14 
 * - The name of the author may not be used to endorse or promote products
15 
 *   derived from this software without specific prior written permission.
16 
 *
17 
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 
 */
28 
 
1703 jermar 29 
/** @addtogroup sparc64interrupt
1702 cejka 30 
 * @{
31 
 */
864 jermar 32 
/**
1703 jermar 33 
 * @file
34 
 * @brief This file contains fast MMU trap handlers.
864 jermar 35 
 */
36 
 
1859 jermar 37 
#ifndef KERN_sparc64_MMU_TRAP_H_
38 
#define KERN_sparc64_MMU_TRAP_H_
864 jermar 39 
 
883 jermar 40 
#include <arch/stack.h>
1852 jermar 41 
#include <arch/regdef.h>
1851 jermar 42 
#include <arch/mm/tlb.h>
43 
#include <arch/mm/mmu.h>
44 
#include <arch/mm/tte.h>
1860 jermar 45 
#include <arch/trap/regwin.h>
883 jermar 46 
 
864 jermar 47 
#define TT_FAST_INSTRUCTION_ACCESS_MMU_MISS 0x64
48 
#define TT_FAST_DATA_ACCESS_MMU_MISS        0x68
49 
#define TT_FAST_DATA_ACCESS_PROTECTION      0x6c
50 
 
51 
#define FAST_MMU_HANDLER_SIZE           128
52 
 
867 jermar 53 
#ifdef __ASM__
1860 jermar 54 
 
864 jermar 55 
.macro FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER
1861 jermar 56 
    /*
57 
     * First, try to refill TLB from TSB.
58 
     */
1859 jermar 59 
    ! TODO
60 
 
61 
    wrpr %g0, PSTATE_PRIV_BIT | PSTATE_AG_BIT, %pstate
62 
    PREEMPTIBLE_HANDLER fast_instruction_access_mmu_miss
864 jermar 63 
.endm
64 
 
65 
.macro FAST_DATA_ACCESS_MMU_MISS_HANDLER
1851 jermar 66 
    /*
1852 jermar 67 
     * First, try to refill TLB from TSB.
68 
     */
69 
    ! TODO
70 
 
71 
    /*
72 
     * Second, test if it is the portion of the kernel address space
1851 jermar 73 
     * which is faulting. If that is the case, immediately create
74 
     * identity mapping for that page in DTLB. VPN 0 is excluded from
75 
     * this treatment.
76 
     *
77 
     * Note that branch-delay slots are used in order to save space.
78 
     */
1860 jermar 79 
 
1851 jermar 80 
    mov VA_DMMU_TAG_ACCESS, %g1
81 
    ldxa [%g1] ASI_DMMU, %g1            ! read the faulting Context and VPN
82 
    set TLB_TAG_ACCESS_CONTEXT_MASK, %g2
83 
    andcc %g1, %g2, %g3             ! get Context
84 
    bnz 0f                      ! Context is non-zero
85 
    andncc %g1, %g2, %g3                ! get page address into %g3
86 
    bz 0f                       ! page address is zero
87 
 
88 
    or %g3, (TTE_CP|TTE_P|TTE_W), %g2       ! 8K pages are the default (encoded as 0)
1860 jermar 89 
    mov 1, %g3
90 
    sllx %g3, TTE_V_SHIFT, %g3
91 
    or %g2, %g3, %g2
1851 jermar 92 
    stxa %g2, [%g0] ASI_DTLB_DATA_IN_REG        ! identity map the kernel page
864 jermar 93 
    retry
1851 jermar 94 
 
1852 jermar 95 
    /*
96 
     * Third, catch and handle special cases when the trap is caused by
1860 jermar 97 
     * the userspace register window spill or fill handler. In case
98 
     * one of these two traps caused this trap, we just lower the trap
99 
     * level and service the DTLB miss. In the end, we restart
100 
     * the offending SAVE or RESTORE.
1852 jermar 101 
     */
1851 jermar 102 
0:
1860 jermar 103 
    HANDLE_MMU_TRAPS_FROM_SPILL_OR_FILL
1852 jermar 104 
 
105 
    wrpr %g0, PSTATE_PRIV_BIT | PSTATE_AG_BIT, %pstate
1851 jermar 106 
    PREEMPTIBLE_HANDLER fast_data_access_mmu_miss
864 jermar 107 
.endm
108 
 
109 
.macro FAST_DATA_ACCESS_PROTECTION_HANDLER
1860 jermar 110 
    /*
111 
     * First, try to refill TLB from TSB.
112 
     */
113 
    ! TODO
114 
 
115 
    /*
116 
     * The same special case as in FAST_DATA_ACCESS_MMU_MISS_HANDLER.
117 
     */
118 
    HANDLE_MMU_TRAPS_FROM_SPILL_OR_FILL
119 
 
1859 jermar 120 
    wrpr %g0, PSTATE_PRIV_BIT | PSTATE_AG_BIT, %pstate
121 
    PREEMPTIBLE_HANDLER fast_data_access_protection
864 jermar 122 
.endm
1860 jermar 123 
 
124 
/*
125 
 * Macro used to lower TL when a MMU trap is caused by
126 
 * the userspace register window spill or fill handler.
127 
 */
128 
.macro HANDLE_MMU_TRAPS_FROM_SPILL_OR_FILL
129 
    rdpr %tl, %g1
130 
    dec %g1
131 
    brz %g1, 0f         ! if TL was 1, skip
132 
    nop
133 
    wrpr %g1, 0, %tl        ! TL--
134 
    rdpr %tt, %g2
135 
    cmp %g2, TT_SPILL_1_NORMAL
136 
    be 0f               ! trap from spill_1_normal
137 
    cmp %g2, TT_FILL_1_NORMAL
138 
    be 0f               ! trap from fill_1_normal
139 
    inc %g1
140 
    wrpr %g1, 0, %tl        ! another trap, TL++
141 
0:
142 
.endm
143 
 
867 jermar 144 
#endif /* __ASM__ */
864 jermar 145 
 
146 
#endif
1702 cejka 147 
 
1703 jermar 148 
/** @}
1702 cejka 149 
 */