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1844 jermar 1 
/*
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 * Copyright (C) 2006 Jakub Jermar
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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/** @addtogroup sparc64
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 * @{
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 */
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/** @file
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 */
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#ifndef KERN_sparc64_NS16550_H_
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#define KERN_sparc64_NS16550_H_
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#include <arch/types.h>
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#include <arch/drivers/kbd.h>
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/* NS16550 registers */
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#define RBR_REG     0   /** Receiver Buffer Register. */
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#define IER_REG     1   /** Interrupt Enable Register. */
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#define IIR_REG     2   /** Interrupt Ident Register (read). */
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#define FCR_REG     2   /** FIFO control register (write). */
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#define LCR_REG     3   /** Line Control register. */
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#define LSR_REG     5   /** Line Status Register. */
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#define IER_ERBFI   0x01    /** Enable Receive Buffer Full Interrupt. */
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#define LCR_DLAB    0x80    /** Divisor Latch Access bit. */
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static inline uint8_t ns16550_rbr_read(void)
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{
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    return kbd_virt_address[RBR_REG];
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}
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static inline uint8_t ns16550_ier_read(void)
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{
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    return kbd_virt_address[IER_REG];
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}
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static inline void ns16550_ier_write(uint8_t v)
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{
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    kbd_virt_address[IER_REG] = v;
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}
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static inline uint8_t ns16550_iir_read(void)
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{
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    return kbd_virt_address[IIR_REG];
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}
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static inline void ns16550_fcr_write(uint8_t v)
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{
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    kbd_virt_address[FCR_REG] = v;
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}
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static inline uint8_t ns16550_lcr_read(void)
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{
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    return kbd_virt_address[LCR_REG];
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}
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static inline void ns16550_lcr_write(uint8_t v)
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{
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    kbd_virt_address[LCR_REG] = v;
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}
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static inline uint8_t ns16550_lsr_read(void)
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{
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    return kbd_virt_address[LSR_REG];
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}
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#endif
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/** @}
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 */