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| Rev | Author | Line No. | Line |
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| 1398 | decky | 1 | /* |
| 2071 | jermar | 2 | * Copyright (c) 2006 Martin Decky |
| 1398 | decky | 3 | * All rights reserved. |
| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 1745 | jermar | 29 | /** @addtogroup ppc64mm |
| 1702 | cejka | 30 | * @{ |
| 31 | */ |
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| 32 | /** @file |
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| 33 | */ |
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| 34 | |||
| 1398 | decky | 35 | #include <mm/tlb.h> |
| 36 | |||
| 37 | |||
| 38 | /** Initialize Page Hash Table. |
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| 39 | * |
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| 40 | * Setup the Page Hash Table with no entries. |
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| 41 | * |
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| 42 | */ |
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| 43 | void tlb_arch_init(void) |
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| 44 | { |
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| 45 | tlb_invalidate_all(); |
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| 46 | } |
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| 47 | |||
| 48 | |||
| 49 | void tlb_invalidate_all(void) |
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| 50 | { |
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| 51 | asm volatile ( |
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| 52 | "tlbsync\n" |
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| 53 | ); |
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| 54 | } |
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| 55 | |||
| 56 | |||
| 57 | /** Invalidate all entries in TLB that belong to specified address space. |
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| 58 | * |
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| 59 | * @param asid This parameter is ignored as the architecture doesn't support it. |
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| 60 | */ |
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| 61 | void tlb_invalidate_asid(asid_t asid) |
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| 62 | { |
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| 63 | tlb_invalidate_all(); |
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| 64 | } |
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| 65 | |||
| 66 | /** Invalidate TLB entries for specified page range belonging to specified address space. |
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| 67 | * |
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| 68 | * @param asid This parameter is ignored as the architecture doesn't support it. |
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| 69 | * @param page Address of the first page whose entry is to be invalidated. |
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| 70 | * @param cnt Number of entries to invalidate. |
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| 71 | */ |
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| 1780 | jermar | 72 | void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt) |
| 1398 | decky | 73 | { |
| 74 | tlb_invalidate_all(); |
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| 75 | } |
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| 76 | |||
| 77 | |||
| 78 | |||
| 79 | /** Print contents of Page Hash Table. */ |
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| 80 | void tlb_print(void) |
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| 81 | { |
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| 82 | } |
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| 1702 | cejka | 83 | |
| 1745 | jermar | 84 | /** @} |
| 1702 | cejka | 85 | */ |