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1 jermar 1
/*
2071 jermar 2
 * Copyright (c) 2005 Jakub Jermar
1 jermar 3
 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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1776 jermar 29
/** @addtogroup mips32mm   
1702 cejka 30
 * @{
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 */
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/** @file
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 */
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3228 decky 35
#include <macros.h>
1 jermar 36
#include <arch/mm/frame.h>
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#include <arch/mm/tlb.h>
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#include <interrupt.h>
1 jermar 39
#include <mm/frame.h>
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#include <mm/asid.h>
368 jermar 41
#include <config.h>
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#include <arch/drivers/msim.h>
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#include <arch/drivers/serial.h>
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#include <print.h>
1 jermar 45
 
3231 decky 46
#define ZERO_PAGE_MASK      TLB_PAGE_MASK_256K
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#define ZERO_FRAMES         2048
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#define ZERO_PAGE_WIDTH     18  /* 256K */
3228 decky 49
#define ZERO_PAGE_SIZE      (1 << ZERO_PAGE_WIDTH)
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#define ZERO_PAGE_ASID      ASID_INVALID
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#define ZERO_PAGE_TLBI      0
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#define ZERO_PAGE_ADDR      0
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#define ZERO_PAGE_OFFSET    (ZERO_PAGE_SIZE / sizeof(uint32_t) - 1)
3230 decky 54
#define ZERO_PAGE_VALUE     (((volatile uint32_t *) ZERO_PAGE_ADDR)[ZERO_PAGE_OFFSET])
3228 decky 55
 
3236 decky 56
#define ZERO_PAGE_VALUE_KSEG1(frame) (((volatile uint32_t *) (0xa0000000 + (frame << ZERO_PAGE_WIDTH)))[ZERO_PAGE_OFFSET])
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3228 decky 58
#define MAX_REGIONS         32
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typedef struct {
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    pfn_t start;
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    pfn_t count;
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} phys_region_t;
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static count_t phys_regions_count = 0;
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static phys_region_t phys_regions[MAX_REGIONS];
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3908 decky 68
uintptr_t end_frame = 0;
3228 decky 69
 
3908 decky 70
 
3228 decky 71
/** Check whether frame is available
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 *
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 * Returns true if given frame is generally available for use.
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 * Returns false if given frame is used for physical memory
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 * mapped devices and cannot be used.
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 *
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 */
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static bool frame_available(pfn_t frame)
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{
3880 decky 80
#ifdef msim
3228 decky 81
    /* MSIM device (dprinter) */
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    if (frame == (KA2PA(MSIM_VIDEORAM) >> ZERO_PAGE_WIDTH))
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        return false;
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85
    /* MSIM device (dkeyboard) */
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    if (frame == (KA2PA(MSIM_KBD_ADDRESS) >> ZERO_PAGE_WIDTH))
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        return false;
3236 decky 88
#endif
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3880 decky 90
#ifdef simics
3228 decky 91
    /* Simics device (serial line) */
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    if (frame == (KA2PA(SERIAL_ADDRESS) >> ZERO_PAGE_WIDTH))
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        return false;
3236 decky 94
#endif
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3880 decky 96
#if defined(lgxemul) || defined(bgxemul)
3236 decky 97
    /* gxemul devices */
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    if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
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        0x10000000, MB2SIZE(256)))
100
        return false;
101
#endif
3228 decky 102
 
103
    return true;
104
}
105
 
106
 
107
/** Check whether frame is safe to write
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 *
109
 * Returns true if given frame is safe for read/write test.
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 * Returns false if given frame should not be touched.
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 *
112
 */
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static bool frame_safe(pfn_t frame)
114
{
115
    /* Kernel structures */
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    if ((frame << ZERO_PAGE_WIDTH) < KA2PA(config.base))
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        return false;
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119
    /* Kernel */
120
    if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
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        KA2PA(config.base), config.kernel_size))
122
        return false;
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124
    /* Kernel stack */
125
    if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
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        KA2PA(config.stack_base), config.stack_size))
127
        return false;
128
 
129
    /* Init tasks */
130
    bool safe = true;
131
    count_t i;
132
    for (i = 0; i < init.cnt; i++)
133
        if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
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            KA2PA(init.tasks[i].addr), init.tasks[i].size)) {
135
            safe = false;
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            break;
137
        }
138
 
139
    return safe;
140
}
141
 
142
static void frame_add_region(pfn_t start_frame, pfn_t end_frame)
143
{
144
    if (end_frame > start_frame) {
145
        /* Convert 1M frames to 16K frames */
146
        pfn_t first = ADDR2PFN(start_frame << ZERO_PAGE_WIDTH);
3230 decky 147
        pfn_t count = ADDR2PFN((end_frame - start_frame) << ZERO_PAGE_WIDTH);
3228 decky 148
 
149
        /* Interrupt vector frame is blacklisted */
150
        pfn_t conf_frame;
3232 decky 151
        if (first == 0)
3228 decky 152
            conf_frame = 1;
153
        else
154
            conf_frame = first;
155
 
156
        zone_create(first, count, conf_frame, 0);
157
 
158
        if (phys_regions_count < MAX_REGIONS) {
159
            phys_regions[phys_regions_count].start = first;
160
            phys_regions[phys_regions_count].count = count;
161
            phys_regions_count++;
162
        }
163
    }
164
}
165
 
166
 
573 palkovsky 167
/** Create memory zones
168
 *
3232 decky 169
 * Walk through available 256 KB chunks of physical
3228 decky 170
 * memory and create zones.
171
 *
3230 decky 172
 * Note: It is assumed that the TLB is not yet being
173
 * used in any way, thus there is no interference.
174
 *
573 palkovsky 175
 */
1 jermar 176
void frame_arch_init(void)
177
{
3230 decky 178
    ipl_t ipl = interrupts_disable();
3228 decky 179
 
3230 decky 180
    /* Clear and initialize TLB */
181
    cp0_pagemask_write(ZERO_PAGE_MASK);
182
    cp0_entry_lo0_write(0);
183
    cp0_entry_lo1_write(0);
184
    cp0_entry_hi_write(0);
185
 
186
    count_t i;
187
    for (i = 0; i < TLB_ENTRY_COUNT; i++) {
188
        cp0_index_write(i);
189
        tlbwi();
190
    }
3228 decky 191
 
192
    pfn_t start_frame = 0;
193
    pfn_t frame;
194
    bool avail = true;
195
 
196
    /* Walk through all 1 MB frames */
197
    for (frame = 0; frame < ZERO_FRAMES; frame++) {
198
        if (!frame_available(frame))
199
            avail = false;
200
        else {
201
            if (frame_safe(frame)) {
202
                entry_lo_t lo0;
203
                entry_lo_t lo1;
204
                entry_hi_t hi;
205
                tlb_prepare_entry_lo(&lo0, false, true, true, false, frame << (ZERO_PAGE_WIDTH - 12));
206
                tlb_prepare_entry_lo(&lo1, false, false, false, false, 0);
207
                tlb_prepare_entry_hi(&hi, ZERO_PAGE_ASID, ZERO_PAGE_ADDR);
208
 
3230 decky 209
                cp0_pagemask_write(ZERO_PAGE_MASK);
3228 decky 210
                cp0_entry_lo0_write(lo0.value);
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                cp0_entry_lo1_write(lo1.value);
212
                cp0_entry_hi_write(hi.value);
3230 decky 213
                cp0_index_write(ZERO_PAGE_TLBI);
3228 decky 214
                tlbwi();
215
 
216
                ZERO_PAGE_VALUE = 0;
217
                if (ZERO_PAGE_VALUE != 0)
218
                    avail = false;
219
                else {
220
                    ZERO_PAGE_VALUE = 0xdeadbeef;
221
                    if (ZERO_PAGE_VALUE != 0xdeadbeef)
222
                        avail = false;
3880 decky 223
#if defined(lgxemul) || defined(bgxemul)
3236 decky 224
                    else {
225
                        ZERO_PAGE_VALUE_KSEG1(frame) = 0xaabbccdd;
226
                        if (ZERO_PAGE_VALUE_KSEG1(frame) != 0xaabbccdd)
227
                            avail = false;
228
                    }
229
#endif
3228 decky 230
                }
231
            }
232
        }
233
 
234
        if (!avail) {
235
            frame_add_region(start_frame, frame);
236
            start_frame = frame + 1;
237
            avail = true;
238
        }
814 palkovsky 239
    }
3228 decky 240
 
3908 decky 241
    end_frame = frame;
3228 decky 242
 
3908 decky 243
    frame_add_region(start_frame, end_frame);
244
 
3230 decky 245
    /* Blacklist interrupt vector frame */
246
    frame_mark_unavailable(0, 1);
247
 
248
    /* Cleanup */
249
    cp0_pagemask_write(ZERO_PAGE_MASK);
250
    cp0_entry_lo0_write(0);
251
    cp0_entry_lo1_write(0);
252
    cp0_entry_hi_write(0);
3228 decky 253
    cp0_index_write(ZERO_PAGE_TLBI);
254
    tlbwi();
255
 
3230 decky 256
    interrupts_restore(ipl);
1 jermar 257
}
1702 cejka 258
 
3228 decky 259
 
260
void physmem_print(void)
261
{
262
    printf("Base       Size\n");
263
    printf("---------- ----------\n");
264
 
265
    count_t i;
266
    for (i = 0; i < phys_regions_count; i++) {
3231 decky 267
        printf("%#010x %10u\n",
3228 decky 268
            PFN2ADDR(phys_regions[i].start), PFN2ADDR(phys_regions[i].count));
269
    }  
270
}
271
 
1776 jermar 272
/** @}
1702 cejka 273
 */