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/*
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 * Copyright (C) 2003-2004 Jakub Jermar
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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#include <arch/exception.h>
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#include <arch/interrupt.h>
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#include <panic.h>
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#include <arch/cp0.h>
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#include <arch/types.h>
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#include <arch.h>
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#include <debug.h>
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#include <proc/thread.h>
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#include <symtab.h>
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#include <print.h>
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#include <interrupt.h>
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static char * exctable[] = {
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    "Interrupt","TLB Modified","TLB Invalid","TLB Invalid Store",
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        "Address Error - load/instr. fetch",
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        "Address Error - store",
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        "Bus Error - fetch instruction",
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        "Bus Error - data reference",
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        "Syscall",
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        "BreakPoint",
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        "Reserved Instruction",
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        "Coprocessor Unusable",
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        "Arithmetic Overflow",
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        "Trap",
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        "Virtual Coherency - instruction",
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        "Floating Point",
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        NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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        "WatchHi/WatchLo", /* 23 */
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        NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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        "Virtual Coherency - data",
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};
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static void print_regdump(struct exception_regdump *pstate)
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{
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    char *pcsymbol = "";
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    char *rasymbol = "";
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    char *s = get_symtab_entry(pstate->epc);
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    if (s)
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        pcsymbol = s;
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    s = get_symtab_entry(pstate->ra);
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    if (s)
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        rasymbol = s;
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    printf("PC: %X(%s) RA: %X(%s)\n",pstate->epc,pcsymbol,
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           pstate->ra,rasymbol);
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}
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static void unhandled_exception(int n, void *data)
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{
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    struct exception_regdump *pstate = (struct exception_regdump *)data;
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    print_regdump(pstate);
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    panic("unhandled exception %s\n", exctable[n]);
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}
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static void breakpoint_exception(int n, void *data)
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{
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    struct exception_regdump *pstate = (struct exception_regdump *)data;
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    /* it is necessary to not re-execute BREAK instruction after
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       returning from Exception handler
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       (see page 138 in R4000 Manual for more information) */
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    pstate->epc += 4;
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}
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static void tlbmod_exception(int n, void *data)
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{
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    struct exception_regdump *pstate = (struct exception_regdump *)data;
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    tlb_modified(pstate);
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}
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static void tlbinv_exception(int n, void *data)
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{
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    struct exception_regdump *pstate = (struct exception_regdump *)data;
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    tlb_invalid(pstate);
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}
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static void cpunsbl_exception(int n, void *data)
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{
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    if (cp0_cause_coperr(cp0_cause_read()) == fpu_cop_id)
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        scheduler_fpu_lazy_request();
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    else
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        panic("unhandled Coprocessor Unusable Exception\n");
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}
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static void interrupt_exception(int n, void *pstate)
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{
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    __u32 cause;
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    int i;
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    /* decode interrupt number and process the interrupt */
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    cause = (cp0_cause_read() >> 8) &0xff;
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    for (i = 0; i < 8; i++)
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        if (cause & (1 << i))
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            exc_dispatch(i+INT_OFFSET, pstate);
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}
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void exception(struct exception_regdump *pstate)
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{
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    int cause;
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    int excno;
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    __u32 epc_shift = 0;
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    ASSERT(CPU != NULL);
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    /*
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     * NOTE ON OPERATION ORDERING
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     *
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     * On entry, interrupts_disable() must be called before
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     * exception bit is cleared.
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     */
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    interrupts_disable();
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    cp0_status_write(cp0_status_read() & ~ (cp0_status_exl_exception_bit |
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                        cp0_status_um_bit));
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    /* Save pstate so that the threads can access it */
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    /* If THREAD->pstate is set, this is nested exception,
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     * do not rewrite it
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     */
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    if (THREAD && !THREAD->pstate)
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        THREAD->pstate = pstate;
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    cause = cp0_cause_read();
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    excno = cp0_cause_excno(cause);
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    /* Dispatch exception */
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    exc_dispatch(excno, pstate);
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    /* Set to NULL, so that we can still support nested
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     * exceptions
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     * TODO: We should probably set EXL bit before this command,
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     * nesting. On the other hand, if some exception occurs between
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     * here and ERET, it won't set anything on the pstate anyway.
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     */
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    if (THREAD)
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        THREAD->pstate = NULL;
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}
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void exception_init(void)
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{
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    int i;
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    /* Clear exception table */
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    for (i=0;i < IVT_ITEMS; i++)
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        exc_register(i, "undef", unhandled_exception);
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    exc_register(EXC_Bp, "bkpoint", breakpoint_exception);
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    exc_register(EXC_Mod, "tlb_mod", tlbmod_exception);
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    exc_register(EXC_TLBL, "tlbinvl", tlbinv_exception);
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    exc_register(EXC_TLBS, "tlbinvl", tlbinv_exception);
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    exc_register(EXC_Int, "interrupt", interrupt_exception);
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#ifdef CONFIG_FPU_LAZY
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    exc_register(EXC_CpU, "cpunus", cpun_exception);
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#endif
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}