Subversion Repositories HelenOS

Rev

Rev 1787 | Rev 1980 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed

Rev Author Line No. Line
1 jermar 1
/*
319 jermar 2
 * Copyright (C) 2003-2004 Jakub Jermar
1 jermar 3
 * All rights reserved.
4
 *
5
 * Redistribution and use in source and binary forms, with or without
6
 * modification, are permitted provided that the following conditions
7
 * are met:
8
 *
9
 * - Redistributions of source code must retain the above copyright
10
 *   notice, this list of conditions and the following disclaimer.
11
 * - Redistributions in binary form must reproduce the above copyright
12
 *   notice, this list of conditions and the following disclaimer in the
13
 *   documentation and/or other materials provided with the distribution.
14
 * - The name of the author may not be used to endorse or promote products
15
 *   derived from this software without specific prior written permission.
16
 *
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
 */
28
 
1776 jermar 29
/** @addtogroup mips32mm   
1702 cejka 30
 * @{
31
 */
32
/** @file
33
 */
34
 
1888 jermar 35
#ifndef KERN_mips32_PAGE_H_
36
#define KERN_mips32_PAGE_H_
1 jermar 37
 
967 palkovsky 38
#include <arch/mm/frame.h>
39
 
765 jermar 40
#define PAGE_WIDTH  FRAME_WIDTH
1 jermar 41
#define PAGE_SIZE   FRAME_SIZE
42
 
306 palkovsky 43
#ifndef __ASM__
1780 jermar 44
#  define KA2PA(x)  (((uintptr_t) (x)) - 0x80000000)
45
#  define PA2KA(x)  (((uintptr_t) (x)) + 0x80000000)
306 palkovsky 46
#else
47
#  define KA2PA(x)  ((x) - 0x80000000)
48
#  define PA2KA(x)  ((x) + 0x80000000)
49
#endif
1 jermar 50
 
967 palkovsky 51
#ifdef KERNEL
52
 
120 jermar 53
/*
54
 * Implementation of generic 4-level page table interface.
121 jermar 55
 * NOTE: this implementation is under construction
56
 *
57
 * Page table layout:
58
 * - 32-bit virtual addresses
59
 * - Offset is 14 bits => pages are 16K long
394 jermar 60
 * - PTE's use similar format as CP0 EntryLo[01] registers => PTE is therefore 4 bytes long
831 jermar 61
 * - PTE's replace EntryLo v (valid) bit with p (present) bit
62
 * - PTE's use only one bit to distinguish between cacheable and uncacheable mappings
63
 * - PTE's define soft_valid field to ensure there is at least one 1 bit even if the p bit is cleared
394 jermar 64
 * - PTE's make use of CP0 EntryLo's two-bit reserved field for bit W (writable) and bit A (accessed)
121 jermar 65
 * - PTL0 has 64 entries (6 bits)
66
 * - PTL1 is not used
67
 * - PTL2 is not used
68
 * - PTL3 has 4096 entries (12 bits)
120 jermar 69
 */
121 jermar 70
 
832 jermar 71
#define PTL0_ENTRIES_ARCH   64
72
#define PTL1_ENTRIES_ARCH   0
73
#define PTL2_ENTRIES_ARCH   0
74
#define PTL3_ENTRIES_ARCH   4096
75
 
121 jermar 76
#define PTL0_INDEX_ARCH(vaddr)  ((vaddr)>>26) 
120 jermar 77
#define PTL1_INDEX_ARCH(vaddr)  0
78
#define PTL2_INDEX_ARCH(vaddr)  0
1087 palkovsky 79
#define PTL3_INDEX_ARCH(vaddr)  (((vaddr)>>14) & 0xfff)
120 jermar 80
 
760 jermar 81
#define SET_PTL0_ADDRESS_ARCH(ptl0)
120 jermar 82
 
831 jermar 83
#define GET_PTL1_ADDRESS_ARCH(ptl0, i)      (((pte_t *)(ptl0))[(i)].pfn<<12)
125 jermar 84
#define GET_PTL2_ADDRESS_ARCH(ptl1, i)      (ptl1)
85
#define GET_PTL3_ADDRESS_ARCH(ptl2, i)      (ptl2)
831 jermar 86
#define GET_FRAME_ADDRESS_ARCH(ptl3, i)     (((pte_t *)(ptl3))[(i)].pfn<<12)
121 jermar 87
 
831 jermar 88
#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a)   (((pte_t *)(ptl0))[(i)].pfn = (a)>>12)
120 jermar 89
#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
90
#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
831 jermar 91
#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a)  (((pte_t *)(ptl3))[(i)].pfn = (a)>>12)
120 jermar 92
 
125 jermar 93
#define GET_PTL1_FLAGS_ARCH(ptl0, i)        get_pt_flags((pte_t *)(ptl0), (index_t)(i))
94
#define GET_PTL2_FLAGS_ARCH(ptl1, i)        PAGE_PRESENT
95
#define GET_PTL3_FLAGS_ARCH(ptl2, i)        PAGE_PRESENT
96
#define GET_FRAME_FLAGS_ARCH(ptl3, i)       get_pt_flags((pte_t *)(ptl3), (index_t)(i))
120 jermar 97
 
121 jermar 98
#define SET_PTL1_FLAGS_ARCH(ptl0, i, x)     set_pt_flags((pte_t *)(ptl0), (index_t)(i), (x))
120 jermar 99
#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
100
#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
121 jermar 101
#define SET_FRAME_FLAGS_ARCH(ptl3, i, x)    set_pt_flags((pte_t *)(ptl3), (index_t)(i), (x))
120 jermar 102
 
1780 jermar 103
#define PTE_VALID_ARCH(pte)         (*((uint32_t *) (pte)) != 0)
977 jermar 104
#define PTE_PRESENT_ARCH(pte)           ((pte)->p != 0)
980 palkovsky 105
#define PTE_GET_FRAME_ARCH(pte)         ((pte)->pfn<<12)
1423 jermar 106
#define PTE_WRITABLE_ARCH(pte)          ((pte)->w != 0)
107
#define PTE_EXECUTABLE_ARCH(pte)        1
832 jermar 108
 
306 palkovsky 109
#ifndef __ASM__
110
 
111
#include <arch/mm/tlb.h>
112
#include <mm/page.h>
113
#include <arch/mm/frame.h>
114
#include <arch/types.h>
115
 
121 jermar 116
static inline int get_pt_flags(pte_t *pt, index_t i)
117
{
118
    pte_t *p = &pt[i];
119
 
120
    return (
831 jermar 121
        (p->cacheable<<PAGE_CACHEABLE_SHIFT) |
122
        ((!p->p)<<PAGE_PRESENT_SHIFT) |
121 jermar 123
        (1<<PAGE_USER_SHIFT) |
124
        (1<<PAGE_READ_SHIFT) |
394 jermar 125
        ((p->w)<<PAGE_WRITE_SHIFT) |
825 jermar 126
        (1<<PAGE_EXEC_SHIFT) |
831 jermar 127
        (p->g<<PAGE_GLOBAL_SHIFT)
121 jermar 128
    );
129
 
130
}
120 jermar 131
 
121 jermar 132
static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
133
{
134
    pte_t *p = &pt[i];
135
 
831 jermar 136
    p->cacheable = (flags & PAGE_CACHEABLE) != 0;
137
    p->p = !(flags & PAGE_NOT_PRESENT);
138
    p->g = (flags & PAGE_GLOBAL) != 0;
394 jermar 139
    p->w = (flags & PAGE_WRITE) != 0;
831 jermar 140
 
141
    /*
142
     * Ensure that valid entries have at least one bit set.
143
     */
144
    p->soft_valid = 1;
121 jermar 145
}
146
 
147
extern void page_arch_init(void);
148
 
306 palkovsky 149
#endif /* __ASM__ */
150
 
967 palkovsky 151
#endif /* KERNEL */
152
 
1 jermar 153
#endif
1702 cejka 154
 
1776 jermar 155
/** @}
1702 cejka 156
 */