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684 jermar 1
/*
2071 jermar 2
 * Copyright (c) 2006 Jakub Jermar
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 * Copyright (c) 2006 Jakub Vana
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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/** @addtogroup ia64mm 
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 * @{
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 */
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/** @file
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 */
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684 jermar 36
#include <arch/mm/page.h>
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#include <genarch/mm/page_ht.h>
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#include <mm/asid.h>
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#include <arch/mm/asid.h>
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#include <arch/mm/vhpt.h>
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#include <arch/types.h>
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#include <print.h>
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#include <mm/page.h>
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#include <mm/frame.h>
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#include <config.h>
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#include <panic.h>
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#include <arch/asm.h>
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#include <arch/barrier.h>
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#include <memstr.h>
684 jermar 50
 
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static void set_environment(void);
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/** Initialize ia64 virtual address translation subsystem. */
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void page_arch_init(void)
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{
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    page_mapping_operations = &ht_mapping_operations;
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    pk_disable();
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    set_environment();
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}
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747 jermar 61
/** Initialize VHPT and region registers. */
792 jermar 62
void set_environment(void)
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{
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    region_register rr;
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    pta_register pta;  
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    int i;
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#ifdef CONFIG_VHPT  
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    uintptr_t vhpt_base;
1210 vana 69
#endif
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747 jermar 71
    /*
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     * First set up kernel region register.
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     * This is redundant (see start.S) but we keep it here just for sure.
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     */
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    rr.word = rr_read(VRN_KERNEL);
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    rr.map.ve = 0;                  /* disable VHPT walker */
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    rr.map.ps = PAGE_WIDTH;
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    rr.map.rid = ASID2RID(ASID_KERNEL, VRN_KERNEL);
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    rr_write(VRN_KERNEL, rr.word);
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    srlz_i();
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    srlz_d();
901 jermar 82
 
747 jermar 83
    /*
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     * And setup the rest of region register.
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     */
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    for(i = 0; i < REGION_REGISTERS; i++) {
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        /* skip kernel rr */
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        if (i == VRN_KERNEL)
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            continue;
728 vana 90
 
904 jermar 91
        rr.word = rr_read(i);
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        rr.map.ve = 0;      /* disable VHPT walker */
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        rr.map.rid = RID_KERNEL;
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        rr.map.ps = PAGE_WIDTH;
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        rr_write(i, rr.word);
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        srlz_i();
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        srlz_d();
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    }
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1210 vana 100
#ifdef CONFIG_VHPT  
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    vhpt_base = vhpt_set_up();
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#endif
715 vana 103
    /*
747 jermar 104
     * Set up PTA register.
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     */
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    pta.word = pta_read();
1210 vana 107
#ifndef CONFIG_VHPT
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    pta.map.ve = 0;                   /* disable VHPT walker */
1210 vana 109
    pta.map.base = 0 >> PTA_BASE_SHIFT;
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#else
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    pta.map.ve = 1;                   /* enable VHPT walker */
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    pta.map.base = vhpt_base >> PTA_BASE_SHIFT;
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#endif
747 jermar 114
    pta.map.vf = 1;                   /* large entry format */
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    pta.map.size = VHPT_WIDTH;
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    pta_write(pta.word);
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    srlz_i();
118
    srlz_d();
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}
728 vana 120
 
748 jermar 121
/** Calculate address of collision chain from VPN and ASID.
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 *
749 jermar 123
 * Interrupts must be disabled.
748 jermar 124
 *
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 * @param page Address of virtual page including VRN bits.
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 * @param asid Address space identifier.
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 *
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 * @return VHPT entry address.
748 jermar 129
 */
1780 jermar 130
vhpt_entry_t *vhpt_hash(uintptr_t page, asid_t asid)
748 jermar 131
{
132
    region_register rr_save, rr;
749 jermar 133
    index_t vrn;
134
    rid_t rid;
792 jermar 135
    vhpt_entry_t *v;
748 jermar 136
 
749 jermar 137
    vrn = page >> VRN_SHIFT;
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    rid = ASID2RID(asid, vrn);
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140
    rr_save.word = rr_read(vrn);
141
    if (rr_save.map.rid == rid) {
142
        /*
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         * The RID is already in place, compute thash and return.
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         */
792 jermar 145
        v = (vhpt_entry_t *) thash(page);
146
        return v;
749 jermar 147
    }
148
 
149
    /*
150
     * The RID must be written to some region register.
151
     * To speed things up, register indexed by vrn is used.
152
     */
748 jermar 153
    rr.word = rr_save.word;
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    rr.map.rid = rid;
155
    rr_write(vrn, rr.word);
748 jermar 156
    srlz_i();
792 jermar 157
    v = (vhpt_entry_t *) thash(page);
749 jermar 158
    rr_write(vrn, rr_save.word);
748 jermar 159
    srlz_i();
160
    srlz_d();
161
 
792 jermar 162
    return v;
748 jermar 163
}
749 jermar 164
 
165
/** Compare ASID and VPN against PTE.
166
 *
167
 * Interrupts must be disabled.
168
 *
169
 * @param page Address of virtual page including VRN bits.
170
 * @param asid Address space identifier.
171
 *
172
 * @return True if page and asid match the page and asid of t, false otherwise.
173
 */
1780 jermar 174
bool vhpt_compare(uintptr_t page, asid_t asid, vhpt_entry_t *v)
749 jermar 175
{
176
    region_register rr_save, rr;   
177
    index_t vrn;
178
    rid_t rid;
179
    bool match;
180
 
792 jermar 181
    ASSERT(v);
749 jermar 182
 
183
    vrn = page >> VRN_SHIFT;
184
    rid = ASID2RID(asid, vrn);
185
 
186
    rr_save.word = rr_read(vrn);
187
    if (rr_save.map.rid == rid) {
188
        /*
189
         * The RID is already in place, compare ttag with t and return.
190
         */
792 jermar 191
        return ttag(page) == v->present.tag.tag_word;
749 jermar 192
    }
193
 
194
    /*
195
     * The RID must be written to some region register.
196
     * To speed things up, register indexed by vrn is used.
197
     */
198
    rr.word = rr_save.word;
199
    rr.map.rid = rid;
200
    rr_write(vrn, rr.word);
201
    srlz_i();
792 jermar 202
    match = (ttag(page) == v->present.tag.tag_word);
749 jermar 203
    rr_write(vrn, rr_save.word);
204
    srlz_i();
205
    srlz_d();
206
 
207
    return match;      
208
}
209
 
210
/** Set up one VHPT entry.
211
 *
1708 jermar 212
 * @param v VHPT entry to be set up.
749 jermar 213
 * @param page Virtual address of the page mapped by the entry.
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 * @param asid Address space identifier of the address space to which page belongs.
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 * @param frame Physical address of the frame to wich page is mapped.
216
 * @param flags Different flags for the mapping.
217
 */
1780 jermar 218
void vhpt_set_record(vhpt_entry_t *v, uintptr_t page, asid_t asid, uintptr_t frame, int flags)
749 jermar 219
{
220
    region_register rr_save, rr;   
221
    index_t vrn;
222
    rid_t rid;
1780 jermar 223
    uint64_t tag;
749 jermar 224
 
792 jermar 225
    ASSERT(v);
749 jermar 226
 
227
    vrn = page >> VRN_SHIFT;
228
    rid = ASID2RID(asid, vrn);
229
 
230
    /*
231
     * Compute ttag.
232
     */
233
    rr_save.word = rr_read(vrn);
234
    rr.word = rr_save.word;
235
    rr.map.rid = rid;
236
    rr_write(vrn, rr.word);
237
    srlz_i();
238
    tag = ttag(page);
239
    rr_write(vrn, rr_save.word);
240
    srlz_i();
241
    srlz_d();
242
 
243
    /*
244
     * Clear the entry.
245
     */
792 jermar 246
    v->word[0] = 0;
247
    v->word[1] = 0;
248
    v->word[2] = 0;
249
    v->word[3] = 0;
749 jermar 250
 
792 jermar 251
    v->present.p = true;
252
    v->present.ma = (flags & PAGE_CACHEABLE) ? MA_WRITEBACK : MA_UNCACHEABLE;
253
    v->present.a = false;   /* not accessed */
254
    v->present.d = false;   /* not dirty */
255
    v->present.pl = (flags & PAGE_USER) ? PL_USER : PL_KERNEL;
256
    v->present.ar = (flags & PAGE_WRITE) ? AR_WRITE : AR_READ;
257
    v->present.ar |= (flags & PAGE_EXEC) ? AR_EXECUTE : 0;
258
    v->present.ppn = frame >> PPN_SHIFT;
259
    v->present.ed = false;  /* exception not deffered */
260
    v->present.ps = PAGE_WIDTH;
261
    v->present.key = 0;
262
    v->present.tag.tag_word = tag;
749 jermar 263
}
1702 cejka 264
 
1888 jermar 265
/** @}
1702 cejka 266
 */