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55 jermar 1
#
2071 jermar 2
# Copyright (c) 2005 Jakub Jermar
55 jermar 3
# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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# - Redistributions of source code must retain the above copyright
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#   notice, this list of conditions and the following disclaimer.
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# - Redistributions in binary form must reproduce the above copyright
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#   notice, this list of conditions and the following disclaimer in the
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#   documentation and/or other materials provided with the distribution.
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# - The name of the author may not be used to endorse or promote products
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#   derived from this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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.text
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414 jermar 31
.global context_save_arch
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.global context_restore_arch
55 jermar 33
 
414 jermar 34
context_save_arch:
322 jermar 35
	alloc loc0 = ar.pfs, 1, 8, 0, 0
83 jermar 36
	mov loc1 = ar.unat	;;
94 jermar 37
	/* loc2 */
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	mov loc3 = ar.rsc
100 jermar 39
 
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	.auto
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42
	/*
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	 * Flush dirty registers to backing store.
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	 * After this ar.bsp and ar.bspstore are equal.
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	 */
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	flushrs
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	mov loc4 = ar.bsp	
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	/*
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	 * Put RSE to enforced lazy mode.
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	 * So that ar.rnat can be read.
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	 */
435 jermar 53
	and loc5 = ~3, loc3
100 jermar 54
	mov ar.rsc = loc5
94 jermar 55
	mov loc5 = ar.rnat
100 jermar 56
 
57
	.explicit
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94 jermar 59
	mov loc6 = ar.lc
59 jermar 60
 
94 jermar 61
	/*
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	 * Save application registers
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	 */
83 jermar 64
	st8 [in0] = loc0, 8	;;	/* save ar.pfs */
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	st8 [in0] = loc1, 8	;;	/* save ar.unat (caller) */
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	mov loc2 = in0		;;
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	add in0 = 8, in0	;;	/* skip ar.unat (callee) */
94 jermar 68
	st8 [in0] = loc3, 8	;;	/* save ar.rsc */
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	st8 [in0] = loc4, 8	;;	/* save ar.bsp */
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	st8 [in0] = loc5, 8	;;	/* save ar.rnat */
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	st8 [in0] = loc6, 8	;;	/* save ar.lc */
83 jermar 72
 
59 jermar 73
	/*
83 jermar 74
	 * Save general registers including NaT bits
82 jermar 75
	 */
83 jermar 76
	st8.spill [in0] = r1, 8		;;
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	st8.spill [in0] = r4, 8		;;
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	st8.spill [in0] = r5, 8		;;
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	st8.spill [in0] = r6, 8		;;
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	st8.spill [in0] = r7, 8		;;
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	st8.spill [in0] = r12, 8	;;	/* save sp */
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	st8.spill [in0] = r13, 8	;;
59 jermar 83
 
83 jermar 84
	mov loc3 = ar.unat		;;
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	st8 [loc2] = loc3		/* save ar.unat (callee) */
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82 jermar 87
	/*
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	 * Save branch registers
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	 */
83 jermar 90
	mov loc2 = b0		;;
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	st8 [in0] = loc2, 8		/* save pc */
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	mov loc3 = b1		;;
82 jermar 93
	st8 [in0] = loc3, 8
83 jermar 94
	mov loc4 = b2		;;
82 jermar 95
	st8 [in0] = loc4, 8
83 jermar 96
	mov loc5 = b3		;;
82 jermar 97
	st8 [in0] = loc5, 8
83 jermar 98
	mov loc6 = b4		;;
82 jermar 99
	st8 [in0] = loc6, 8
83 jermar 100
	mov loc7 = b5		;;
82 jermar 101
	st8 [in0] = loc7, 8
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	/*
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	 * Save predicate registers
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	 */
83 jermar 106
	mov loc2 = pr		;;
1124 jermar 107
	st8 [in0] = loc2, 16;; 		/* Next fpu registers should be spilled to 16B aligned address */
1053 vana 108
 
1124 jermar 109
	/*
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	 * Save floating-point registers.
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	 */
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	stf.spill [in0] = f2, 16 ;;
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	stf.spill [in0] = f3, 16 ;;
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	stf.spill [in0] = f4, 16 ;;
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	stf.spill [in0] = f5, 16 ;;
1053 vana 116
 
1124 jermar 117
	stf.spill [in0] = f16, 16 ;;
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	stf.spill [in0] = f17, 16 ;;
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	stf.spill [in0] = f18, 16 ;;
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	stf.spill [in0] = f19, 16 ;;
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	stf.spill [in0] = f20, 16 ;;
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	stf.spill [in0] = f21, 16 ;;
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	stf.spill [in0] = f22, 16 ;;
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	stf.spill [in0] = f23, 16 ;;
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	stf.spill [in0] = f24, 16 ;;
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	stf.spill [in0] = f25, 16 ;;
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	stf.spill [in0] = f26, 16 ;;
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	stf.spill [in0] = f27, 16 ;;
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	stf.spill [in0] = f28, 16 ;;
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	stf.spill [in0] = f29, 16 ;;
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	stf.spill [in0] = f30, 16 ;;
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	stf.spill [in0] = f31, 16 ;;
1053 vana 133
 
83 jermar 134
	mov ar.unat = loc1
59 jermar 135
 
136
	add r8 = r0, r0, 1 		/* context_save returns 1 */
60 jermar 137
	br.ret.sptk.many b0
55 jermar 138
 
414 jermar 139
context_restore_arch:
416 jermar 140
	alloc loc0 = ar.pfs, 1, 9, 0, 0	;;
59 jermar 141
 
94 jermar 142
	ld8 loc0 = [in0], 8	;;	/* load ar.pfs */
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	ld8 loc1 = [in0], 8	;;	/* load ar.unat (caller) */
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	ld8 loc2 = [in0], 8	;;	/* load ar.unat (callee) */
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	ld8 loc3 = [in0], 8	;;	/* load ar.rsc */
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	ld8 loc4 = [in0], 8	;;	/* load ar.bsp */
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	ld8 loc5 = [in0], 8	;;	/* load ar.rnat */
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	ld8 loc6 = [in0], 8	;;	/* load ar.lc */
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100 jermar 150
	.auto	
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59 jermar 152
	/*
100 jermar 153
	 * Invalidate the ALAT
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	 */
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	invala
156
 
157
	/*
416 jermar 158
	 * Put RSE to enforced lazy mode.
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	 * So that ar.bspstore and ar.rnat can be written.
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	 */
161
	movl loc8 = ~3
162
	and loc8 = loc3, loc8
163
	mov ar.rsc = loc8
164
 
165
	/*
166
	 * Flush dirty registers to backing store.
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	 * We do this because we want the following move
168
	 * to ar.bspstore to assign the same value to ar.bsp.
169
	 */
170
	flushrs
171
 
172
	/*
94 jermar 173
	 * Restore application registers
59 jermar 174
	 */
416 jermar 175
	mov ar.bspstore = loc4	/* rse.bspload = ar.bsp = ar.bspstore = loc4 */
100 jermar 176
	mov ar.rnat = loc5
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	mov ar.pfs = loc0
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	mov ar.rsc = loc3
179
 
180
	.explicit
181
 
83 jermar 182
	mov ar.unat = loc2	;;
94 jermar 183
	mov ar.lc = loc6
83 jermar 184
 
82 jermar 185
	/*
83 jermar 186
	 * Restore general registers including NaT bits
82 jermar 187
	 */
83 jermar 188
	ld8.fill r1 = [in0], 8	;;
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	ld8.fill r4 = [in0], 8	;;
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	ld8.fill r5 = [in0], 8	;;
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	ld8.fill r6 = [in0], 8	;;
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	ld8.fill r7 = [in0], 8	;;
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	ld8.fill r12 = [in0], 8	;;	/* restore sp */
194
	ld8.fill r13 = [in0], 8	;;
59 jermar 195
 
82 jermar 196
	/* 
197
	 * Restore branch registers
198
	 */
83 jermar 199
	ld8 loc2 = [in0], 8	;;	/* restore pc */
200
	mov b0 = loc2
82 jermar 201
	ld8 loc3 = [in0], 8	;;
83 jermar 202
	mov b1 = loc3
82 jermar 203
	ld8 loc4 = [in0], 8	;;
83 jermar 204
	mov b2 = loc4
82 jermar 205
	ld8 loc5 = [in0], 8	;;
83 jermar 206
	mov b3 = loc5
82 jermar 207
	ld8 loc6 = [in0], 8	;;
83 jermar 208
	mov b4 = loc6
82 jermar 209
	ld8 loc7 = [in0], 8	;;
83 jermar 210
	mov b5 = loc7
82 jermar 211
 
83 jermar 212
	/*
213
	 * Restore predicate registers
214
	 */
1053 vana 215
	ld8 loc2 = [in0], 16	;;
83 jermar 216
	mov pr = loc2, ~0
59 jermar 217
 
1124 jermar 218
	/*
219
	 * Restore floating-point registers.
220
	 */
221
	ldf.fill f2 = [in0], 16 ;;
222
	ldf.fill f3 = [in0], 16 ;;
223
	ldf.fill f4 = [in0], 16 ;;
224
	ldf.fill f5 = [in0], 16 ;;
1053 vana 225
 
1124 jermar 226
	ldf.fill f16 = [in0], 16 ;;
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	ldf.fill f17 = [in0], 16 ;;
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	ldf.fill f18 = [in0], 16 ;;
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	ldf.fill f19 = [in0], 16 ;;
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	ldf.fill f20 = [in0], 16 ;;
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	ldf.fill f21 = [in0], 16 ;;
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	ldf.fill f22 = [in0], 16 ;;
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	ldf.fill f23 = [in0], 16 ;;
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	ldf.fill f24 = [in0], 16 ;;
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	ldf.fill f25 = [in0], 16 ;;
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	ldf.fill f26 = [in0], 16 ;;
237
	ldf.fill f27 = [in0], 16 ;;
238
	ldf.fill f28 = [in0], 16 ;;
239
	ldf.fill f29 = [in0], 16 ;;
240
	ldf.fill f30 = [in0], 16 ;;
241
	ldf.fill f31 = [in0], 16 ;;
1053 vana 242
 
83 jermar 243
	mov ar.unat = loc1
59 jermar 244
 
245
	mov r8 = r0			/* context_restore returns 0 */
60 jermar 246
	br.ret.sptk.many b0