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35 jermar 1
/*
2071 jermar 2
 * Copyright (c) 2005 - 2006 Jakub Jermar
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 * Copyright (c) 2006 Jakub Vana
35 jermar 4
 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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/** @addtogroup ia64mm 
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 * @{
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 */
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/** @file
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 */
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1888 jermar 36
#ifndef KERN_ia64_PAGE_H_
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#define KERN_ia64_PAGE_H_
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#include <arch/mm/frame.h>
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#define PAGE_SIZE   FRAME_SIZE
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#define PAGE_WIDTH  FRAME_WIDTH
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2007 jermar 44
#define PAGE_COLOR_BITS 0           /* dummy */
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#ifdef KERNEL
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/** Bit width of the TLB-locked portion of kernel address space. */
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#define KERNEL_PAGE_WIDTH       28  /* 256M */
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#define PPN_SHIFT           12
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#define VRN_SHIFT           61
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#define VRN_MASK            (7LL << VRN_SHIFT)
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#define VA2VRN(va)          ((va)>>VRN_SHIFT)
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#ifdef __ASM__
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#define VRN_KERNEL          7
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#else
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#define VRN_KERNEL          7LL
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#endif
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747 jermar 63
#define REGION_REGISTERS        8
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#define KA2PA(x)    ((uintptr_t) (x-(VRN_KERNEL<<VRN_SHIFT)))
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#define PA2KA(x)    ((uintptr_t) (x+(VRN_KERNEL<<VRN_SHIFT)))
869 vana 67
 
2007 jermar 68
#define VHPT_WIDTH          20  /* 1M */
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#define VHPT_SIZE           (1 << VHPT_WIDTH)
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#define PTA_BASE_SHIFT          15
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749 jermar 73
/** Memory Attributes. */
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#define MA_WRITEBACK    0x0
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#define MA_UNCACHEABLE  0x4
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/** Privilege Levels. Only the most and the least privileged ones are ever used. */
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#define PL_KERNEL   0x0
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#define PL_USER     0x3
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/* Access Rigths. Only certain combinations are used by the kernel. */
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#define AR_READ     0x0
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#define AR_EXECUTE  0x1
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#define AR_WRITE    0x2
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#ifndef __ASM__
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2089 decky 88
#include <arch/mm/as.h>
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#include <arch/mm/frame.h>
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#include <arch/interrupt.h>
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#include <arch/barrier.h>
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#include <arch/mm/asid.h>
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#include <arch/types.h>
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#include <debug.h>
818 vana 95
 
747 jermar 96
struct vhpt_tag_info {
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    unsigned long long tag : 63;
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    unsigned ti : 1;
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} __attribute__ ((packed));
710 vana 100
 
747 jermar 101
union vhpt_tag {
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    struct vhpt_tag_info tag_info;
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    unsigned tag_word;
710 vana 104
};
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747 jermar 106
struct vhpt_entry_present {
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    /* Word 0 */
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    unsigned p : 1;
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    unsigned : 1;
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    unsigned ma : 3;
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    unsigned a : 1;
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    unsigned d : 1;
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    unsigned pl : 2;
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    unsigned ar : 3;
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    unsigned long long ppn : 38;
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    unsigned : 2;
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    unsigned ed : 1;
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    unsigned ig1 : 11;
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    /* Word 1 */
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    unsigned : 2;
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    unsigned ps : 6;
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    unsigned key : 24;
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    unsigned : 32;
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    /* Word 2 */
747 jermar 127
    union vhpt_tag tag;
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    /* Word 3 */                                                   
1780 jermar 130
    uint64_t ig3 : 64;
747 jermar 131
} __attribute__ ((packed));
710 vana 132
 
747 jermar 133
struct vhpt_entry_not_present {
710 vana 134
    /* Word 0 */
747 jermar 135
    unsigned p : 1;
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    unsigned long long ig0 : 52;
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    unsigned ig1 : 11;
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    /* Word 1 */
747 jermar 140
    unsigned : 2;
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    unsigned ps : 6;
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    unsigned long long ig2 : 56;
710 vana 143
 
747 jermar 144
    /* Word 2 */
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    union vhpt_tag tag;
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    /* Word 3 */                                                   
1780 jermar 148
    uint64_t ig3 : 64;
747 jermar 149
} __attribute__ ((packed));
710 vana 150
 
747 jermar 151
typedef union vhpt_entry {
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    struct vhpt_entry_present present;
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    struct vhpt_entry_not_present not_present;
1780 jermar 154
    uint64_t word[4];
792 jermar 155
} vhpt_entry_t;
710 vana 156
 
747 jermar 157
struct region_register_map {
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    unsigned ve : 1;
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    unsigned : 1;
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    unsigned ps : 6;
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    unsigned rid : 24;
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    unsigned : 32;
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} __attribute__ ((packed));
684 jermar 164
 
747 jermar 165
typedef union region_register {
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    struct region_register_map map;
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    unsigned long long word;
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} region_register;
715 vana 169
 
747 jermar 170
struct pta_register_map {
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    unsigned ve : 1;
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    unsigned : 1;
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    unsigned size : 6;
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    unsigned vf : 1;
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    unsigned : 6;
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    unsigned long long base : 49;
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} __attribute__ ((packed));
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179
typedef union pta_register {
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    struct pta_register_map map;
1780 jermar 181
    uint64_t word;
747 jermar 182
} pta_register;
183
 
184
/** Return Translation Hashed Entry Address.
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 *
186
 * VRN bits are used to read RID (ASID) from one
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 * of the eight region registers registers.
188
 *
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 * @param va Virtual address including VRN bits.
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 *
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 * @return Address of the head of VHPT collision chain.
192
 */
1780 jermar 193
static inline uint64_t thash(uint64_t va)
715 vana 194
{
1780 jermar 195
    uint64_t ret;
715 vana 196
 
2082 decky 197
    asm volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va));
715 vana 198
 
747 jermar 199
    return ret;
200
}
201
 
202
/** Return Translation Hashed Entry Tag.
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 *
204
 * VRN bits are used to read RID (ASID) from one
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 * of the eight region registers.
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 *
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 * @param va Virtual address including VRN bits.
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 *
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 * @return The unique tag for VPN and RID in the collision chain returned by thash().
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 */
1780 jermar 211
static inline uint64_t ttag(uint64_t va)
715 vana 212
{
1780 jermar 213
    uint64_t ret;
715 vana 214
 
2082 decky 215
    asm volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va));
747 jermar 216
 
217
    return ret;
218
}
219
 
220
/** Read Region Register.
221
 *
222
 * @param i Region register index.
223
 *
224
 * @return Current contents of rr[i].
225
 */
1780 jermar 226
static inline uint64_t rr_read(index_t i)
715 vana 227
{
1780 jermar 228
    uint64_t ret;
748 jermar 229
    ASSERT(i < REGION_REGISTERS);
2082 decky 230
    asm volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i << VRN_SHIFT));
747 jermar 231
    return ret;
232
}
715 vana 233
 
747 jermar 234
/** Write Region Register.
235
 *
236
 * @param i Region register index.
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 * @param v Value to be written to rr[i].
238
 */
1780 jermar 239
static inline void rr_write(index_t i, uint64_t v)
715 vana 240
{
748 jermar 241
    ASSERT(i < REGION_REGISTERS);
2082 decky 242
    asm volatile (
901 jermar 243
        "mov rr[%0] = %1\n"
244
        :
245
        : "r" (i << VRN_SHIFT), "r" (v)
246
    );
747 jermar 247
}
248
 
249
/** Read Page Table Register.
250
 *
251
 * @return Current value stored in PTA.
252
 */
1780 jermar 253
static inline uint64_t pta_read(void)
747 jermar 254
{
1780 jermar 255
    uint64_t ret;
747 jermar 256
 
2082 decky 257
    asm volatile ("mov %0 = cr.pta\n" : "=r" (ret));
747 jermar 258
 
259
    return ret;
260
}
715 vana 261
 
747 jermar 262
/** Write Page Table Register.
263
 *
264
 * @param v New value to be stored in PTA.
265
 */
1780 jermar 266
static inline void pta_write(uint64_t v)
747 jermar 267
{
2082 decky 268
    asm volatile ("mov cr.pta = %0\n" : : "r" (v));
747 jermar 269
}
715 vana 270
 
747 jermar 271
extern void page_arch_init(void);
272
 
1780 jermar 273
extern vhpt_entry_t *vhpt_hash(uintptr_t page, asid_t asid);
274
extern bool vhpt_compare(uintptr_t page, asid_t asid, vhpt_entry_t *v);
275
extern void vhpt_set_record(vhpt_entry_t *v, uintptr_t page, asid_t asid, uintptr_t frame, int flags);
792 jermar 276
 
967 palkovsky 277
#endif /* __ASM__ */
869 vana 278
 
967 palkovsky 279
#endif /* KERNEL */
280
 
869 vana 281
#endif
1702 cejka 282
 
1780 jermar 283
/** @}
1702 cejka 284
 */