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52 vana 1 
/*
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 * Copyright (c) 2005 Jakub Vana
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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/** @addtogroup ia32   
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 * @{
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 */
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/** @file
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 *
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 */
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#include <fpu_context.h>
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#include <arch.h>
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#include <cpu.h>
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typedef void (*fpu_context_function)(fpu_context_t *fctx);
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static fpu_context_function fpu_save, fpu_restore;
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static void fpu_context_f_save(fpu_context_t *fctx)
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{
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    __asm__ volatile (
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        "fnsave %0"
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        : "=m"(*fctx)
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        );
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}
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static void fpu_context_f_restore(fpu_context_t *fctx)
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{
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    __asm__ volatile (
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        "frstor %0"
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        : "=m"(*fctx)
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        );
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}
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static void fpu_context_fx_save(fpu_context_t *fctx)
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{
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    __asm__ volatile (
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        "fxsave %0"
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        : "=m"(*fctx)
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        );
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}
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static void fpu_context_fx_restore(fpu_context_t *fctx)
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{
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    __asm__ volatile (
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        "fxrstor %0"
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        : "=m"(*fctx)
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        );
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}
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/*
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    Setup using fxsr instruction
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*/
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void fpu_fxsr(void)
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{
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    fpu_save=fpu_context_fx_save;
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    fpu_restore=fpu_context_fx_restore;
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}
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/*
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    Setup using not fxsr instruction
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*/
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void fpu_fsr(void)
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{
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    fpu_save = fpu_context_f_save;
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    fpu_restore = fpu_context_f_restore;
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}
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void fpu_context_save(fpu_context_t *fctx)
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{
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    fpu_save(fctx);
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}
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void fpu_context_restore(fpu_context_t *fctx)
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{
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    fpu_restore(fctx);
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}
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void fpu_init()
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{
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    uint32_t help0 = 0, help1 = 0;
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    __asm__ volatile (
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        "fninit;\n"
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        "stmxcsr %0\n"
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        "mov %0,%1;\n"
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        "or %2,%1;\n"
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        "mov %1,%0;\n"
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        "ldmxcsr %0;\n"
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        : "+m" (help0), "+r" (help1)
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        : "i" (0x1f80)
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    );
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}
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/** @}
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 */