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1 jermar 1
/*
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 * Copyright (c) 2001-2004 Jakub Jermar
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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/** @addtogroup ia32
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 * @{
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 */
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/** @file
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 */
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#ifndef KERN_ia32_CPUID_H_
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#define KERN_ia32_CPUID_H_
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#define INTEL_CPUID_LEVEL     0x00000000
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#define INTEL_CPUID_STANDARD  0x00000001
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#define INTEL_PSE             3
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#define INTEL_SEP             11
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#ifndef __ASM__
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#include <arch/types.h>
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typedef struct {
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    uint32_t cpuid_eax;
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    uint32_t cpuid_ebx;
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    uint32_t cpuid_ecx;
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    uint32_t cpuid_edx;
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} __attribute__ ((packed)) cpu_info_t;
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struct __cpuid_extended_feature_info {
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    unsigned sse3 :  1;
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    unsigned      : 31;
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} __attribute__ ((packed));
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typedef union cpuid_extended_feature_info {
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    struct __cpuid_extended_feature_info bits;
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    uint32_t word;
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} cpuid_extended_feature_info;
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struct __cpuid_feature_info {
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    unsigned            : 23;
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    unsigned mmx  :  1;
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    unsigned fxsr :  1;
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    unsigned sse  :  1;
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    unsigned sse2 :  1;
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    unsigned      :  5;
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} __attribute__ ((packed));
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typedef union cpuid_feature_info {
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    struct __cpuid_feature_info bits;
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    uint32_t word;
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} cpuid_feature_info;
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static inline uint32_t has_cpuid(void)
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{
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    uint32_t val, ret;
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    asm volatile (
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        "pushf\n"                    /* read flags */
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        "popl %[ret]\n"
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        "movl %[ret], %[val]\n"
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        "btcl $21, %[val]\n"         /* swap the ID bit */
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        "pushl %[val]\n"             /* propagate the change into flags */
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        "popf\n"
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        "pushf\n"
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        "popl %[val]\n"
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        "andl $(1 << 21), %[ret]\n"  /* interrested only in ID bit */
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        "andl $(1 << 21), %[val]\n"
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        "xorl %[val], %[ret]\n"
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        : [ret] "=r" (ret), [val] "=r" (val)
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    );
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    return ret;
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}
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static inline void cpuid(uint32_t cmd, cpu_info_t *info)
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{
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    asm volatile (
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        "cpuid\n"
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        : "=a" (info->cpuid_eax), "=b" (info->cpuid_ebx),
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          "=c" (info->cpuid_ecx), "=d" (info->cpuid_edx)
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        : "a" (cmd)
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    );
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}
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#endif /* !def __ASM__ */
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#endif
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/** @}
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 */