Subversion Repositories HelenOS

Rev

Rev 4016 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed

Rev Author Line No. Line
1 jermar 1
/*
2071 jermar 2
 * Copyright (c) 2001-2004 Jakub Jermar
1 jermar 3
 * All rights reserved.
4
 *
5
 * Redistribution and use in source and binary forms, with or without
6
 * modification, are permitted provided that the following conditions
7
 * are met:
8
 *
9
 * - Redistributions of source code must retain the above copyright
10
 *   notice, this list of conditions and the following disclaimer.
11
 * - Redistributions in binary form must reproduce the above copyright
12
 *   notice, this list of conditions and the following disclaimer in the
13
 *   documentation and/or other materials provided with the distribution.
14
 * - The name of the author may not be used to endorse or promote products
15
 *   derived from this software without specific prior written permission.
16
 *
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
 */
28
 
4016 decky 29
/** @addtogroup ia32
1702 cejka 30
 * @{
31
 */
32
/** @file
33
 */
34
 
1888 jermar 35
#ifndef KERN_ia32_ATOMIC_H_
36
#define KERN_ia32_ATOMIC_H_
1 jermar 37
 
38
#include <arch/types.h>
1100 palkovsky 39
#include <arch/barrier.h>
40
#include <preemption.h>
1 jermar 41
 
475 jermar 42
static inline void atomic_inc(atomic_t *val) {
458 decky 43
#ifdef CONFIG_SMP
4016 decky 44
    asm volatile (
45
        "lock incl %[count]\n"
46
        : [count] "+m" (val->count)
47
    );
115 jermar 48
#else
4016 decky 49
    asm volatile (
50
        "incl %[count]\n"
51
        : [count] "+m" (val->count)
52
    );
458 decky 53
#endif /* CONFIG_SMP */
115 jermar 54
}
1 jermar 55
 
475 jermar 56
static inline void atomic_dec(atomic_t *val) {
458 decky 57
#ifdef CONFIG_SMP
4016 decky 58
    asm volatile (
59
        "lock decl %[count]\n"
60
        : [count] "+m" (val->count)
61
    );
115 jermar 62
#else
4016 decky 63
    asm volatile (
64
        "decl %[count]\n"
4133 svoboda 65
        : [count] "+m" (val->count)
4016 decky 66
    );
458 decky 67
#endif /* CONFIG_SMP */
115 jermar 68
}
69
 
1104 jermar 70
static inline long atomic_postinc(atomic_t *val)
477 vana 71
{
1691 palkovsky 72
    long r = 1;
4016 decky 73
 
2082 decky 74
    asm volatile (
4016 decky 75
        "lock xaddl %[r], %[count]\n"
76
        : [count] "+m" (val->count), [r] "+r" (r)
477 vana 77
    );
4016 decky 78
 
477 vana 79
    return r;
80
}
81
 
1104 jermar 82
static inline long atomic_postdec(atomic_t *val)
477 vana 83
{
1691 palkovsky 84
    long r = -1;
627 jermar 85
 
2082 decky 86
    asm volatile (
4016 decky 87
        "lock xaddl %[r], %[count]\n"
88
        : [count] "+m" (val->count), [r] "+r"(r)
477 vana 89
    );
627 jermar 90
 
477 vana 91
    return r;
92
}
93
 
4016 decky 94
#define atomic_preinc(val)  (atomic_postinc(val) + 1)
95
#define atomic_predec(val)  (atomic_postdec(val) - 1)
477 vana 96
 
1780 jermar 97
static inline uint32_t test_and_set(atomic_t *val) {
98
    uint32_t v;
115 jermar 99
 
2082 decky 100
    asm volatile (
4016 decky 101
        "movl $1, %[v]\n"
102
        "xchgl %[v], %[count]\n"
103
        : [v] "=r" (v), [count] "+m" (val->count)
115 jermar 104
    );
105
 
106
    return v;
107
}
108
 
1104 jermar 109
/** ia32 specific fast spinlock */
1100 palkovsky 110
static inline void atomic_lock_arch(atomic_t *val)
111
{
1780 jermar 112
    uint32_t tmp;
4016 decky 113
 
1100 palkovsky 114
    preemption_disable();
2082 decky 115
    asm volatile (
3164 jermar 116
        "0:\n"
1100 palkovsky 117
#ifdef CONFIG_HT
4016 decky 118
        "pause\n"        /* Pentium 4's HT love this instruction */
1100 palkovsky 119
#endif
4016 decky 120
        "mov %[count], %[tmp]\n"
121
        "testl %[tmp], %[tmp]\n"
3164 jermar 122
        "jnz 0b\n"       /* lightweight looping on locked spinlock */
1100 palkovsky 123
 
4016 decky 124
        "incl %[tmp]\n"  /* now use the atomic operation */
125
        "xchgl %[count], %[tmp]\n"
126
        "testl %[tmp], %[tmp]\n"
3164 jermar 127
        "jnz 0b\n"
4016 decky 128
        : [count] "+m" (val->count), [tmp] "=&r" (tmp)
3164 jermar 129
    );
1100 palkovsky 130
    /*
131
     * Prevent critical section code from bleeding out this way up.
132
     */
133
    CS_ENTER_BARRIER();
134
}
1 jermar 135
 
136
#endif
1702 cejka 137
 
1888 jermar 138
/** @}
1702 cejka 139
 */