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| Rev | Author | Line No. | Line |
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| 1 | jermar | 1 | /* |
| 2071 | jermar | 2 | * Copyright (c) 2001-2004 Jakub Jermar |
| 1 | jermar | 3 | * All rights reserved. |
| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 1888 | jermar | 29 | /** @addtogroup ia32 |
| 1702 | cejka | 30 | * @{ |
| 31 | */ |
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| 32 | /** @file |
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| 33 | */ |
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| 34 | |||
| 1888 | jermar | 35 | #ifndef KERN_ia32_ATOMIC_H_ |
| 36 | #define KERN_ia32_ATOMIC_H_ |
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| 1 | jermar | 37 | |
| 38 | #include <arch/types.h> |
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| 1100 | palkovsky | 39 | #include <arch/barrier.h> |
| 40 | #include <preemption.h> |
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| 1 | jermar | 41 | |
| 475 | jermar | 42 | static inline void atomic_inc(atomic_t *val) { |
| 458 | decky | 43 | #ifdef CONFIG_SMP |
| 2082 | decky | 44 | asm volatile ("lock incl %0\n" : "=m" (val->count)); |
| 115 | jermar | 45 | #else |
| 2082 | decky | 46 | asm volatile ("incl %0\n" : "=m" (val->count)); |
| 458 | decky | 47 | #endif /* CONFIG_SMP */ |
| 115 | jermar | 48 | } |
| 1 | jermar | 49 | |
| 475 | jermar | 50 | static inline void atomic_dec(atomic_t *val) { |
| 458 | decky | 51 | #ifdef CONFIG_SMP |
| 2082 | decky | 52 | asm volatile ("lock decl %0\n" : "=m" (val->count)); |
| 115 | jermar | 53 | #else |
| 2082 | decky | 54 | asm volatile ("decl %0\n" : "=m" (val->count)); |
| 458 | decky | 55 | #endif /* CONFIG_SMP */ |
| 115 | jermar | 56 | } |
| 57 | |||
| 1104 | jermar | 58 | static inline long atomic_postinc(atomic_t *val) |
| 477 | vana | 59 | { |
| 1691 | palkovsky | 60 | long r = 1; |
| 627 | jermar | 61 | |
| 2082 | decky | 62 | asm volatile ( |
| 1691 | palkovsky | 63 | "lock xaddl %1, %0\n" |
| 1697 | palkovsky | 64 | : "=m" (val->count), "+r" (r) |
| 477 | vana | 65 | ); |
| 627 | jermar | 66 | |
| 477 | vana | 67 | return r; |
| 68 | } |
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| 69 | |||
| 1104 | jermar | 70 | static inline long atomic_postdec(atomic_t *val) |
| 477 | vana | 71 | { |
| 1691 | palkovsky | 72 | long r = -1; |
| 627 | jermar | 73 | |
| 2082 | decky | 74 | asm volatile ( |
| 1691 | palkovsky | 75 | "lock xaddl %1, %0\n" |
| 1697 | palkovsky | 76 | : "=m" (val->count), "+r"(r) |
| 477 | vana | 77 | ); |
| 627 | jermar | 78 | |
| 477 | vana | 79 | return r; |
| 80 | } |
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| 81 | |||
| 1024 | jermar | 82 | #define atomic_preinc(val) (atomic_postinc(val)+1) |
| 83 | #define atomic_predec(val) (atomic_postdec(val)-1) |
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| 477 | vana | 84 | |
| 1780 | jermar | 85 | static inline uint32_t test_and_set(atomic_t *val) { |
| 86 | uint32_t v; |
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| 115 | jermar | 87 | |
| 2082 | decky | 88 | asm volatile ( |
| 115 | jermar | 89 | "movl $1, %0\n" |
| 259 | palkovsky | 90 | "xchgl %0, %1\n" |
| 625 | palkovsky | 91 | : "=r" (v),"=m" (val->count) |
| 115 | jermar | 92 | ); |
| 93 | |||
| 94 | return v; |
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| 95 | } |
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| 96 | |||
| 1104 | jermar | 97 | /** ia32 specific fast spinlock */ |
| 1100 | palkovsky | 98 | static inline void atomic_lock_arch(atomic_t *val) |
| 99 | { |
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| 1780 | jermar | 100 | uint32_t tmp; |
| 115 | jermar | 101 | |
| 1100 | palkovsky | 102 | preemption_disable(); |
| 2082 | decky | 103 | asm volatile ( |
| 1100 | palkovsky | 104 | "0:;" |
| 105 | #ifdef CONFIG_HT |
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| 106 | "pause;" /* Pentium 4's HT love this instruction */ |
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| 107 | #endif |
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| 108 | "mov %0, %1;" |
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| 109 | "testl %1, %1;" |
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| 1104 | jermar | 110 | "jnz 0b;" /* Lightweight looping on locked spinlock */ |
| 1100 | palkovsky | 111 | |
| 112 | "incl %1;" /* now use the atomic operation */ |
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| 113 | "xchgl %0, %1;" |
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| 114 | "testl %1, %1;" |
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| 115 | "jnz 0b;" |
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| 116 | : "=m"(val->count),"=r"(tmp) |
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| 117 | ); |
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| 118 | /* |
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| 119 | * Prevent critical section code from bleeding out this way up. |
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| 120 | */ |
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| 121 | CS_ENTER_BARRIER(); |
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| 122 | } |
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| 1 | jermar | 123 | |
| 124 | #endif |
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| 1702 | cejka | 125 | |
| 1888 | jermar | 126 | /** @} |
| 1702 | cejka | 127 | */ |