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/*
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 * Copyright (c) 2007 Michal Kebrt
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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/** @addtogroup arm32mm
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 * @{
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 */
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/** @file
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 */
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#include <mm/tlb.h>
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#include <arch/mm/asid.h>
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#include <arch/asm.h>
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#include <arch/types.h>
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#include <arch/mm/page.h>
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/** Invalidate all entries in TLB. */
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void tlb_invalidate_all(void)
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{
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    asm volatile (
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        "eor r1, r1\n"
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        "MCR p15, 0, r1, c8, c7, 0\n" // see ARM Architecture reference relE 3.7.7 p.528
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        ::: "r1"
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    );
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}
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/** Invalidate all entries in TLB that belong to specified address space.
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 *
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 * @param asid This parameter is ignored as the ARM architecture doesn't support it.
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 */
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void tlb_invalidate_asid(asid_t asid)
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{
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    tlb_invalidate_all();
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}
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/** Invalidate single entry in TLB
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 *
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 * @param page Virtual adress of the page
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 */
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static inline void invalidate_page(uintptr_t page)
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{
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    asm volatile (
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        "MCR p15, 0, %0, c8, c7, 1"
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        : /* no output */
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        : "r"(page) /* input */
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    );
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}
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/** Invalidate TLB entries for specified page range belonging to specified address space.
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 *
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 * @param asid This parameter is ignored as the ARM architecture doesn't support it.
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 * @param page Address of the first page whose entry is to be invalidated.
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 * @param cnt Number of entries to invalidate.
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 */
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void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)
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{
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    unsigned int i;
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    for (i = 0; i < cnt; i++)
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        invalidate_page(page + i * PAGE_SIZE);
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}
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/** @}
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 */