Subversion Repositories HelenOS

Rev

Rev 1303 | Rev 1474 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed

Rev Author Line No. Line
206 palkovsky 1
/*
2
 * Copyright (C) 2005 Ondrej Palkovsky
3
 * All rights reserved.
4
 *
5
 * Redistribution and use in source and binary forms, with or without
6
 * modification, are permitted provided that the following conditions
7
 * are met:
8
 *
9
 * - Redistributions of source code must retain the above copyright
10
 *   notice, this list of conditions and the following disclaimer.
11
 * - Redistributions in binary form must reproduce the above copyright
12
 *   notice, this list of conditions and the following disclaimer in the
13
 *   documentation and/or other materials provided with the distribution.
14
 * - The name of the author may not be used to endorse or promote products
15
 *   derived from this software without specific prior written permission.
16
 *
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
 */
28
 
29
#include <arch.h>
30
 
31
#include <arch/types.h>
32
 
33
#include <config.h>
34
 
1112 palkovsky 35
#include <proc/thread.h>
1473 decky 36
#include <arch/drivers/ega.h>
1289 vana 37
#include <arch/vesa.h>
894 jermar 38
#include <genarch/i8042/i8042.h>
206 palkovsky 39
#include <arch/i8254.h>
40
#include <arch/i8259.h>
41
 
42
#include <arch/bios/bios.h>
242 palkovsky 43
#include <arch/mm/memory_init.h>
251 palkovsky 44
#include <arch/cpu.h>
45
#include <print.h>
46
#include <arch/cpuid.h>
452 decky 47
#include <genarch/acpi/acpi.h>
282 palkovsky 48
#include <panic.h>
576 palkovsky 49
#include <interrupt.h>
803 palkovsky 50
#include <arch/syscall.h>
1072 palkovsky 51
#include <arch/debugger.h>
1112 palkovsky 52
#include <syscall/syscall.h>
206 palkovsky 53
 
1112 palkovsky 54
 
799 palkovsky 55
/** Disable I/O on non-privileged levels
56
 *
57
 * Clean IOPL(12,13) and NT(14) flags in EFLAGS register
58
 */
59
static void clean_IOPL_NT_flags(void)
60
{
61
    asm
62
    (
63
        "pushfq;"
64
        "pop %%rax;"
65
        "and $~(0x7000),%%rax;"
66
        "pushq %%rax;"
67
        "popfq;"
68
        :
69
        :
70
        :"%rax"
71
    );
72
}
73
 
74
/** Disable alignment check
75
 *
76
 * Clean AM(18) flag in CR0 register
77
 */
78
static void clean_AM_flag(void)
79
{
80
    asm
81
    (
82
        "mov %%cr0,%%rax;"
83
        "and $~(0x40000),%%rax;"
84
        "mov %%rax,%%cr0;"
85
        :
86
        :
87
        :"%rax"
88
    );
89
}
90
 
206 palkovsky 91
void arch_pre_mm_init(void)
92
{
251 palkovsky 93
    struct cpu_info cpuid_s;
94
 
95
    cpuid(AMD_CPUID_EXTENDED,&cpuid_s);
282 palkovsky 96
    if (! (cpuid_s.cpuid_edx & (1<<AMD_EXT_NOEXECUTE)))
97
        panic("Processor does not support No-execute pages.\n");
98
 
99
    cpuid(INTEL_CPUID_STANDARD,&cpuid_s);
100
    if (! (cpuid_s.cpuid_edx & (1<<INTEL_FXSAVE)))
101
        panic("Processor does not support FXSAVE/FXRESTORE.\n");
102
 
103
    if (! (cpuid_s.cpuid_edx & (1<<INTEL_SSE2)))
104
        panic("Processor does not support SSE2 instructions.\n");
105
 
106
    /* Enable No-execute pages */
251 palkovsky 107
    set_efer_flag(AMD_NXE_FLAG);
282 palkovsky 108
    /* Enable FPU */
109
    cpu_setup_fpu();
803 palkovsky 110
 
799 palkovsky 111
    /* Initialize segmentation */
206 palkovsky 112
    pm_init();
113
 
799 palkovsky 114
        /* Disable I/O on nonprivileged levels
115
     * clear the NT(nested-thread) flag
116
     */
117
    clean_IOPL_NT_flags();
118
    /* Disable alignment check */
119
    clean_AM_flag();
120
 
206 palkovsky 121
    if (config.cpu_active == 1) {
122
        bios_init();
123
        i8259_init();   /* PIC */
124
        i8254_init();   /* hard clock */
125
 
458 decky 126
        #ifdef CONFIG_SMP
576 palkovsky 127
        exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown",
128
                 tlb_shootdown_ipi);
458 decky 129
        #endif /* CONFIG_SMP */
206 palkovsky 130
    }
131
}
132
 
133
void arch_post_mm_init(void)
134
{
135
    if (config.cpu_active == 1) {
1289 vana 136
#ifdef CONFIG_FB
1303 palkovsky 137
        if (vesa_present())
138
            vesa_init();
139
        else
1289 vana 140
#endif
1303 palkovsky 141
            ega_init(); /* video */
1072 palkovsky 142
        /* Enable debugger */
143
        debugger_init();
1303 palkovsky 144
        /* Merge all memory zones to 1 big zone */
145
        zone_merge_all();
206 palkovsky 146
    }
803 palkovsky 147
    /* Setup fast SYSCALL/SYSRET */
148
    syscall_setup_cpu();
1072 palkovsky 149
 
206 palkovsky 150
}
242 palkovsky 151
 
503 jermar 152
void arch_pre_smp_init(void)
242 palkovsky 153
{
154
    if (config.cpu_active == 1) {
155
        memory_print_map();
156
 
458 decky 157
        #ifdef CONFIG_SMP
242 palkovsky 158
        acpi_init();
458 decky 159
        #endif /* CONFIG_SMP */
242 palkovsky 160
    }
161
}
162
 
503 jermar 163
void arch_post_smp_init(void)
164
{
894 jermar 165
    i8042_init();   /* keyboard controller */
503 jermar 166
}
167
 
242 palkovsky 168
void calibrate_delay_loop(void)
169
{
170
    i8254_calibrate_delay_loop();
171
    i8254_normal_operation();
172
}
1112 palkovsky 173
 
1121 jermar 174
/** Set thread-local-storage pointer
1112 palkovsky 175
 *
176
 * TLS pointer is set in FS register. Unfortunately the 64-bit
177
 * part can be set only in CPL0 mode.
178
 *
1121 jermar 179
 * The specs say, that on %fs:0 there is stored contents of %fs register,
1112 palkovsky 180
 * we need not to go to CPL0 to read it.
181
 */
182
__native sys_tls_set(__native addr)
183
{
1184 jermar 184
    THREAD->arch.tls = addr;
1112 palkovsky 185
    write_msr(AMD_MSR_FS, addr);
186
    return 0;
187
}