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1882 jermar 1
/*
2071 jermar 2
 * Copyright (c) 2006 Jakub Jermar
1882 jermar 3
 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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/** @addtogroup sparc64
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 * @{
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 */
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/** @file
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 *
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 */
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#include <fpu_context.h>
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#include <arch/register.h>
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#include <arch/asm.h>
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void fpu_context_save(fpu_context_t *fctx)
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{
2082 decky 42
    asm volatile (
1884 jermar 43
        "std %%f0, %0\n"
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        "std %%f2, %1\n"
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        "std %%f4, %2\n"
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        "std %%f6, %3\n"
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        "std %%f8, %4\n"
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        "std %%f10, %5\n"
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        "std %%f12, %6\n"
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        "std %%f14, %7\n"
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        "std %%f16, %8\n"
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        "std %%f18, %9\n"
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        "std %%f20, %10\n"
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        "std %%f22, %11\n"
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        "std %%f24, %12\n"
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        "std %%f26, %13\n"
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        "std %%f28, %14\n"
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        "std %%f30, %15\n"
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        : "=m" (fctx->d[0]), "=m" (fctx->d[1]), "=m" (fctx->d[2]), "=m" (fctx->d[3]),
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          "=m" (fctx->d[4]), "=m" (fctx->d[5]), "=m" (fctx->d[6]), "=m" (fctx->d[7]),
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          "=m" (fctx->d[8]), "=m" (fctx->d[9]), "=m" (fctx->d[10]), "=m" (fctx->d[11]),
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          "=m" (fctx->d[12]), "=m" (fctx->d[13]), "=m" (fctx->d[14]), "=m" (fctx->d[15])
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    );
1882 jermar 64
 
1884 jermar 65
    /*
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     * We need to split loading of the floating-point registers because
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     * GCC (4.1.1) can't handle more than 30 operands in one asm statement.
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     */
1882 jermar 69
 
2082 decky 70
    asm volatile (
1884 jermar 71
        "std %%f32, %0\n"
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        "std %%f34, %1\n"
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        "std %%f36, %2\n"
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        "std %%f38, %3\n"
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        "std %%f40, %4\n"
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        "std %%f42, %5\n"
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        "std %%f44, %6\n"
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        "std %%f46, %7\n"
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        "std %%f48, %8\n"
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        "std %%f50, %9\n"
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        "std %%f52, %10\n"
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        "std %%f54, %11\n"
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        "std %%f56, %12\n"
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        "std %%f58, %13\n"
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        "std %%f60, %14\n"
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        "std %%f62, %15\n"
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        : "=m" (fctx->d[16]), "=m" (fctx->d[17]), "=m" (fctx->d[18]), "=m" (fctx->d[19]),
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          "=m" (fctx->d[20]), "=m" (fctx->d[21]), "=m" (fctx->d[22]), "=m" (fctx->d[23]),
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          "=m" (fctx->d[24]), "=m" (fctx->d[25]), "=m" (fctx->d[26]), "=m" (fctx->d[27]),
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          "=m" (fctx->d[28]), "=m" (fctx->d[29]), "=m" (fctx->d[30]), "=m" (fctx->d[31])
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    );
1882 jermar 92
 
2082 decky 93
    asm volatile ("stx %%fsr, %0\n" : "=m" (fctx->fsr));
1882 jermar 94
}
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void fpu_context_restore(fpu_context_t *fctx)
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{
2082 decky 98
    asm volatile (
1882 jermar 99
        "ldd %0, %%f0\n"
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        "ldd %1, %%f2\n"
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        "ldd %2, %%f4\n"
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        "ldd %3, %%f6\n"
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        "ldd %4, %%f8\n"
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        "ldd %5, %%f10\n"
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        "ldd %6, %%f12\n"
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        "ldd %7, %%f14\n"
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        "ldd %8, %%f16\n"
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        "ldd %9, %%f18\n"
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        "ldd %10, %%f20\n"
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        "ldd %11, %%f22\n"
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        "ldd %12, %%f24\n"
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        "ldd %13, %%f26\n"
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        "ldd %14, %%f28\n"
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        "ldd %15, %%f30\n"
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        :
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        : "m" (fctx->d[0]), "m" (fctx->d[1]), "m" (fctx->d[2]), "m" (fctx->d[3]),
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          "m" (fctx->d[4]), "m" (fctx->d[5]), "m" (fctx->d[6]), "m" (fctx->d[7]),
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          "m" (fctx->d[8]), "m" (fctx->d[9]), "m" (fctx->d[10]), "m" (fctx->d[11]),
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          "m" (fctx->d[12]), "m" (fctx->d[13]), "m" (fctx->d[14]), "m" (fctx->d[15])
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    );
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122
    /*
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     * We need to split loading of the floating-point registers because
124
     * GCC (4.1.1) can't handle more than 30 operands in one asm statement.
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     */
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2082 decky 127
    asm volatile (
1882 jermar 128
        "ldd %0, %%f32\n"
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        "ldd %1, %%f34\n"
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        "ldd %2, %%f36\n"
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        "ldd %3, %%f38\n"
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        "ldd %4, %%f40\n"
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        "ldd %5, %%f42\n"
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        "ldd %6, %%f44\n"
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        "ldd %7, %%f46\n"
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        "ldd %8, %%f48\n"
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        "ldd %9, %%f50\n"
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        "ldd %10, %%f52\n"
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        "ldd %11, %%f54\n"
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        "ldd %12, %%f56\n"
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        "ldd %13, %%f58\n"
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        "ldd %14, %%f60\n"
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        "ldd %15, %%f62\n"
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        :
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        : "m" (fctx->d[16]), "m" (fctx->d[17]), "m" (fctx->d[18]), "m" (fctx->d[19]),
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          "m" (fctx->d[20]), "m" (fctx->d[21]), "m" (fctx->d[22]), "m" (fctx->d[23]),
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          "m" (fctx->d[24]), "m" (fctx->d[25]), "m" (fctx->d[26]), "m" (fctx->d[27]),
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          "m" (fctx->d[28]), "m" (fctx->d[29]), "m" (fctx->d[30]), "m" (fctx->d[31])
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    );
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2082 decky 151
    asm volatile ("ldx %0, %%fsr\n" : : "m" (fctx->fsr));
1882 jermar 152
}
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154
void fpu_enable(void)
155
{
156
    pstate_reg_t pstate;
157
 
158
    pstate.value = pstate_read();
159
    pstate.pef = true;
160
    pstate_write(pstate.value);
161
}
162
 
163
void fpu_disable(void)
164
{
165
    pstate_reg_t pstate;
166
 
167
    pstate.value = pstate_read();
168
    pstate.pef = false;
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    pstate_write(pstate.value);
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}
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172
void fpu_init(void)
173
{
174
    fpu_enable();
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}
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/** @}
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 */