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1809 decky 1
/*
2071 jermar 2
 * Copyright (c) 2006 Martin Decky
1809 decky 3
 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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1952 jermar 29
/** @addtogroup ia32xen_mm 
1809 decky 30
 * @{
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 */
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/** @file
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 */
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1952 jermar 35
#ifndef KERN_ia32xen_PAGE_H_
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#define KERN_ia32xen_PAGE_H_
1809 decky 37
 
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#include <arch/mm/frame.h>
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#define PAGE_WIDTH  FRAME_WIDTH
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#define PAGE_SIZE   FRAME_SIZE
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2007 jermar 43
#define PAGE_COLOR_BITS 0           /* dummy */
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1809 decky 45
#ifdef KERNEL
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#ifndef __ASM__
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#   define KA2PA(x) (((uintptr_t) (x)) - 0x80000000)
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#   define PA2KA(x) (((uintptr_t) (x)) + 0x80000000)
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#else
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#   define KA2PA(x) ((x) - 0x80000000)
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#   define PA2KA(x) ((x) + 0x80000000)
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#endif
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/*
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 * Implementation of generic 4-level page table interface.
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 * IA-32 has 2-level page tables, so PTL1 and PTL2 are left out.
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 */
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#define PTL0_ENTRIES_ARCH   1024
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#define PTL1_ENTRIES_ARCH   0
61
#define PTL2_ENTRIES_ARCH   0
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#define PTL3_ENTRIES_ARCH   1024
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1821 decky 64
#define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 22) & 0x3ff)
1809 decky 65
#define PTL1_INDEX_ARCH(vaddr)  0
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#define PTL2_INDEX_ARCH(vaddr)  0
1821 decky 67
#define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 12) & 0x3ff)
1809 decky 68
 
1824 decky 69
#define GET_PTL1_ADDRESS_ARCH(ptl0, i)      ((pte_t *) MA2PA((((pte_t *) (ptl0))[(i)].frame_address) << 12))
1809 decky 70
#define GET_PTL2_ADDRESS_ARCH(ptl1, i)      (ptl1)
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#define GET_PTL3_ADDRESS_ARCH(ptl2, i)      (ptl2)
1824 decky 72
#define GET_FRAME_ADDRESS_ARCH(ptl3, i)     ((uintptr_t) MA2PA((((pte_t *) (ptl3))[(i)].frame_address) << 12))
1809 decky 73
 
1821 decky 74
#define SET_PTL0_ADDRESS_ARCH(ptl0) { \
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    mmuext_op_t mmu_ext; \
1824 decky 76
    \
1821 decky 77
    mmu_ext.cmd = MMUEXT_NEW_BASEPTR; \
1824 decky 78
    mmu_ext.mfn = ADDR2PFN(PA2MA(ptl0)); \
2017 decky 79
    ASSERT(xen_mmuext_op(&mmu_ext, 1, NULL, DOMID_SELF) == 0); \
1821 decky 80
}
1824 decky 81
 
1821 decky 82
#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) { \
2017 decky 83
    mmuext_op_t mmu_ext; \
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    \
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    mmu_ext.cmd = MMUEXT_PIN_L1_TABLE; \
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    mmu_ext.mfn = ADDR2PFN(PA2MA(a)); \
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    ASSERT(xen_mmuext_op(&mmu_ext, 1, NULL, DOMID_SELF) == 0); \
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    \
1821 decky 89
    mmu_update_t update; \
1824 decky 90
    \
1821 decky 91
    update.ptr = PA2MA(KA2PA(&((pte_t *) (ptl0))[(i)])); \
2017 decky 92
    update.val = PA2MA(a); \
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    ASSERT(xen_mmu_update(&update, 1, NULL, DOMID_SELF) == 0); \
1821 decky 94
}
2017 decky 95
 
1809 decky 96
#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
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#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
2017 decky 98
#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) { \
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    mmu_update_t update; \
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    \
101
    update.ptr = PA2MA(KA2PA(&((pte_t *) (ptl3))[(i)])); \
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    update.val = PA2MA(a); \
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    ASSERT(xen_mmu_update(&update, 1, NULL, DOMID_SELF) == 0); \
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}
1809 decky 105
 
1824 decky 106
#define GET_PTL1_FLAGS_ARCH(ptl0, i)        get_pt_flags((pte_t *) (ptl0), (index_t)(i))
1809 decky 107
#define GET_PTL2_FLAGS_ARCH(ptl1, i)        PAGE_PRESENT
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#define GET_PTL3_FLAGS_ARCH(ptl2, i)        PAGE_PRESENT
1824 decky 109
#define GET_FRAME_FLAGS_ARCH(ptl3, i)       get_pt_flags((pte_t *) (ptl3), (index_t)(i))
1809 decky 110
 
1824 decky 111
#define SET_PTL1_FLAGS_ARCH(ptl0, i, x)     set_pt_flags((pte_t *) (ptl0), (index_t)(i), (x))
1809 decky 112
#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
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#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
1824 decky 114
#define SET_FRAME_FLAGS_ARCH(ptl3, i, x)        set_pt_flags((pte_t *) (ptl3), (index_t)(i), (x))
1809 decky 115
 
116
#define PTE_VALID_ARCH(p)           (*((uint32_t *) (p)) != 0)
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#define PTE_PRESENT_ARCH(p)         ((p)->present != 0)
1821 decky 118
#define PTE_GET_FRAME_ARCH(p)           ((p)->frame_address << FRAME_WIDTH)
1809 decky 119
#define PTE_WRITABLE_ARCH(p)            ((p)->writeable != 0)
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#define PTE_EXECUTABLE_ARCH(p)          1
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122
#ifndef __ASM__
123
 
2089 decky 124
#include <mm/mm.h>
1824 decky 125
#include <arch/hypercall.h>
2089 decky 126
#include <arch/interrupt.h>
1809 decky 127
 
128
/* Page fault error codes. */
129
 
130
/** When bit on this position is 0, the page fault was caused by a not-present page. */
1821 decky 131
#define PFERR_CODE_P        (1 << 0)
1809 decky 132
 
133
/** When bit on this position is 1, the page fault was caused by a write. */
1821 decky 134
#define PFERR_CODE_RW       (1 << 1)
1809 decky 135
 
136
/** When bit on this position is 1, the page fault was caused in user mode. */
1821 decky 137
#define PFERR_CODE_US       (1 << 2)
1809 decky 138
 
139
/** When bit on this position is 1, a reserved bit was set in page directory. */
1821 decky 140
#define PFERR_CODE_RSVD     (1 << 3)
1809 decky 141
 
1824 decky 142
typedef struct {
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    uint64_t ptr;      /**< Machine address of PTE */
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    union {            /**< New contents of PTE */
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        uint64_t val;
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        pte_t pte;
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    };
148
} mmu_update_t;
149
 
150
typedef struct {
151
    unsigned int cmd;
152
    union {
153
        unsigned long mfn;
154
        unsigned long linear_addr;
155
    };
156
    union {
157
        unsigned int nr_ents;
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        void *vcpumask;
159
    };
160
} mmuext_op_t;
161
 
162
static inline int xen_update_va_mapping(const void *va, const pte_t pte, const unsigned int flags)
163
{
164
    return hypercall4(XEN_UPDATE_VA_MAPPING, va, pte, 0, flags);
165
}
166
 
167
static inline int xen_mmu_update(const mmu_update_t *req, const unsigned int count, unsigned int *success_count, domid_t domid)
168
{
169
    return hypercall4(XEN_MMU_UPDATE, req, count, success_count, domid);
170
}
171
 
172
static inline int xen_mmuext_op(const mmuext_op_t *op, const unsigned int count, unsigned int *success_count, domid_t domid)
173
{
174
    return hypercall4(XEN_MMUEXT_OP, op, count, success_count, domid);
175
}
176
 
1809 decky 177
static inline int get_pt_flags(pte_t *pt, index_t i)
178
{
179
    pte_t *p = &pt[i];
180
 
181
    return (
182
        (!p->page_cache_disable)<<PAGE_CACHEABLE_SHIFT |
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        (!p->present)<<PAGE_PRESENT_SHIFT |
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        p->uaccessible<<PAGE_USER_SHIFT |
185
        1<<PAGE_READ_SHIFT |
186
        p->writeable<<PAGE_WRITE_SHIFT |
187
        1<<PAGE_EXEC_SHIFT |
188
        p->global<<PAGE_GLOBAL_SHIFT
189
    );
190
}
191
 
192
static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
193
{
2017 decky 194
    pte_t p = pt[i];
1809 decky 195
 
2017 decky 196
    p.page_cache_disable = !(flags & PAGE_CACHEABLE);
197
    p.present = !(flags & PAGE_NOT_PRESENT);
198
    p.uaccessible = (flags & PAGE_USER) != 0;
199
    p.writeable = (flags & PAGE_WRITE) != 0;
200
    p.global = (flags & PAGE_GLOBAL) != 0;
1809 decky 201
 
202
    /*
203
     * Ensure that there is at least one bit set even if the present bit is cleared.
204
     */
2017 decky 205
    p.soft_valid = true;
206
 
207
    mmu_update_t update;
208
 
209
    update.ptr = PA2MA(KA2PA(&(pt[i])));
210
    update.pte = p;
211
    xen_mmu_update(&update, 1, NULL, DOMID_SELF);
1809 decky 212
}
213
 
214
extern void page_arch_init(void);
215
extern void page_fault(int n, istate_t *istate);
216
 
217
#endif /* __ASM__ */
218
 
219
#endif /* KERNEL */
220
 
221
#endif
222
 
223
/** @}
224
 */