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212 vana 1 
#include <cpu.h>
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#include <print.h>
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#include <panic.h>
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#include <arch/types.h>
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extern int IVT;
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void cpu_arch_init(void)
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{
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    int *p=&IVT;
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    volatile __u64 hlp,hlp2;
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    int psr = 0x2000;
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    __asm__  volatile (
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        "mov cr2 = %0;;\n"
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        "{mov psr.l = %1;;}\n"
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        "{srlz.i;"
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        "srlz.d;;}"
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        :
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        : "r" (p), "r" (psr)
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    );
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    /*Switch register bank of regs r16 .. r31 to 1 It is automaticly cleared on exception*/
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    __asm__ volatile
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    (
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        "bsw.1;;\n"
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    );            
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}
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