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3743 rimsky 1
#
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# Copyright (c) 2005 Jakub Jermar
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# Copyright (c) 2008 Pavel Rimsky
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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# - Redistributions of source code must retain the above copyright
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#   notice, this list of conditions and the following disclaimer.
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# - Redistributions in binary form must reproduce the above copyright
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#   notice, this list of conditions and the following disclaimer in the
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#   documentation and/or other materials provided with the distribution.
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# - The name of the author may not be used to endorse or promote products
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#   derived from this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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#include <arch/arch.h>
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#include <arch/stack.h>
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#include <arch/sun4v/regdef.h>
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#include <arch/sun4v/hypercall.h>
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#include <arch/sun4v/arch.h>
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#include <arch/sun4v/cpu.h>
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#include <arch/mm/pagesize.h>
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#include <arch/mm/sun4v/tte.h>
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#include <arch/mm/sun4v/mmu.h>
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#include <arch/mm/sun4v/tlb.h>
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.register %g2, #scratch
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.register %g3, #scratch
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.section K_TEXT_START, "ax"
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#define BSP_FLAG		1
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#define PHYSMEM_ADDR_SIZE	56
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/*
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 * Flags set in the TTE data entry mapping the kernel.
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 */
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#ifdef CONFIG_VIRT_IDX_DCACHE
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	#define TTE_FLAGS \
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		(1 << TTE_V_SHIFT) \
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		| (1 << TTE_EP_SHIFT) \
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		| (1 << TTE_CP_SHIFT) \
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		| (1 << TTE_CV_SHIFT) \
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		| (1 << TTE_P_SHIFT) \
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		| (1 << TTE_W_SHIFT)
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#else
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	#define TTE_FLAGS \
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		(1 << TTE_V_SHIFT) \
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		| (1 << TTE_EP_SHIFT) \
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		| (1 << TTE_CP_SHIFT) \
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		| (1 << TTE_P_SHIFT) \
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		| (1 << TTE_W_SHIFT)
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#endif
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/*
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 * Fills a register with a TTE Data item. The item will map the given virtual
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 * address to a real address which will be computed by adding the starting
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 * address of the physical memory to the virtual address.
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 *
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 * parameters:
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 * 	addr:			virtual address to be mapped
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 *	rphysmem_start:		register containing the starting address of the
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 *				physical memory
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 *	rtmp1:			a register to be used as temporary
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 *	rtmp2:			a register to be used as temporary
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 *	rd:			register where the result will be saved
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 */
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#define TTE_DATA(addr, rphysmem_start, rtmp1, rtmp2, rd) \
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	setx TTE_FLAGS | PAGESIZE_4M, rtmp1, rd; \
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	add rd, rphysmem_start, rd; \
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	setx (addr), rtmp1, rtmp2; \
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	add rd, rtmp2, rd;
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/*
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 * Here is where the kernel is passed control from the boot loader.
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 * 
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 * The registers are expected to be in this state:
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 * - %o0 starting address of physical memory + bootstrap processor flag
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 * 	bits 63...1:	physical memory starting address / 2
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 *	bit 0:		non-zero on BSP processor, zero on AP processors
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 * - %o1 bootinfo structure address (BSP only)
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 * - %o2 bootinfo structure size (BSP only)
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 *
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 * Moreover, we depend on boot having established the following environment:
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 * - TLBs are on
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 * - identity mapping for the kernel image
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 */
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.global kernel_image_start
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kernel_image_start:
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	mov BSP_FLAG, %l0
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	and %o0, %l0, %l7			! l7 <= bootstrap processor?
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	andn %o0, %l0, %l6			! l6 <= start of physical memory
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	or %o1, %g0, %l1
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	or %o2, %g0, %l2
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	! Get bits (PHYSMEM_ADDR_SIZE - 1):13 of physmem_base.
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	srlx %l6, 13, %l5
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	! l5 <= physmem_base[(PHYSMEM_ADDR_SIZE - 1):13]
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	sllx %l5, 13 + (63 - (PHYSMEM_ADDR_SIZE - 1)), %l5
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	srlx %l5, 63 - (PHYSMEM_ADDR_SIZE - 1), %l5	
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	/*
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	 * Setup basic runtime environment.
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	 */
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	wrpr %g0, NWINDOWS - 2, %cansave	! set maximum saveable windows
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	wrpr %g0, 0, %canrestore		! get rid of windows we will
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						! never need again
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	wrpr %g0, 0, %otherwin			! make sure the window state is
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						! consistent
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	wrpr %g0, NWINDOWS - 1, %cleanwin	! prevent needless clean_window
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						! traps for kernel
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	wrpr %g0, 0, %wstate			! use default spill/fill trap
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	wrpr %g0, 0, %tl			! TL = 0, primary context
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						! register is used
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	wrpr %g0, PSTATE_PRIV_BIT, %pstate	! disable interrupts and disable
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						! 32-bit address masking
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	wrpr %g0, 0, %pil			! intialize %pil
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	/*
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	 * Switch to kernel trap table.
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	 */
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	sethi %hi(trap_table), %g1
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	wrpr %g1, %lo(trap_table), %tba
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	/*
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	 * Take over the MMU.
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	 */
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	! map kernel in context 1
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	set kernel_image_start, %o0				! virt. address
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	set 1, %o1						! context
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	TTE_DATA(kernel_image_start, %l5, %g2, %g3, %o2)	! TTE data
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	set MMU_FLAG_DTLB | MMU_FLAG_ITLB, %o3			! MMU flags
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	__HYPERCALL_HYPERFAST(MMU_MAP_ADDR)
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	! switch to context 1
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	set 1, %o0
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	set VA_PRIMARY_CONTEXT_REG, %o1
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	stxa %o0, [%o1] ASI_PRIMARY_CONTEXT_REG
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	! demap all in context 0
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	set 0, %o0						! reserved
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	set 0, %o1						! reserved
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	set 0, %o2						! context
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	set MMU_FLAG_DTLB | MMU_FLAG_ITLB, %o3			! MMU flags
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	__HYPERCALL_FAST(MMU_DEMAP_CTX)
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	! install permanent mapping for kernel in context 0
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	set kernel_image_start, %o0				! virtual address
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	set 0, %o1						! context
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	TTE_DATA(kernel_image_start, %l5, %g2, %g3, %o2)	! TTE data
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	set MMU_FLAG_DTLB | MMU_FLAG_ITLB, %o3			! MMU flags
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	__HYPERCALL_FAST(MMU_MAP_PERM_ADDR)
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	! switch to context 0
177
	mov 0, %o0
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	set VA_PRIMARY_CONTEXT_REG, %o1
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	stxa %o0, [%o1] ASI_PRIMARY_CONTEXT_REG
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	! demap all in context 1 (cleanup)
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	set 0, %o0						! reserved
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	set 0, %o1						! reserved
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	set 1, %o2						! context
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	set MMU_FLAG_DTLB | MMU_FLAG_ITLB, %o3			! MMU flags
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	__HYPERCALL_FAST(MMU_DEMAP_CTX)
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	/*
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	 * Save physmem_base for use by the mm subsystem.
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	 * %l6 contains starting physical address
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	 */
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	sethi %hi(physmem_base), %l4
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	stx %l6, [%l4 + %lo(physmem_base)]
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	/*
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	 * Set CPUID.
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	 */
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	__HYPERCALL_FAST(CPU_MYID)
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	mov SCRATCHPAD_CPUID, %g1
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	stxa %o1, [%g1] ASI_SCRATCHPAD
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	/*
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	 * Set MMU fault status area for the current CPU.
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	 */
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	set mmu_fsas, %o0			! o0 <= addr. of fault status areas array
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	add %o0, %l6, %o0			! kernel address to real address
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	mulx %o1, MMU_FSA_SIZE, %g1		! g1 <= offset of current CPU's fault status area
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	add %g1, %o0, %o0			! o0 <= FSA of the current CPU
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	mov SCRATCHPAD_MMU_FSA, %g1
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	stxa %o0, [%g1] ASI_SCRATCHPAD		! remember MMU fault status area to speed up miss handler
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	__HYPERCALL_FAST(MMU_FAULT_AREA_CONF)
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	/*
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	 * Store a template of a TTE Data entry for kernel mappings.
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	 * This template will be used from the kernel MMU miss handler.
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	 */
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	!TTE_DATA(0, %l5, %g2, %g3, %g1)
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	setx TTE_FLAGS | PAGESIZE_8K, %g2, %g1; \
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	add %g1, %l5, %g1; \
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	set kernel_8k_tlb_data_template, %g4
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	stx %g1, [%g4]
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	/*
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	 * So far, we have not touched the stack.
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	 * It is a good idea to set the kernel stack to a known state now.
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	 */
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	sethi %hi(temporary_boot_stack), %sp
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	or %sp, %lo(temporary_boot_stack), %sp
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	sub %sp, STACK_BIAS, %sp
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	or %l1, %g0, %o1
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	or %l2, %g0, %o2
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	sethi %hi(bootinfo), %o0
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	call memcpy				! copy bootinfo
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	or %o0, %lo(bootinfo), %o0
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	call arch_pre_main
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	nop
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	call main_bsp
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	nop
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	/* Not reached. */
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0:
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	ba 0b
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	nop
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.section K_DATA_START, "aw", @progbits
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#define INITIAL_STACK_SIZE		1024
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.align STACK_ALIGNMENT
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	.space INITIAL_STACK_SIZE
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.align STACK_ALIGNMENT
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temporary_boot_stack:
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	.space STACK_WINDOW_SAVE_AREA_SIZE
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.data
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.align 8
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.global physmem_base		! copy of the physical memory base address
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physmem_base:
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	.quad 0
3835 rimsky 266
 
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.global kernel_8k_tlb_data_template
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kernel_8k_tlb_data_template:
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	.quad 0
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/* MMU fault status areas for all CPUs */
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.align MMU_FSA_ALIGNMENT
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.global mmu_fsas
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mmu_fsas:
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	!.space (MMU_FSA_SIZE * MAX_NUM_STRANDS)
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	.space 8192